chip_types 84 arch/arm/mach-imx/avic.c struct irq_chip_type *ct = gc->chip_types; chip_types 106 arch/arm/mach-imx/avic.c struct irq_chip_type *ct = gc->chip_types; chip_types 134 arch/arm/mach-imx/avic.c ct = gc->chip_types; chip_types 110 arch/arm/mach-imx/tzic.c ct = gc->chip_types; chip_types 182 arch/arm/mach-omap1/irq.c ct = gc->chip_types; chip_types 325 arch/arm/mach-omap2/prm_common.c ct = gc->chip_types; chip_types 589 arch/arm/plat-orion/gpio.c ct = gc->chip_types; chip_types 34 arch/arm/plat-orion/irq.c ct = gc->chip_types; chip_types 80 arch/sh/boards/mach-se/7343/irq.c ct = gc->chip_types; chip_types 79 arch/sh/boards/mach-se/7722/irq.c ct = gc->chip_types; chip_types 422 drivers/gpio/gpio-dwapb.c ct = &irq_gc->chip_types[i]; chip_types 439 drivers/gpio/gpio-dwapb.c irq_gc->chip_types[0].type = IRQ_TYPE_LEVEL_MASK; chip_types 440 drivers/gpio/gpio-dwapb.c irq_gc->chip_types[1].type = IRQ_TYPE_EDGE_BOTH; chip_types 441 drivers/gpio/gpio-dwapb.c irq_gc->chip_types[1].handler = handle_edge_irq; chip_types 388 drivers/gpio/gpio-ml-ioh.c ct = gc->chip_types; chip_types 1226 drivers/gpio/gpio-mvebu.c ct = &gc->chip_types[0]; chip_types 1233 drivers/gpio/gpio-mvebu.c ct = &gc->chip_types[1]; chip_types 356 drivers/gpio/gpio-mxc.c ct = gc->chip_types; chip_types 205 drivers/gpio/gpio-mxs.c ct = &gc->chip_types[0]; chip_types 217 drivers/gpio/gpio-mxs.c ct = &gc->chip_types[1]; chip_types 327 drivers/gpio/gpio-pch.c ct = gc->chip_types; chip_types 159 drivers/gpio/gpio-sodaville.c ct = sd->gc->chip_types; chip_types 314 drivers/gpio/gpio-sta2x11.c ct = gc->chip_types; chip_types 329 drivers/gpio/gpio-sta2x11.c struct irq_chip_type *ct = gc->chip_types; chip_types 202 drivers/gpio/gpio-tb10x.c gc->chip_types[0].type = IRQ_TYPE_EDGE_BOTH; chip_types 203 drivers/gpio/gpio-tb10x.c gc->chip_types[0].chip.irq_ack = irq_gc_ack_set_bit; chip_types 204 drivers/gpio/gpio-tb10x.c gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit; chip_types 205 drivers/gpio/gpio-tb10x.c gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit; chip_types 206 drivers/gpio/gpio-tb10x.c gc->chip_types[0].chip.irq_set_type = tb10x_gpio_irq_set_type; chip_types 207 drivers/gpio/gpio-tb10x.c gc->chip_types[0].regs.ack = OFFSET_TO_REG_CHANGE; chip_types 208 drivers/gpio/gpio-tb10x.c gc->chip_types[0].regs.mask = OFFSET_TO_REG_INT_EN; chip_types 1302 drivers/gpu/ipu-v3/ipu-common.c ct = gc->chip_types; chip_types 324 drivers/hwmon/w83795.c enum chip_types chip_type; chip_types 59 drivers/irqchip/irq-al-fic.c gc->chip_types->handler = handler; chip_types 167 drivers/irqchip/irq-al-fic.c gc->chip_types->regs.mask = AL_FIC_MASK; chip_types 168 drivers/irqchip/irq-al-fic.c gc->chip_types->regs.ack = AL_FIC_CAUSE; chip_types 169 drivers/irqchip/irq-al-fic.c gc->chip_types->chip.irq_mask = irq_gc_mask_set_bit; chip_types 170 drivers/irqchip/irq-al-fic.c gc->chip_types->chip.irq_unmask = irq_gc_mask_clr_bit; chip_types 171 drivers/irqchip/irq-al-fic.c gc->chip_types->chip.irq_ack = irq_gc_ack_clr_bit; chip_types 172 drivers/irqchip/irq-al-fic.c gc->chip_types->chip.irq_set_type = al_fic_irq_set_type; chip_types 173 drivers/irqchip/irq-al-fic.c gc->chip_types->chip.irq_retrigger = al_fic_irq_retrigger; chip_types 174 drivers/irqchip/irq-al-fic.c gc->chip_types->chip.flags = IRQCHIP_SKIP_SET_WAKE; chip_types 253 drivers/irqchip/irq-atmel-aic-common.c gc->chip_types[0].type = IRQ_TYPE_SENSE_MASK; chip_types 254 drivers/irqchip/irq-atmel-aic-common.c gc->chip_types[0].chip.irq_eoi = irq_gc_eoi; chip_types 255 drivers/irqchip/irq-atmel-aic-common.c gc->chip_types[0].chip.irq_set_wake = irq_gc_set_wake; chip_types 256 drivers/irqchip/irq-atmel-aic-common.c gc->chip_types[0].chip.irq_shutdown = aic_common_shutdown; chip_types 258 drivers/irqchip/irq-atmel-aic.c gc->chip_types[0].regs.eoi = AT91_AIC_EOICR; chip_types 259 drivers/irqchip/irq-atmel-aic.c gc->chip_types[0].regs.enable = AT91_AIC_IECR; chip_types 260 drivers/irqchip/irq-atmel-aic.c gc->chip_types[0].regs.disable = AT91_AIC_IDCR; chip_types 261 drivers/irqchip/irq-atmel-aic.c gc->chip_types[0].chip.irq_mask = irq_gc_mask_disable_reg; chip_types 262 drivers/irqchip/irq-atmel-aic.c gc->chip_types[0].chip.irq_unmask = irq_gc_unmask_enable_reg; chip_types 263 drivers/irqchip/irq-atmel-aic.c gc->chip_types[0].chip.irq_retrigger = aic_retrigger; chip_types 264 drivers/irqchip/irq-atmel-aic.c gc->chip_types[0].chip.irq_set_type = aic_set_type; chip_types 265 drivers/irqchip/irq-atmel-aic.c gc->chip_types[0].chip.irq_suspend = aic_suspend; chip_types 266 drivers/irqchip/irq-atmel-aic.c gc->chip_types[0].chip.irq_resume = aic_resume; chip_types 267 drivers/irqchip/irq-atmel-aic.c gc->chip_types[0].chip.irq_pm_shutdown = aic_pm_shutdown; chip_types 345 drivers/irqchip/irq-atmel-aic5.c gc->chip_types[0].regs.eoi = AT91_AIC5_EOICR; chip_types 346 drivers/irqchip/irq-atmel-aic5.c gc->chip_types[0].chip.irq_mask = aic5_mask; chip_types 347 drivers/irqchip/irq-atmel-aic5.c gc->chip_types[0].chip.irq_unmask = aic5_unmask; chip_types 348 drivers/irqchip/irq-atmel-aic5.c gc->chip_types[0].chip.irq_retrigger = aic5_retrigger; chip_types 349 drivers/irqchip/irq-atmel-aic5.c gc->chip_types[0].chip.irq_set_type = aic5_set_type; chip_types 350 drivers/irqchip/irq-atmel-aic5.c gc->chip_types[0].chip.irq_suspend = aic5_suspend; chip_types 351 drivers/irqchip/irq-atmel-aic5.c gc->chip_types[0].chip.irq_resume = aic5_resume; chip_types 352 drivers/irqchip/irq-atmel-aic5.c gc->chip_types[0].chip.irq_pm_shutdown = aic5_pm_shutdown; chip_types 89 drivers/irqchip/irq-bcm7120-l2.c struct irq_chip_type *ct = gc->chip_types; chip_types 100 drivers/irqchip/irq-bcm7120-l2.c struct irq_chip_type *ct = gc->chip_types; chip_types 286 drivers/irqchip/irq-bcm7120-l2.c ct = gc->chip_types; chip_types 229 drivers/irqchip/irq-brcmstb-l2.c ct = data->gc->chip_types; chip_types 67 drivers/irqchip/irq-csky-apb-intc.c gc->chip_types[0].regs.mask = mask_reg; chip_types 68 drivers/irqchip/irq-csky-apb-intc.c gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit; chip_types 69 drivers/irqchip/irq-csky-apb-intc.c gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit; chip_types 72 drivers/irqchip/irq-csky-apb-intc.c gc->chip_types[0].chip.irq_unmask = irq_ck_mask_set_bit; chip_types 53 drivers/irqchip/irq-davinci-aintc.c ct = gc->chip_types; chip_types 64 drivers/irqchip/irq-digicolor.c gc->chip_types[0].regs.ack = ack_reg; chip_types 65 drivers/irqchip/irq-digicolor.c gc->chip_types[0].regs.mask = en_reg; chip_types 66 drivers/irqchip/irq-digicolor.c gc->chip_types[0].chip.irq_ack = irq_gc_ack_set_bit; chip_types 67 drivers/irqchip/irq-digicolor.c gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit; chip_types 68 drivers/irqchip/irq-digicolor.c gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit; chip_types 142 drivers/irqchip/irq-dw-apb-ictl.c gc->chip_types[0].regs.mask = APB_INT_MASK_L; chip_types 143 drivers/irqchip/irq-dw-apb-ictl.c gc->chip_types[0].regs.enable = APB_INT_ENABLE_L; chip_types 144 drivers/irqchip/irq-dw-apb-ictl.c gc->chip_types[0].chip.irq_mask = irq_gc_mask_set_bit; chip_types 145 drivers/irqchip/irq-dw-apb-ictl.c gc->chip_types[0].chip.irq_unmask = irq_gc_mask_clr_bit; chip_types 146 drivers/irqchip/irq-dw-apb-ictl.c gc->chip_types[0].chip.irq_resume = dw_apb_ictl_resume; chip_types 96 drivers/irqchip/irq-goldfish-pic.c ct = gc->chip_types; chip_types 409 drivers/irqchip/irq-imgpdc.c gc->chip_types[0].regs.mask = PDC_IRQ_ROUTE; chip_types 410 drivers/irqchip/irq-imgpdc.c gc->chip_types[0].chip.irq_mask = perip_irq_mask; chip_types 411 drivers/irqchip/irq-imgpdc.c gc->chip_types[0].chip.irq_unmask = perip_irq_unmask; chip_types 412 drivers/irqchip/irq-imgpdc.c gc->chip_types[0].chip.irq_set_wake = pdc_irq_set_wake; chip_types 421 drivers/irqchip/irq-imgpdc.c gc->chip_types[0].type = IRQ_TYPE_EDGE_BOTH; chip_types 422 drivers/irqchip/irq-imgpdc.c gc->chip_types[0].handler = handle_edge_irq; chip_types 423 drivers/irqchip/irq-imgpdc.c gc->chip_types[0].regs.ack = PDC_IRQ_CLEAR; chip_types 424 drivers/irqchip/irq-imgpdc.c gc->chip_types[0].regs.mask = PDC_IRQ_ENABLE; chip_types 425 drivers/irqchip/irq-imgpdc.c gc->chip_types[0].chip.irq_ack = irq_gc_ack_set_bit; chip_types 426 drivers/irqchip/irq-imgpdc.c gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit; chip_types 427 drivers/irqchip/irq-imgpdc.c gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit; chip_types 428 drivers/irqchip/irq-imgpdc.c gc->chip_types[0].chip.irq_set_type = syswake_irq_set_type; chip_types 429 drivers/irqchip/irq-imgpdc.c gc->chip_types[0].chip.irq_set_wake = pdc_irq_set_wake; chip_types 431 drivers/irqchip/irq-imgpdc.c gc->chip_types[0].chip.flags = IRQCHIP_MASK_ON_SUSPEND; chip_types 434 drivers/irqchip/irq-imgpdc.c gc->chip_types[1].type = IRQ_TYPE_LEVEL_MASK; chip_types 435 drivers/irqchip/irq-imgpdc.c gc->chip_types[1].handler = handle_level_irq; chip_types 436 drivers/irqchip/irq-imgpdc.c gc->chip_types[1].regs.ack = PDC_IRQ_CLEAR; chip_types 437 drivers/irqchip/irq-imgpdc.c gc->chip_types[1].regs.mask = PDC_IRQ_ENABLE; chip_types 438 drivers/irqchip/irq-imgpdc.c gc->chip_types[1].chip.irq_ack = irq_gc_ack_set_bit; chip_types 439 drivers/irqchip/irq-imgpdc.c gc->chip_types[1].chip.irq_mask = irq_gc_mask_clr_bit; chip_types 440 drivers/irqchip/irq-imgpdc.c gc->chip_types[1].chip.irq_unmask = irq_gc_mask_set_bit; chip_types 441 drivers/irqchip/irq-imgpdc.c gc->chip_types[1].chip.irq_set_type = syswake_irq_set_type; chip_types 442 drivers/irqchip/irq-imgpdc.c gc->chip_types[1].chip.irq_set_wake = pdc_irq_set_wake; chip_types 444 drivers/irqchip/irq-imgpdc.c gc->chip_types[1].chip.flags = IRQCHIP_MASK_ON_SUSPEND; chip_types 131 drivers/irqchip/irq-ingenic-tcu.c ct = gc->chip_types; chip_types 55 drivers/irqchip/irq-ingenic.c struct irq_chip_regs *regs = &gc->chip_types->regs; chip_types 131 drivers/irqchip/irq-ingenic.c ct = gc->chip_types; chip_types 159 drivers/irqchip/irq-ls1x.c ct = gc->chip_types; chip_types 95 drivers/irqchip/irq-mscc-ocelot.c gc->chip_types[0].regs.ack = ICPU_CFG_INTR_INTR_STICKY; chip_types 96 drivers/irqchip/irq-mscc-ocelot.c gc->chip_types[0].regs.mask = ICPU_CFG_INTR_INTR_ENA_CLR; chip_types 97 drivers/irqchip/irq-mscc-ocelot.c gc->chip_types[0].chip.irq_ack = irq_gc_ack_set_bit; chip_types 98 drivers/irqchip/irq-mscc-ocelot.c gc->chip_types[0].chip.irq_mask = irq_gc_mask_set_bit; chip_types 99 drivers/irqchip/irq-mscc-ocelot.c gc->chip_types[0].chip.irq_unmask = ocelot_irq_unmask; chip_types 125 drivers/irqchip/irq-nvic.c gc->chip_types[0].regs.enable = NVIC_ISER; chip_types 126 drivers/irqchip/irq-nvic.c gc->chip_types[0].regs.disable = NVIC_ICER; chip_types 127 drivers/irqchip/irq-nvic.c gc->chip_types[0].chip.irq_mask = irq_gc_mask_disable_reg; chip_types 128 drivers/irqchip/irq-nvic.c gc->chip_types[0].chip.irq_unmask = irq_gc_unmask_enable_reg; chip_types 132 drivers/irqchip/irq-nvic.c gc->chip_types[0].chip.irq_eoi = irq_gc_noop; chip_types 206 drivers/irqchip/irq-omap-intc.c ct = gc->chip_types; chip_types 231 drivers/irqchip/irq-omap-intc.c ct = gc->chip_types; chip_types 90 drivers/irqchip/irq-orion.c gc->chip_types[0].regs.mask = ORION_IRQ_MASK; chip_types 91 drivers/irqchip/irq-orion.c gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit; chip_types 92 drivers/irqchip/irq-orion.c gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit; chip_types 189 drivers/irqchip/irq-orion.c gc->chip_types[0].regs.ack = ORION_BRIDGE_IRQ_CAUSE; chip_types 190 drivers/irqchip/irq-orion.c gc->chip_types[0].regs.mask = ORION_BRIDGE_IRQ_MASK; chip_types 191 drivers/irqchip/irq-orion.c gc->chip_types[0].chip.irq_startup = orion_bridge_irq_startup; chip_types 192 drivers/irqchip/irq-orion.c gc->chip_types[0].chip.irq_ack = irq_gc_ack_clr_bit; chip_types 193 drivers/irqchip/irq-orion.c gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit; chip_types 194 drivers/irqchip/irq-orion.c gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit; chip_types 272 drivers/irqchip/irq-pic32-evic.c gc->chip_types[0].type = IRQ_TYPE_LEVEL_MASK; chip_types 273 drivers/irqchip/irq-pic32-evic.c gc->chip_types[0].handler = handle_fasteoi_irq; chip_types 274 drivers/irqchip/irq-pic32-evic.c gc->chip_types[0].regs.ack = ifsclr; chip_types 275 drivers/irqchip/irq-pic32-evic.c gc->chip_types[0].regs.mask = iec; chip_types 276 drivers/irqchip/irq-pic32-evic.c gc->chip_types[0].chip.name = "evic-level"; chip_types 277 drivers/irqchip/irq-pic32-evic.c gc->chip_types[0].chip.irq_eoi = irq_gc_ack_set_bit; chip_types 278 drivers/irqchip/irq-pic32-evic.c gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit; chip_types 279 drivers/irqchip/irq-pic32-evic.c gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit; chip_types 280 drivers/irqchip/irq-pic32-evic.c gc->chip_types[0].chip.flags = IRQCHIP_SKIP_SET_WAKE; chip_types 283 drivers/irqchip/irq-pic32-evic.c gc->chip_types[1].type = IRQ_TYPE_EDGE_BOTH; chip_types 284 drivers/irqchip/irq-pic32-evic.c gc->chip_types[1].handler = handle_edge_irq; chip_types 285 drivers/irqchip/irq-pic32-evic.c gc->chip_types[1].regs.ack = ifsclr; chip_types 286 drivers/irqchip/irq-pic32-evic.c gc->chip_types[1].regs.mask = iec; chip_types 287 drivers/irqchip/irq-pic32-evic.c gc->chip_types[1].chip.name = "evic-edge"; chip_types 288 drivers/irqchip/irq-pic32-evic.c gc->chip_types[1].chip.irq_ack = irq_gc_ack_set_bit; chip_types 289 drivers/irqchip/irq-pic32-evic.c gc->chip_types[1].chip.irq_mask = irq_gc_mask_clr_bit; chip_types 290 drivers/irqchip/irq-pic32-evic.c gc->chip_types[1].chip.irq_unmask = irq_gc_mask_set_bit; chip_types 291 drivers/irqchip/irq-pic32-evic.c gc->chip_types[1].chip.irq_set_type = pic32_set_type_edge; chip_types 292 drivers/irqchip/irq-pic32-evic.c gc->chip_types[1].chip.flags = IRQCHIP_SKIP_SET_WAKE; chip_types 188 drivers/irqchip/irq-renesas-irqc.c p->gc->chip_types[0].regs.enable = IRQC_EN_SET; chip_types 189 drivers/irqchip/irq-renesas-irqc.c p->gc->chip_types[0].regs.disable = IRQC_EN_STS; chip_types 190 drivers/irqchip/irq-renesas-irqc.c p->gc->chip_types[0].chip.parent_device = dev; chip_types 191 drivers/irqchip/irq-renesas-irqc.c p->gc->chip_types[0].chip.irq_mask = irq_gc_mask_disable_reg; chip_types 192 drivers/irqchip/irq-renesas-irqc.c p->gc->chip_types[0].chip.irq_unmask = irq_gc_unmask_enable_reg; chip_types 193 drivers/irqchip/irq-renesas-irqc.c p->gc->chip_types[0].chip.irq_set_type = irqc_irq_set_type; chip_types 194 drivers/irqchip/irq-renesas-irqc.c p->gc->chip_types[0].chip.irq_set_wake = irqc_irq_set_wake; chip_types 195 drivers/irqchip/irq-renesas-irqc.c p->gc->chip_types[0].chip.flags = IRQCHIP_MASK_ON_SUSPEND; chip_types 51 drivers/irqchip/irq-sirfsoc.c ct = gc->chip_types; chip_types 754 drivers/irqchip/irq-stm32-exti.c gc->chip_types->type = IRQ_TYPE_EDGE_BOTH; chip_types 755 drivers/irqchip/irq-stm32-exti.c gc->chip_types->chip.irq_ack = stm32_irq_ack; chip_types 756 drivers/irqchip/irq-stm32-exti.c gc->chip_types->chip.irq_mask = irq_gc_mask_clr_bit; chip_types 757 drivers/irqchip/irq-stm32-exti.c gc->chip_types->chip.irq_unmask = irq_gc_mask_set_bit; chip_types 758 drivers/irqchip/irq-stm32-exti.c gc->chip_types->chip.irq_set_type = stm32_irq_set_type; chip_types 759 drivers/irqchip/irq-stm32-exti.c gc->chip_types->chip.irq_set_wake = irq_gc_set_wake; chip_types 764 drivers/irqchip/irq-stm32-exti.c gc->chip_types->regs.mask = stm32_bank->imr_ofst; chip_types 113 drivers/irqchip/irq-sunxi-nmi.c struct irq_chip_type *ct = gc->chip_types; chip_types 198 drivers/irqchip/irq-sunxi-nmi.c gc->chip_types[0].type = IRQ_TYPE_LEVEL_MASK; chip_types 199 drivers/irqchip/irq-sunxi-nmi.c gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit; chip_types 200 drivers/irqchip/irq-sunxi-nmi.c gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit; chip_types 201 drivers/irqchip/irq-sunxi-nmi.c gc->chip_types[0].chip.irq_eoi = irq_gc_ack_set_bit; chip_types 202 drivers/irqchip/irq-sunxi-nmi.c gc->chip_types[0].chip.irq_set_type = sunxi_sc_nmi_set_type; chip_types 203 drivers/irqchip/irq-sunxi-nmi.c gc->chip_types[0].chip.flags = IRQCHIP_EOI_THREADED | IRQCHIP_EOI_IF_HANDLED; chip_types 204 drivers/irqchip/irq-sunxi-nmi.c gc->chip_types[0].regs.ack = reg_offs->pend; chip_types 205 drivers/irqchip/irq-sunxi-nmi.c gc->chip_types[0].regs.mask = reg_offs->enable; chip_types 206 drivers/irqchip/irq-sunxi-nmi.c gc->chip_types[0].regs.type = reg_offs->ctrl; chip_types 208 drivers/irqchip/irq-sunxi-nmi.c gc->chip_types[1].type = IRQ_TYPE_EDGE_BOTH; chip_types 209 drivers/irqchip/irq-sunxi-nmi.c gc->chip_types[1].chip.name = gc->chip_types[0].chip.name; chip_types 210 drivers/irqchip/irq-sunxi-nmi.c gc->chip_types[1].chip.irq_ack = irq_gc_ack_set_bit; chip_types 211 drivers/irqchip/irq-sunxi-nmi.c gc->chip_types[1].chip.irq_mask = irq_gc_mask_clr_bit; chip_types 212 drivers/irqchip/irq-sunxi-nmi.c gc->chip_types[1].chip.irq_unmask = irq_gc_mask_set_bit; chip_types 213 drivers/irqchip/irq-sunxi-nmi.c gc->chip_types[1].chip.irq_set_type = sunxi_sc_nmi_set_type; chip_types 214 drivers/irqchip/irq-sunxi-nmi.c gc->chip_types[1].regs.ack = reg_offs->pend; chip_types 215 drivers/irqchip/irq-sunxi-nmi.c gc->chip_types[1].regs.mask = reg_offs->enable; chip_types 216 drivers/irqchip/irq-sunxi-nmi.c gc->chip_types[1].regs.type = reg_offs->ctrl; chip_types 217 drivers/irqchip/irq-sunxi-nmi.c gc->chip_types[1].handler = handle_edge_irq; chip_types 92 drivers/irqchip/irq-tango.c struct irq_chip_regs *regs = &gc->chip_types[0].regs; chip_types 129 drivers/irqchip/irq-tango.c struct irq_chip_type *ct = gc->chip_types; chip_types 146 drivers/irqchip/irq-tb10x.c gc->chip_types[0].type = IRQ_TYPE_LEVEL_MASK; chip_types 147 drivers/irqchip/irq-tb10x.c gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit; chip_types 148 drivers/irqchip/irq-tb10x.c gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit; chip_types 149 drivers/irqchip/irq-tb10x.c gc->chip_types[0].chip.irq_set_type = tb10x_irq_set_type; chip_types 150 drivers/irqchip/irq-tb10x.c gc->chip_types[0].regs.mask = AB_IRQCTL_INT_ENABLE; chip_types 152 drivers/irqchip/irq-tb10x.c gc->chip_types[1].type = IRQ_TYPE_EDGE_BOTH; chip_types 153 drivers/irqchip/irq-tb10x.c gc->chip_types[1].chip.name = gc->chip_types[0].chip.name; chip_types 154 drivers/irqchip/irq-tb10x.c gc->chip_types[1].chip.irq_ack = irq_gc_ack_set_bit; chip_types 155 drivers/irqchip/irq-tb10x.c gc->chip_types[1].chip.irq_mask = irq_gc_mask_clr_bit; chip_types 156 drivers/irqchip/irq-tb10x.c gc->chip_types[1].chip.irq_unmask = irq_gc_mask_set_bit; chip_types 157 drivers/irqchip/irq-tb10x.c gc->chip_types[1].chip.irq_set_type = tb10x_irq_set_type; chip_types 158 drivers/irqchip/irq-tb10x.c gc->chip_types[1].regs.ack = AB_IRQCTL_INT_STATUS; chip_types 159 drivers/irqchip/irq-tb10x.c gc->chip_types[1].regs.mask = AB_IRQCTL_INT_ENABLE; chip_types 160 drivers/irqchip/irq-tb10x.c gc->chip_types[1].handler = handle_edge_irq; chip_types 106 drivers/irqchip/irq-zevio.c gc->chip_types[0].chip.irq_ack = zevio_irq_ack; chip_types 107 drivers/irqchip/irq-zevio.c gc->chip_types[0].chip.irq_mask = irq_gc_mask_disable_reg; chip_types 108 drivers/irqchip/irq-zevio.c gc->chip_types[0].chip.irq_unmask = irq_gc_unmask_enable_reg; chip_types 109 drivers/irqchip/irq-zevio.c gc->chip_types[0].regs.mask = IO_IRQ_BASE + IO_ENABLE; chip_types 110 drivers/irqchip/irq-zevio.c gc->chip_types[0].regs.enable = IO_IRQ_BASE + IO_ENABLE; chip_types 111 drivers/irqchip/irq-zevio.c gc->chip_types[0].regs.disable = IO_IRQ_BASE + IO_DISABLE; chip_types 112 drivers/irqchip/irq-zevio.c gc->chip_types[0].regs.ack = IO_IRQ_BASE + IO_RESET; chip_types 3078 drivers/pinctrl/pinctrl-rockchip.c gc->chip_types[0].regs.mask = GPIO_INTMASK; chip_types 3079 drivers/pinctrl/pinctrl-rockchip.c gc->chip_types[0].regs.ack = GPIO_PORTS_EOI; chip_types 3080 drivers/pinctrl/pinctrl-rockchip.c gc->chip_types[0].chip.irq_ack = irq_gc_ack_set_bit; chip_types 3081 drivers/pinctrl/pinctrl-rockchip.c gc->chip_types[0].chip.irq_mask = irq_gc_mask_set_bit; chip_types 3082 drivers/pinctrl/pinctrl-rockchip.c gc->chip_types[0].chip.irq_unmask = irq_gc_mask_clr_bit; chip_types 3083 drivers/pinctrl/pinctrl-rockchip.c gc->chip_types[0].chip.irq_enable = rockchip_irq_enable; chip_types 3084 drivers/pinctrl/pinctrl-rockchip.c gc->chip_types[0].chip.irq_disable = rockchip_irq_disable; chip_types 3085 drivers/pinctrl/pinctrl-rockchip.c gc->chip_types[0].chip.irq_set_wake = irq_gc_set_wake; chip_types 3086 drivers/pinctrl/pinctrl-rockchip.c gc->chip_types[0].chip.irq_suspend = rockchip_irq_suspend; chip_types 3087 drivers/pinctrl/pinctrl-rockchip.c gc->chip_types[0].chip.irq_resume = rockchip_irq_resume; chip_types 3088 drivers/pinctrl/pinctrl-rockchip.c gc->chip_types[0].chip.irq_set_type = rockchip_irq_set_type; chip_types 2702 drivers/scsi/arm/fas216.c static char *chip_types[] = { chip_types 2897 drivers/scsi/arm/fas216.c info->scsi.type = chip_types[type]; chip_types 296 drivers/soc/dove/pmu.c gc->chip_types[0].regs.mask = PMC_IRQ_MASK; chip_types 297 drivers/soc/dove/pmu.c gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit; chip_types 298 drivers/soc/dove/pmu.c gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit; chip_types 1027 include/linux/irq.h struct irq_chip_type chip_types[0]; chip_types 224 kernel/irq/devres.c gc = devm_kzalloc(dev, struct_size(gc, chip_types, num_ct), GFP_KERNEL); chip_types 222 kernel/irq/generic-chip.c gc->chip_types->chip.name = name; chip_types 223 kernel/irq/generic-chip.c gc->chip_types->handler = handler; chip_types 256 kernel/irq/generic-chip.c struct irq_chip_type *ct = gc->chip_types; chip_types 400 kernel/irq/generic-chip.c ct = gc->chip_types; chip_types 470 kernel/irq/generic-chip.c struct irq_chip_type *ct = gc->chip_types; chip_types 514 kernel/irq/generic-chip.c struct irq_chip_type *ct = gc->chip_types; chip_types 583 kernel/irq/generic-chip.c struct irq_chip_type *ct = gc->chip_types; chip_types 603 kernel/irq/generic-chip.c struct irq_chip_type *ct = gc->chip_types; chip_types 626 kernel/irq/generic-chip.c struct irq_chip_type *ct = gc->chip_types;