check_msr        5134 arch/x86/events/intel/core.c 	if (x86_pmu.lbr_nr && !check_msr(x86_pmu.lbr_tos, 0x3UL))
check_msr        5137 arch/x86/events/intel/core.c 		if (!(check_msr(x86_pmu.lbr_from + i, 0xffffUL) &&
check_msr        5138 arch/x86/events/intel/core.c 		      check_msr(x86_pmu.lbr_to + i, 0xffffUL)))
check_msr        5152 arch/x86/events/intel/core.c 			er->extra_msr_access = check_msr(er->msr, 0x11UL);