CCN_NUM_PMU_EVENT_COUNTERS  122 drivers/perf/arm-ccn.c #define CCN_IDX_PMU_CYCLE_COUNTER	CCN_NUM_PMU_EVENT_COUNTERS
CCN_NUM_PMU_EVENT_COUNTERS  125 drivers/perf/arm-ccn.c #define CCN_IDX_MASK_ANY		(CCN_NUM_PMU_EVENT_COUNTERS + 0)
CCN_NUM_PMU_EVENT_COUNTERS  126 drivers/perf/arm-ccn.c #define CCN_IDX_MASK_EXACT		(CCN_NUM_PMU_EVENT_COUNTERS + 1)
CCN_NUM_PMU_EVENT_COUNTERS  127 drivers/perf/arm-ccn.c #define CCN_IDX_MASK_ORDER		(CCN_NUM_PMU_EVENT_COUNTERS + 2)
CCN_NUM_PMU_EVENT_COUNTERS  128 drivers/perf/arm-ccn.c #define CCN_IDX_MASK_OPCODE		(CCN_NUM_PMU_EVENT_COUNTERS + 3)
CCN_NUM_PMU_EVENT_COUNTERS  151 drivers/perf/arm-ccn.c 	DECLARE_BITMAP(pmu_counters_mask, CCN_NUM_PMU_EVENT_COUNTERS + 1);
CCN_NUM_PMU_EVENT_COUNTERS  155 drivers/perf/arm-ccn.c 	} pmu_counters[CCN_NUM_PMU_EVENT_COUNTERS + 1];
CCN_NUM_PMU_EVENT_COUNTERS  159 drivers/perf/arm-ccn.c 	} cmp_mask[CCN_NUM_PMU_EVENT_COUNTERS + CCN_NUM_PREDEFINED_MASKS];
CCN_NUM_PMU_EVENT_COUNTERS  662 drivers/perf/arm-ccn.c 			CCN_NUM_PMU_EVENT_COUNTERS);
CCN_NUM_PMU_EVENT_COUNTERS 1095 drivers/perf/arm-ccn.c 			     CCN_NUM_PMU_EVENT_COUNTERS + 1);
CCN_NUM_PMU_EVENT_COUNTERS 1172 drivers/perf/arm-ccn.c 	BUILD_BUG_ON(CCN_IDX_PMU_CYCLE_COUNTER != CCN_NUM_PMU_EVENT_COUNTERS);
CCN_NUM_PMU_EVENT_COUNTERS 1174 drivers/perf/arm-ccn.c 	for (idx = 0; idx < CCN_NUM_PMU_EVENT_COUNTERS + 1; idx++) {