cdv_sb_write 233 drivers/gpu/drm/gma500/cdv_intel_display.c cdv_sb_write(dev, SB_REF_SFR(pipe), ref_value); cdv_sb_write 263 drivers/gpu/drm/gma500/cdv_intel_display.c ret = cdv_sb_write(dev, ref_sfr, ref_value); cdv_sb_write 272 drivers/gpu/drm/gma500/cdv_intel_display.c ret = cdv_sb_write(dev, SB_M(pipe), m); cdv_sb_write 303 drivers/gpu/drm/gma500/cdv_intel_display.c ret = cdv_sb_write(dev, SB_N_VCO(pipe), n_vco); cdv_sb_write 329 drivers/gpu/drm/gma500/cdv_intel_display.c ret = cdv_sb_write(dev, SB_P(pipe), p); cdv_sb_write 339 drivers/gpu/drm/gma500/cdv_intel_display.c cdv_sb_write(dev, lane_reg, lane_value); cdv_sb_write 345 drivers/gpu/drm/gma500/cdv_intel_display.c cdv_sb_write(dev, lane_reg, lane_value); cdv_sb_write 351 drivers/gpu/drm/gma500/cdv_intel_display.c cdv_sb_write(dev, lane_reg, lane_value); cdv_sb_write 357 drivers/gpu/drm/gma500/cdv_intel_display.c cdv_sb_write(dev, lane_reg, lane_value); cdv_sb_write 1459 drivers/gpu/drm/gma500/cdv_intel_dp.c cdv_sb_write(dev, ddi_reg->VSwing5, 0x0505313A); cdv_sb_write 1462 drivers/gpu/drm/gma500/cdv_intel_dp.c cdv_sb_write(dev, ddi_reg->VSwing1, 0x43406055); cdv_sb_write 1469 drivers/gpu/drm/gma500/cdv_intel_dp.c cdv_sb_write(dev, ddi_reg->VSwing2, 0x055738954); cdv_sb_write 1471 drivers/gpu/drm/gma500/cdv_intel_dp.c cdv_sb_write(dev, ddi_reg->VSwing2, dp_vswing_premph_table[index]); cdv_sb_write 1475 drivers/gpu/drm/gma500/cdv_intel_dp.c cdv_sb_write(dev, ddi_reg->VSwing3, 0x70802040); cdv_sb_write 1477 drivers/gpu/drm/gma500/cdv_intel_dp.c cdv_sb_write(dev, ddi_reg->VSwing3, 0x40802040); cdv_sb_write 1483 drivers/gpu/drm/gma500/cdv_intel_dp.c cdv_sb_write(dev, ddi_reg->VSwing1, 0xc3406055); cdv_sb_write 1488 drivers/gpu/drm/gma500/cdv_intel_dp.c cdv_sb_write(dev, ddi_reg->PreEmph1, 0x1f030040); cdv_sb_write 1492 drivers/gpu/drm/gma500/cdv_intel_dp.c cdv_sb_write(dev, ddi_reg->PreEmph2, dp_vswing_premph_table[index]); cdv_sb_write 271 drivers/gpu/drm/gma500/psb_intel_drv.h extern int cdv_sb_write(struct drm_device *dev, u32 reg, u32 val);