cdv_sb_read       163 drivers/gpu/drm/gma500/cdv_intel_display.c 		if (cdv_sb_read(dev, reg, &temp) == 0)
cdv_sb_read       188 drivers/gpu/drm/gma500/cdv_intel_display.c 		if (cdv_sb_read(dev, reg, &temp) == 0)
cdv_sb_read       250 drivers/gpu/drm/gma500/cdv_intel_display.c 	ret = cdv_sb_read(dev, ref_sfr, &ref_value);
cdv_sb_read       267 drivers/gpu/drm/gma500/cdv_intel_display.c 	ret = cdv_sb_read(dev, SB_M(pipe), &m);
cdv_sb_read       276 drivers/gpu/drm/gma500/cdv_intel_display.c 	ret = cdv_sb_read(dev, SB_N_VCO(pipe), &n_vco);
cdv_sb_read       307 drivers/gpu/drm/gma500/cdv_intel_display.c 	ret = cdv_sb_read(dev, SB_P(pipe), &p);
cdv_sb_read       336 drivers/gpu/drm/gma500/cdv_intel_display.c 			cdv_sb_read(dev, lane_reg, &lane_value);
cdv_sb_read       342 drivers/gpu/drm/gma500/cdv_intel_display.c 			cdv_sb_read(dev, lane_reg, &lane_value);
cdv_sb_read       348 drivers/gpu/drm/gma500/cdv_intel_display.c 			cdv_sb_read(dev, lane_reg, &lane_value);
cdv_sb_read       354 drivers/gpu/drm/gma500/cdv_intel_display.c 			cdv_sb_read(dev, lane_reg, &lane_value);
cdv_sb_read       270 drivers/gpu/drm/gma500/psb_intel_drv.h extern int cdv_sb_read(struct drm_device *dev, u32 reg, u32 *val);