cc_ioread         110 drivers/crypto/ccree/cc_driver.c 		idr.regs[i] = cc_ioread(drvdata, idr_offsets[i]);
cc_ioread         141 drivers/crypto/ccree/cc_driver.c 	irr = cc_ioread(drvdata, CC_REG(HOST_IRR));
cc_ioread         147 drivers/crypto/ccree/cc_driver.c 	imr = cc_ioread(drvdata, CC_REG(HOST_IMR));
cc_ioread         178 drivers/crypto/ccree/cc_driver.c 		axi_err = cc_ioread(drvdata, CC_REG(AXIM_MON_ERR));
cc_ioread         207 drivers/crypto/ccree/cc_driver.c 		val = cc_ioread(drvdata, CC_REG(NVM_IS_IDLE));
cc_ioread         227 drivers/crypto/ccree/cc_driver.c 		val = cc_ioread(drvdata, CC_REG(AXIM_CFG));
cc_ioread         230 drivers/crypto/ccree/cc_driver.c 			cc_ioread(drvdata, CC_REG(AXIM_CFG)));
cc_ioread         234 drivers/crypto/ccree/cc_driver.c 	val = cc_ioread(drvdata, CC_REG(HOST_IRR));
cc_ioread         248 drivers/crypto/ccree/cc_driver.c 	val = cc_ioread(drvdata, CC_REG(AXIM_CACHE_PARAMS));
cc_ioread         254 drivers/crypto/ccree/cc_driver.c 	val = cc_ioread(drvdata, CC_REG(AXIM_CACHE_PARAMS));
cc_ioread         379 drivers/crypto/ccree/cc_driver.c 		val = cc_ioread(new_drvdata, new_drvdata->sig_offset);
cc_ioread         387 drivers/crypto/ccree/cc_driver.c 		hw_rev_pidr = cc_ioread(new_drvdata, new_drvdata->ver_offset);
cc_ioread         409 drivers/crypto/ccree/cc_driver.c 		val = cc_ioread(new_drvdata, CC_REG(HOST_REMOVE_INPUT_PINS));
cc_ioread         427 drivers/crypto/ccree/cc_driver.c 		val = cc_ioread(new_drvdata, CC_REG(SECURITY_DISABLED));
cc_ioread          26 drivers/crypto/ccree/cc_fips.c 	reg = cc_ioread(drvdata, CC_REG(GPR_HOST));
cc_ioread         146 drivers/crypto/ccree/cc_request_mgr.c 	req_mgr_h->hw_queue_size = cc_ioread(drvdata,
cc_ioread         248 drivers/crypto/ccree/cc_request_mgr.c 			cc_ioread(drvdata, CC_REG(DSCRPTR_QUEUE_CONTENT));
cc_ioread         543 drivers/crypto/ccree/cc_request_mgr.c 		cc_ioread(drvdata, CC_REG(DSCRPTR_QUEUE_CONTENT));
cc_ioread         626 drivers/crypto/ccree/cc_request_mgr.c 			 cc_ioread(drvdata, drvdata->axim_mon_offset));
cc_ioread         655 drivers/crypto/ccree/cc_request_mgr.c 			drvdata->irq |= cc_ioread(drvdata, CC_REG(HOST_IRR));
cc_ioread         675 drivers/crypto/ccree/cc_request_mgr.c 		   cc_ioread(drvdata, CC_REG(HOST_IMR)) & ~drvdata->comp_mask);
cc_ioread          40 drivers/crypto/ccree/cc_sram_mgr.c 		start = (dma_addr_t)cc_ioread(drvdata,