cache_line_size 91 arch/arm64/include/asm/cache.h int cache_line_size(void); cache_line_size 27 arch/arm64/kernel/cacheinfo.c EXPORT_SYMBOL_GPL(cache_line_size); cache_line_size 101 arch/mips/mm/page.c static int cache_line_size; cache_line_size 102 arch/mips/mm/page.c #define cache_line_mask() (cache_line_size - 1) cache_line_size 148 arch/mips/mm/page.c cache_line_size = cpu_dcache_line_size(); cache_line_size 217 arch/mips/mm/page.c cache_line_size = cpu_scache_line_size(); cache_line_size 219 arch/mips/mm/page.c cache_line_size = cpu_dcache_line_size(); cache_line_size 226 arch/mips/mm/page.c max(cache_line_size >> 1, cache_line_size 229 arch/mips/mm/page.c max(cache_line_size >> 1, cache_line_size 250 arch/mips/mm/page.c } else if (cache_line_size == (half_clear_loop_size << 1)) { cache_line_size 309 arch/mips/mm/page.c off = cache_line_size ? min(8, pref_bias_clear_store / cache_line_size) cache_line_size 310 arch/mips/mm/page.c * cache_line_size : 0; cache_line_size 313 arch/mips/mm/page.c off -= cache_line_size; cache_line_size 402 arch/mips/mm/page.c } else if (cache_line_size == (half_copy_loop_size << 1)) { cache_line_size 460 arch/mips/mm/page.c off = cache_line_size ? min(8, pref_bias_copy_load / cache_line_size) * cache_line_size 461 arch/mips/mm/page.c cache_line_size : 0; cache_line_size 464 arch/mips/mm/page.c off -= cache_line_size; cache_line_size 466 arch/mips/mm/page.c off = cache_line_size ? min(8, pref_bias_copy_store / cache_line_size) * cache_line_size 467 arch/mips/mm/page.c cache_line_size : 0; cache_line_size 470 arch/mips/mm/page.c off -= cache_line_size; cache_line_size 53 arch/powerpc/kernel/eeh_pe.c alloc_size = ALIGN(alloc_size, cache_line_size()); cache_line_size 68 arch/powerpc/kernel/eeh_pe.c cache_line_size()); cache_line_size 401 arch/s390/pci/pci_irq.c zpci_ibv[cpu] = airq_iv_create(cache_line_size() * BITS_PER_BYTE, cache_line_size 487 block/blk-flush.c rq_sz = round_up(rq_sz + cmd_size, cache_line_size()); cache_line_size 2175 block/blk-mq.c cache_line_size()); cache_line_size 1983 drivers/edac/i7core_edac.c const int cache_line_size = 64; cache_line_size 1991 drivers/edac/i7core_edac.c cache_line_size * 1000000; cache_line_size 2023 drivers/edac/i7core_edac.c const u32 cache_line_size = 64; cache_line_size 2043 drivers/edac/i7core_edac.c 1000000 * cache_line_size; cache_line_size 340 drivers/edac/thunderx_edac.c unsigned int cline_size = cache_line_size(); cache_line_size 411 drivers/edac/thunderx_edac.c unsigned int cline_size = cache_line_size(); cache_line_size 320 drivers/gpu/drm/amd/amdkfd/kfd_crat.c props->cacheline_size = cache->cache_line_size; cache_line_size 166 drivers/gpu/drm/amd/amdkfd/kfd_crat.h uint16_t cache_line_size; cache_line_size 266 drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c guc->db_cacheline += cache_line_size(); cache_line_size 269 drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c offset, guc->db_cacheline, cache_line_size()); cache_line_size 954 drivers/infiniband/hw/mlx5/cq.c cqe_size = cache_line_size() == 128 ? 128 : 64; cache_line_size 1810 drivers/infiniband/hw/mlx5/main.c resp.cache_line_size = cache_line_size(); cache_line_size 104 drivers/infiniband/sw/rxe/rxe_queue.c if (elem_size < cache_line_size()) cache_line_size 105 drivers/infiniband/sw/rxe/rxe_queue.c elem_size = cache_line_size(); cache_line_size 871 drivers/iommu/iova.c rcache->cpu_rcaches = __alloc_percpu(sizeof(*cpu_rcache), cache_line_size()); cache_line_size 10560 drivers/net/ethernet/broadcom/bnxt/bnxt.c bnxt_hwrm_set_cache_line_size(bp, cache_line_size()); cache_line_size 1764 drivers/net/ethernet/chelsio/cxgb4/cxgb4.h unsigned int cache_line_size); cache_line_size 7285 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c unsigned int cache_line_size) cache_line_size 7289 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c unsigned int stat_len = cache_line_size > 64 ? 128 : 64; cache_line_size 7290 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c unsigned int fl_align = cache_line_size < 32 ? 32 : cache_line_size; cache_line_size 323 drivers/net/ethernet/marvell/mvneta.c cache_line_size()) cache_line_size 629 drivers/net/ethernet/marvell/mvpp2/mvpp2.h ETH_HLEN + ETH_FCS_LEN, cache_line_size()) cache_line_size 1901 drivers/net/ethernet/mellanox/mlx4/fw.c ((ilog2(cache_line_size()) - 4) << 5) | (1 << 4); cache_line_size 1950 drivers/net/ethernet/mellanox/mlx4/fw.c dev->caps.eqe_size = cache_line_size(); cache_line_size 1951 drivers/net/ethernet/mellanox/mlx4/fw.c dev->caps.cqe_size = cache_line_size(); cache_line_size 381 drivers/net/ethernet/mellanox/mlx4/main.c if (cache_line_size() == 128 || cache_line_size() == 256) { cache_line_size 390 drivers/net/ethernet/mellanox/mlx4/main.c if (cache_line_size() != 32 && cache_line_size() != 64) cache_line_size 183 drivers/net/ethernet/mellanox/mlx5/core/alloc.c u32 db_per_page = PAGE_SIZE / cache_line_size(); cache_line_size 212 drivers/net/ethernet/mellanox/mlx5/core/alloc.c u32 db_per_page = PAGE_SIZE / cache_line_size(); cache_line_size 224 drivers/net/ethernet/mellanox/mlx5/core/alloc.c offset = db->index * cache_line_size(); cache_line_size 271 drivers/net/ethernet/mellanox/mlx5/core/alloc.c u32 db_per_page = PAGE_SIZE / cache_line_size(); cache_line_size 2234 drivers/net/ethernet/mellanox/mlx5/core/en_main.c if (MLX5_CAP_GEN(priv->mdev, cqe_128_always) && cache_line_size() >= 128) cache_line_size 569 drivers/net/ethernet/mellanox/mlx5/core/main.c cache_line_size() >= 128 ? 1 : 0); cache_line_size 2546 drivers/net/ethernet/qlogic/qed/qed_dev.c u32 val, wr_mbs, cache_line_size; cache_line_size 2566 drivers/net/ethernet/qlogic/qed/qed_dev.c cache_line_size = min_t(u32, L1_CACHE_BYTES, wr_mbs); cache_line_size 2567 drivers/net/ethernet/qlogic/qed/qed_dev.c switch (cache_line_size) { cache_line_size 2583 drivers/net/ethernet/qlogic/qed/qed_dev.c cache_line_size); cache_line_size 57 drivers/pci/controller/dwc/pcie-designware-ep.c hdr->cache_line_size); cache_line_size 61 drivers/pci/controller/pcie-cadence-ep.c hdr->cache_line_size); cache_line_size 148 drivers/pci/controller/pcie-rockchip-ep.c rockchip_pcie_write(rockchip, hdr->cache_line_size, cache_line_size 329 drivers/pci/endpoint/pci-ep-cfs.c PCI_EPF_HEADER_R(cache_line_size) cache_line_size 330 drivers/pci/endpoint/pci-ep-cfs.c PCI_EPF_HEADER_W_u8(cache_line_size) cache_line_size 347 drivers/pci/endpoint/pci-ep-cfs.c CONFIGFS_ATTR(pci_epf_, cache_line_size); cache_line_size 123 drivers/pci/pci-acpi.c u8 cache_line_size; /* Not applicable to PCIe */ cache_line_size 131 drivers/pci/pci-acpi.c .cache_line_size = 8, cache_line_size 150 drivers/pci/pci-acpi.c pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, hpx->cache_line_size); cache_line_size 185 drivers/pci/pci-acpi.c hpx0->cache_line_size = fields[2].integer.value; cache_line_size 729 drivers/pci/pci-acpi.c hpx0.cache_line_size = fields[0].integer.value; cache_line_size 275 drivers/pci/pci-bridge-emul.c bridge->conf.cache_line_size = 0x10; cache_line_size 14 drivers/pci/pci-bridge-emul.h u8 cache_line_size; cache_line_size 145 drivers/s390/cio/airq.c if ((cache_line_size() * BITS_PER_BYTE) < bits cache_line_size 310 drivers/s390/cio/airq.c cache_line_size(), cache_line_size 311 drivers/s390/cio/airq.c cache_line_size(), PAGE_SIZE); cache_line_size 173 drivers/scsi/cxlflash/common.h } __aligned(cache_line_size()); cache_line_size 228 drivers/scsi/cxlflash/common.h } __aligned(cache_line_size()); cache_line_size 3428 drivers/scsi/cxlflash/main.c buf = kmalloc(ulen + cache_line_size() - 1, GFP_KERNEL); cache_line_size 3434 drivers/scsi/cxlflash/main.c kbuf = PTR_ALIGN(buf, cache_line_size()); cache_line_size 480 drivers/scsi/cxlflash/sislite.h char carea[cache_line_size()]; /* 128B each */ cache_line_size 96 drivers/scsi/ipr.c .cache_line_size = 0x20, cache_line_size 121 drivers/scsi/ipr.c .cache_line_size = 0x20, cache_line_size 146 drivers/scsi/ipr.c .cache_line_size = 0x20, cache_line_size 10254 drivers/scsi/ipr.c ioa_cfg->chip_cfg->cache_line_size); cache_line_size 1402 drivers/scsi/ipr.h u8 cache_line_size; cache_line_size 985 drivers/staging/fwserial/fwserial.c cache_line_size(), cache_line_size 100 drivers/staging/vc04_services/interface/vchiq_arm/vchiq_2835_arm.c g_cache_line_size = drvdata->cache_line_size; cache_line_size 144 drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c .cache_line_size = 32, cache_line_size 148 drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c .cache_line_size = 64, cache_line_size 99 drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.h const unsigned int cache_line_size; cache_line_size 47 include/linux/pci-epf.h u8 cache_line_size; cache_line_size 131 include/uapi/rdma/mlx5-abi.h __u32 cache_line_size; cache_line_size 1228 kernel/trace/ring_buffer.c bpage = kzalloc_node(ALIGN(sizeof(*bpage), cache_line_size()), cache_line_size 1293 kernel/trace/ring_buffer.c cpu_buffer = kzalloc_node(ALIGN(sizeof(*cpu_buffer), cache_line_size()), cache_line_size 1309 kernel/trace/ring_buffer.c bpage = kzalloc_node(ALIGN(sizeof(*bpage), cache_line_size()), cache_line_size 1387 kernel/trace/ring_buffer.c buffer = kzalloc(ALIGN(sizeof(*buffer), cache_line_size()), cache_line_size 1410 kernel/trace/ring_buffer.c buffer->buffers = kzalloc(ALIGN(bsize, cache_line_size()), cache_line_size 1959 mm/slab.c cachep->colour_off = cache_line_size(); cache_line_size 2011 mm/slab.c size >= 256 && cachep->object_size > cache_line_size()) { cache_line_size 294 mm/slab_common.c ralign = cache_line_size(); cache_line_size 4280 mm/slub.c cache_line_size(), cache_line_size 478 net/smc/smc_ib.c cqe_size_order = cache_line_size() == 128 ? 7 : 6; cache_line_size 22 tools/perf/util/cacheline.c cache_line_size(&size);