c5_DFSR           413 arch/arm/kvm/coproc.c 			access_vm_reg, reset_unknown, c5_DFSR },
c5_DFSR            26 arch/arm/kvm/hyp/cp15-sr.c 	ctxt->cp15[c5_DFSR]		= read_sysreg(DFSR);
c5_DFSR            55 arch/arm/kvm/hyp/cp15-sr.c 	write_sysreg(ctxt->cp15[c5_DFSR],	DFSR);
c5_DFSR          1857 arch/arm64/kvm/sys_regs.c 	{ Op1( 0), CRn( 5), CRm( 0), Op2( 0), access_vm_reg, NULL, c5_DFSR },
c5_DFSR           205 virt/kvm/arm/aarch32.c 		fsr = &vcpu_cp15(vcpu, c5_DFSR);