brcm_sata_phy_wr  232 drivers/phy/broadcom/phy-brcm-sata.c 	brcm_sata_phy_wr(base, TXPMD_REG_BANK, TXPMD_CONTROL1, ~tmp, tmp);
brcm_sata_phy_wr  235 drivers/phy/broadcom/phy-brcm-sata.c 	brcm_sata_phy_wr(base, TXPMD_REG_BANK, TXPMD_TX_FREQ_CTRL_CONTROL2,
brcm_sata_phy_wr  247 drivers/phy/broadcom/phy-brcm-sata.c 	brcm_sata_phy_wr(base, TXPMD_REG_BANK, TXPMD_TX_FREQ_CTRL_CONTROL3,
brcm_sata_phy_wr  277 drivers/phy/broadcom/phy-brcm-sata.c 	brcm_sata_phy_wr(base, AEQRX_REG_BANK_0, reg, ~tmp, tmp);
brcm_sata_phy_wr  278 drivers/phy/broadcom/phy-brcm-sata.c 	brcm_sata_phy_wr(base, AEQRX_REG_BANK_1, reg, ~tmp, tmp);
brcm_sata_phy_wr  309 drivers/phy/broadcom/phy-brcm-sata.c 	brcm_sata_phy_wr(base, OOB_REG_BANK, OOB_CTRL1, 0x0, val);
brcm_sata_phy_wr  314 drivers/phy/broadcom/phy-brcm-sata.c 	brcm_sata_phy_wr(base, OOB_REG_BANK, OOB_CTRL2, 0x0, val);
brcm_sata_phy_wr  318 drivers/phy/broadcom/phy-brcm-sata.c 	brcm_sata_phy_wr(base, PLL1_REG_BANK, PLL1_ACTRL2, 0x0, val);
brcm_sata_phy_wr  320 drivers/phy/broadcom/phy-brcm-sata.c 	brcm_sata_phy_wr(base, PLL1_REG_BANK, PLL1_ACTRL3, 0x0, val);
brcm_sata_phy_wr  322 drivers/phy/broadcom/phy-brcm-sata.c 	brcm_sata_phy_wr(base, PLL1_REG_BANK, PLL1_ACTRL4, 0x0, val);
brcm_sata_phy_wr  326 drivers/phy/broadcom/phy-brcm-sata.c 	brcm_sata_phy_wr(base, BLOCK0_REG_BANK, BLOCK0_SPARE,
brcm_sata_phy_wr  378 drivers/phy/broadcom/phy-brcm-sata.c 	brcm_sata_phy_wr(base, oob_bank, OOB_CTRL1, 0x0, val);
brcm_sata_phy_wr  384 drivers/phy/broadcom/phy-brcm-sata.c 	brcm_sata_phy_wr(base, oob_bank, OOB_CTRL2, 0x0, val);
brcm_sata_phy_wr  387 drivers/phy/broadcom/phy-brcm-sata.c 	brcm_sata_phy_wr(base, PLL_REG_BANK_0, PLL_ACTRL2,
brcm_sata_phy_wr  391 drivers/phy/broadcom/phy-brcm-sata.c 	brcm_sata_phy_wr(base, PLL_REG_BANK_0, PLL_CAP_CONTROL,
brcm_sata_phy_wr  395 drivers/phy/broadcom/phy-brcm-sata.c 	brcm_sata_phy_wr(base, PLL_REG_BANK_0, PLL_REG_BANK_0_PLLCONTROL_0,
brcm_sata_phy_wr  398 drivers/phy/broadcom/phy-brcm-sata.c 	brcm_sata_phy_wr(base, PLL_REG_BANK_0, PLL_REG_BANK_0_PLLCONTROL_0,
brcm_sata_phy_wr  401 drivers/phy/broadcom/phy-brcm-sata.c 	brcm_sata_phy_wr(base, PLL_REG_BANK_0, PLL_REG_BANK_0_PLLCONTROL_0,
brcm_sata_phy_wr  441 drivers/phy/broadcom/phy-brcm-sata.c 	brcm_sata_phy_wr(base, PLL1_REG_BANK, PLL1_ACTRL2, 0x0, val);
brcm_sata_phy_wr  443 drivers/phy/broadcom/phy-brcm-sata.c 	brcm_sata_phy_wr(base, PLL1_REG_BANK, PLL1_ACTRL3, 0x0, val);
brcm_sata_phy_wr  445 drivers/phy/broadcom/phy-brcm-sata.c 	brcm_sata_phy_wr(base, PLL1_REG_BANK, PLL1_ACTRL4, 0x0, val);
brcm_sata_phy_wr  449 drivers/phy/broadcom/phy-brcm-sata.c 	brcm_sata_phy_wr(base, PLL_REG_BANK_0, PLL_ACTRL6, 0x0, val);
brcm_sata_phy_wr  469 drivers/phy/broadcom/phy-brcm-sata.c 	brcm_sata_phy_wr(base, TX_REG_BANK, TX_ACTRL0,
brcm_sata_phy_wr  477 drivers/phy/broadcom/phy-brcm-sata.c 	brcm_sata_phy_wr(base, OOB_REG_BANK, OOB_CTRL1, 0x0, val);
brcm_sata_phy_wr  481 drivers/phy/broadcom/phy-brcm-sata.c 	brcm_sata_phy_wr(base, OOB_REG_BANK, OOB_CTRL2, 0x0, val);
brcm_sata_phy_wr  493 drivers/phy/broadcom/phy-brcm-sata.c 	brcm_sata_phy_wr(base, PLL1_REG_BANK, PLL1_ACTRL7, 0, 0x873);
brcm_sata_phy_wr  495 drivers/phy/broadcom/phy-brcm-sata.c 	brcm_sata_phy_wr(base, PLL1_REG_BANK, PLL1_ACTRL6, 0, 0xc000);
brcm_sata_phy_wr  497 drivers/phy/broadcom/phy-brcm-sata.c 	brcm_sata_phy_wr(base, PLL_REG_BANK_0, PLL_REG_BANK_0_PLLCONTROL_0,
brcm_sata_phy_wr  501 drivers/phy/broadcom/phy-brcm-sata.c 	brcm_sata_phy_wr(base, PLL_REG_BANK_0, PLL_REG_BANK_0_PLLCONTROL_0,
brcm_sata_phy_wr  505 drivers/phy/broadcom/phy-brcm-sata.c 	brcm_sata_phy_wr(base, AEQRX_REG_BANK_1, AEQRX_SLCAL0_CTRL0,
brcm_sata_phy_wr  508 drivers/phy/broadcom/phy-brcm-sata.c 	brcm_sata_phy_wr(base, AEQRX_REG_BANK_1, AEQRX_SLCAL1_CTRL0,
brcm_sata_phy_wr  512 drivers/phy/broadcom/phy-brcm-sata.c 	brcm_sata_phy_wr(base, PLL_REG_BANK_0, PLL_CAP_CHARGE_TIME, 0, 0x32);
brcm_sata_phy_wr  514 drivers/phy/broadcom/phy-brcm-sata.c 	brcm_sata_phy_wr(base, PLL_REG_BANK_0, PLL_VCO_CAL_THRESH, 0, 0xa);
brcm_sata_phy_wr  516 drivers/phy/broadcom/phy-brcm-sata.c 	brcm_sata_phy_wr(base, PLL_REG_BANK_0, PLL_FREQ_DET_TIME, 0, 0x64);
brcm_sata_phy_wr  575 drivers/phy/broadcom/phy-brcm-sata.c 	brcm_sata_phy_wr(base, RXPMD_REG_BANK, RXPMD_RX_FREQ_MON_CONTROL1,