CAYMAN_RING_TYPE_CP1_INDEX 3515 drivers/gpu/drm/radeon/cik.c 	case CAYMAN_RING_TYPE_CP1_INDEX:
CAYMAN_RING_TYPE_CP1_INDEX 4241 drivers/gpu/drm/radeon/cik.c 		cik_compute_stop(rdev,&rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX]);
CAYMAN_RING_TYPE_CP1_INDEX 4246 drivers/gpu/drm/radeon/cik.c 		rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX].ready = false;
CAYMAN_RING_TYPE_CP1_INDEX 4354 drivers/gpu/drm/radeon/cik.c 			idx = CAYMAN_RING_TYPE_CP1_INDEX;
CAYMAN_RING_TYPE_CP1_INDEX 4573 drivers/gpu/drm/radeon/cik.c 			idx = CAYMAN_RING_TYPE_CP1_INDEX;
CAYMAN_RING_TYPE_CP1_INDEX 7080 drivers/gpu/drm/radeon/cik.c 	if (atomic_read(&rdev->irq.ring_int[CAYMAN_RING_TYPE_CP1_INDEX])) {
CAYMAN_RING_TYPE_CP1_INDEX 7081 drivers/gpu/drm/radeon/cik.c 		struct radeon_ring *ring = &rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX];
CAYMAN_RING_TYPE_CP1_INDEX 7555 drivers/gpu/drm/radeon/cik.c 	struct radeon_ring *cp1_ring = &rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX];
CAYMAN_RING_TYPE_CP1_INDEX 7956 drivers/gpu/drm/radeon/cik.c 					radeon_fence_process(rdev, CAYMAN_RING_TYPE_CP1_INDEX);
CAYMAN_RING_TYPE_CP1_INDEX 8365 drivers/gpu/drm/radeon/cik.c 	r = radeon_fence_driver_start_ring(rdev, CAYMAN_RING_TYPE_CP1_INDEX);
CAYMAN_RING_TYPE_CP1_INDEX 8424 drivers/gpu/drm/radeon/cik.c 	ring = &rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX];
CAYMAN_RING_TYPE_CP1_INDEX 8647 drivers/gpu/drm/radeon/cik.c 	ring = &rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX];
CAYMAN_RING_TYPE_CP1_INDEX 4527 drivers/gpu/drm/radeon/evergreen.c 		if (atomic_read(&rdev->irq.ring_int[CAYMAN_RING_TYPE_CP1_INDEX])) {
CAYMAN_RING_TYPE_CP1_INDEX 4871 drivers/gpu/drm/radeon/evergreen.c 					radeon_fence_process(rdev, CAYMAN_RING_TYPE_CP1_INDEX);
CAYMAN_RING_TYPE_CP1_INDEX 1484 drivers/gpu/drm/radeon/ni.c 		else if (ring->idx == CAYMAN_RING_TYPE_CP1_INDEX)
CAYMAN_RING_TYPE_CP1_INDEX 1500 drivers/gpu/drm/radeon/ni.c 	else if (ring->idx == CAYMAN_RING_TYPE_CP1_INDEX)
CAYMAN_RING_TYPE_CP1_INDEX 1514 drivers/gpu/drm/radeon/ni.c 	} else if (ring->idx == CAYMAN_RING_TYPE_CP1_INDEX) {
CAYMAN_RING_TYPE_CP1_INDEX 1628 drivers/gpu/drm/radeon/ni.c 		CAYMAN_RING_TYPE_CP1_INDEX,
CAYMAN_RING_TYPE_CP1_INDEX 1729 drivers/gpu/drm/radeon/ni.c 	rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX].ready = false;
CAYMAN_RING_TYPE_CP1_INDEX 1735 drivers/gpu/drm/radeon/ni.c 		rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX].ready = false;
CAYMAN_RING_TYPE_CP1_INDEX 2215 drivers/gpu/drm/radeon/ni.c 	r = radeon_fence_driver_start_ring(rdev, CAYMAN_RING_TYPE_CP1_INDEX);
CAYMAN_RING_TYPE_CP1_INDEX 1688 drivers/gpu/drm/radeon/radeon_asic.c 		[CAYMAN_RING_TYPE_CP1_INDEX] = &cayman_gfx_ring,
CAYMAN_RING_TYPE_CP1_INDEX 1806 drivers/gpu/drm/radeon/radeon_asic.c 		[CAYMAN_RING_TYPE_CP1_INDEX] = &cayman_gfx_ring,
CAYMAN_RING_TYPE_CP1_INDEX 1944 drivers/gpu/drm/radeon/radeon_asic.c 		[CAYMAN_RING_TYPE_CP1_INDEX] = &si_gfx_ring,
CAYMAN_RING_TYPE_CP1_INDEX 2114 drivers/gpu/drm/radeon/radeon_asic.c 		[CAYMAN_RING_TYPE_CP1_INDEX] = &ci_cp_ring,
CAYMAN_RING_TYPE_CP1_INDEX 2227 drivers/gpu/drm/radeon/radeon_asic.c 		[CAYMAN_RING_TYPE_CP1_INDEX] = &ci_cp_ring,
CAYMAN_RING_TYPE_CP1_INDEX  223 drivers/gpu/drm/radeon/radeon_cs.c 				p->ring = CAYMAN_RING_TYPE_CP1_INDEX;
CAYMAN_RING_TYPE_CP1_INDEX 1049 drivers/gpu/drm/radeon/radeon_fence.c 	case CAYMAN_RING_TYPE_CP1_INDEX: return "radeon.cp1";
CAYMAN_RING_TYPE_CP1_INDEX   66 drivers/gpu/drm/radeon/radeon_ring.c 	case CAYMAN_RING_TYPE_CP1_INDEX:
CAYMAN_RING_TYPE_CP1_INDEX  522 drivers/gpu/drm/radeon/radeon_ring.c static int cayman_cp1_index = CAYMAN_RING_TYPE_CP1_INDEX;
CAYMAN_RING_TYPE_CP1_INDEX 3474 drivers/gpu/drm/radeon/si.c 		rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX].ready = false;
CAYMAN_RING_TYPE_CP1_INDEX 3639 drivers/gpu/drm/radeon/si.c 	ring = &rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX];
CAYMAN_RING_TYPE_CP1_INDEX 3699 drivers/gpu/drm/radeon/si.c 	ring = &rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX];
CAYMAN_RING_TYPE_CP1_INDEX 3748 drivers/gpu/drm/radeon/si.c 	rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX].ready = true;
CAYMAN_RING_TYPE_CP1_INDEX 3753 drivers/gpu/drm/radeon/si.c 		rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX].ready = false;
CAYMAN_RING_TYPE_CP1_INDEX 3757 drivers/gpu/drm/radeon/si.c 	r = radeon_ring_test(rdev, CAYMAN_RING_TYPE_CP1_INDEX, &rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX]);
CAYMAN_RING_TYPE_CP1_INDEX 3759 drivers/gpu/drm/radeon/si.c 		rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX].ready = false;
CAYMAN_RING_TYPE_CP1_INDEX 4764 drivers/gpu/drm/radeon/si.c 				case CAYMAN_RING_TYPE_CP1_INDEX:
CAYMAN_RING_TYPE_CP1_INDEX 6085 drivers/gpu/drm/radeon/si.c 	if (atomic_read(&rdev->irq.ring_int[CAYMAN_RING_TYPE_CP1_INDEX])) {
CAYMAN_RING_TYPE_CP1_INDEX 6389 drivers/gpu/drm/radeon/si.c 			radeon_fence_process(rdev, CAYMAN_RING_TYPE_CP1_INDEX);
CAYMAN_RING_TYPE_CP1_INDEX 6401 drivers/gpu/drm/radeon/si.c 				radeon_fence_process(rdev, CAYMAN_RING_TYPE_CP1_INDEX);
CAYMAN_RING_TYPE_CP1_INDEX 6666 drivers/gpu/drm/radeon/si.c 	r = radeon_fence_driver_start_ring(rdev, CAYMAN_RING_TYPE_CP1_INDEX);
CAYMAN_RING_TYPE_CP1_INDEX 6714 drivers/gpu/drm/radeon/si.c 	ring = &rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX];
CAYMAN_RING_TYPE_CP1_INDEX 6894 drivers/gpu/drm/radeon/si.c 	ring = &rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX];