block_id 31 arch/mips/include/asm/octeon/cvmx-asxx-defs.h #define CVMX_ASXX_GMII_RX_CLK_SET(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000180ull)) block_id 32 arch/mips/include/asm/octeon/cvmx-asxx-defs.h #define CVMX_ASXX_GMII_RX_DAT_SET(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000188ull)) block_id 33 arch/mips/include/asm/octeon/cvmx-asxx-defs.h #define CVMX_ASXX_INT_EN(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000018ull) + ((block_id) & 1) * 0x8000000ull) block_id 34 arch/mips/include/asm/octeon/cvmx-asxx-defs.h #define CVMX_ASXX_INT_REG(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000010ull) + ((block_id) & 1) * 0x8000000ull) block_id 35 arch/mips/include/asm/octeon/cvmx-asxx-defs.h #define CVMX_ASXX_MII_RX_DAT_SET(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000190ull)) block_id 36 arch/mips/include/asm/octeon/cvmx-asxx-defs.h #define CVMX_ASXX_PRT_LOOP(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000040ull) + ((block_id) & 1) * 0x8000000ull) block_id 37 arch/mips/include/asm/octeon/cvmx-asxx-defs.h #define CVMX_ASXX_RLD_BYPASS(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000248ull) + ((block_id) & 1) * 0x8000000ull) block_id 38 arch/mips/include/asm/octeon/cvmx-asxx-defs.h #define CVMX_ASXX_RLD_BYPASS_SETTING(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000250ull) + ((block_id) & 1) * 0x8000000ull) block_id 39 arch/mips/include/asm/octeon/cvmx-asxx-defs.h #define CVMX_ASXX_RLD_COMP(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000220ull) + ((block_id) & 1) * 0x8000000ull) block_id 40 arch/mips/include/asm/octeon/cvmx-asxx-defs.h #define CVMX_ASXX_RLD_DATA_DRV(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000218ull) + ((block_id) & 1) * 0x8000000ull) block_id 41 arch/mips/include/asm/octeon/cvmx-asxx-defs.h #define CVMX_ASXX_RLD_FCRAM_MODE(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000210ull) + ((block_id) & 1) * 0x8000000ull) block_id 42 arch/mips/include/asm/octeon/cvmx-asxx-defs.h #define CVMX_ASXX_RLD_NCTL_STRONG(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000230ull) + ((block_id) & 1) * 0x8000000ull) block_id 43 arch/mips/include/asm/octeon/cvmx-asxx-defs.h #define CVMX_ASXX_RLD_NCTL_WEAK(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000240ull) + ((block_id) & 1) * 0x8000000ull) block_id 44 arch/mips/include/asm/octeon/cvmx-asxx-defs.h #define CVMX_ASXX_RLD_PCTL_STRONG(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000228ull) + ((block_id) & 1) * 0x8000000ull) block_id 45 arch/mips/include/asm/octeon/cvmx-asxx-defs.h #define CVMX_ASXX_RLD_PCTL_WEAK(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000238ull) + ((block_id) & 1) * 0x8000000ull) block_id 46 arch/mips/include/asm/octeon/cvmx-asxx-defs.h #define CVMX_ASXX_RLD_SETTING(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000258ull) + ((block_id) & 1) * 0x8000000ull) block_id 47 arch/mips/include/asm/octeon/cvmx-asxx-defs.h #define CVMX_ASXX_RX_CLK_SETX(offset, block_id) (CVMX_ADD_IO_SEG(0x00011800B0000020ull) + (((offset) & 3) + ((block_id) & 1) * 0x1000000ull) * 8) block_id 48 arch/mips/include/asm/octeon/cvmx-asxx-defs.h #define CVMX_ASXX_RX_PRT_EN(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000000ull) + ((block_id) & 1) * 0x8000000ull) block_id 49 arch/mips/include/asm/octeon/cvmx-asxx-defs.h #define CVMX_ASXX_RX_WOL(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000100ull) + ((block_id) & 1) * 0x8000000ull) block_id 50 arch/mips/include/asm/octeon/cvmx-asxx-defs.h #define CVMX_ASXX_RX_WOL_MSK(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000108ull) + ((block_id) & 1) * 0x8000000ull) block_id 51 arch/mips/include/asm/octeon/cvmx-asxx-defs.h #define CVMX_ASXX_RX_WOL_POWOK(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000118ull) + ((block_id) & 1) * 0x8000000ull) block_id 52 arch/mips/include/asm/octeon/cvmx-asxx-defs.h #define CVMX_ASXX_RX_WOL_SIG(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000110ull) + ((block_id) & 1) * 0x8000000ull) block_id 53 arch/mips/include/asm/octeon/cvmx-asxx-defs.h #define CVMX_ASXX_TX_CLK_SETX(offset, block_id) (CVMX_ADD_IO_SEG(0x00011800B0000048ull) + (((offset) & 3) + ((block_id) & 1) * 0x1000000ull) * 8) block_id 54 arch/mips/include/asm/octeon/cvmx-asxx-defs.h #define CVMX_ASXX_TX_COMP_BYP(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000068ull) + ((block_id) & 1) * 0x8000000ull) block_id 55 arch/mips/include/asm/octeon/cvmx-asxx-defs.h #define CVMX_ASXX_TX_HI_WATERX(offset, block_id) (CVMX_ADD_IO_SEG(0x00011800B0000080ull) + (((offset) & 3) + ((block_id) & 1) * 0x1000000ull) * 8) block_id 56 arch/mips/include/asm/octeon/cvmx-asxx-defs.h #define CVMX_ASXX_TX_PRT_EN(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000008ull) + ((block_id) & 1) * 0x8000000ull) block_id 31 arch/mips/include/asm/octeon/cvmx-ciu2-defs.h #define CVMX_CIU2_ACK_PPX_IP2(block_id) (CVMX_ADD_IO_SEG(0x00010701000C0000ull) + ((block_id) & 31) * 0x200000ull) block_id 32 arch/mips/include/asm/octeon/cvmx-ciu2-defs.h #define CVMX_CIU2_ACK_PPX_IP3(block_id) (CVMX_ADD_IO_SEG(0x00010701000C0200ull) + ((block_id) & 31) * 0x200000ull) block_id 33 arch/mips/include/asm/octeon/cvmx-ciu2-defs.h #define CVMX_CIU2_EN_PPX_IP2_RML(block_id) (CVMX_ADD_IO_SEG(0x0001070100092000ull) + ((block_id) & 31) * 0x200000ull) block_id 34 arch/mips/include/asm/octeon/cvmx-ciu2-defs.h #define CVMX_CIU2_EN_PPX_IP2_WDOG(block_id) (CVMX_ADD_IO_SEG(0x0001070100091000ull) + ((block_id) & 31) * 0x200000ull) block_id 35 arch/mips/include/asm/octeon/cvmx-ciu2-defs.h #define CVMX_CIU2_EN_PPX_IP2_WRKQ(block_id) (CVMX_ADD_IO_SEG(0x0001070100090000ull) + ((block_id) & 31) * 0x200000ull) block_id 36 arch/mips/include/asm/octeon/cvmx-ciu2-defs.h #define CVMX_CIU2_EN_PPX_IP2_WRKQ_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B0000ull) + ((block_id) & 31) * 0x200000ull) block_id 37 arch/mips/include/asm/octeon/cvmx-ciu2-defs.h #define CVMX_CIU2_EN_PPX_IP2_WRKQ_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A0000ull) + ((block_id) & 31) * 0x200000ull) block_id 38 arch/mips/include/asm/octeon/cvmx-ciu2-defs.h #define CVMX_CIU2_EN_PPX_IP3_MBOX_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B8200ull) + ((block_id) & 31) * 0x200000ull) block_id 39 arch/mips/include/asm/octeon/cvmx-ciu2-defs.h #define CVMX_CIU2_EN_PPX_IP3_MBOX_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A8200ull) + ((block_id) & 31) * 0x200000ull) block_id 41 arch/mips/include/asm/octeon/cvmx-ciu2-defs.h #define CVMX_CIU2_RAW_PPX_IP2_WRKQ(block_id) (CVMX_ADD_IO_SEG(0x0001070100040000ull) + ((block_id) & 31) * 0x200000ull) block_id 42 arch/mips/include/asm/octeon/cvmx-ciu2-defs.h #define CVMX_CIU2_SRC_PPX_IP2_RML(block_id) (CVMX_ADD_IO_SEG(0x0001070100082000ull) + ((block_id) & 31) * 0x200000ull) block_id 43 arch/mips/include/asm/octeon/cvmx-ciu2-defs.h #define CVMX_CIU2_SRC_PPX_IP2_WDOG(block_id) (CVMX_ADD_IO_SEG(0x0001070100081000ull) + ((block_id) & 31) * 0x200000ull) block_id 44 arch/mips/include/asm/octeon/cvmx-ciu2-defs.h #define CVMX_CIU2_SRC_PPX_IP2_WRKQ(block_id) (CVMX_ADD_IO_SEG(0x0001070100080000ull) + ((block_id) & 31) * 0x200000ull) block_id 28 arch/mips/include/asm/octeon/cvmx-ciu3-defs.h #define CVMX_CIU3_IDTX_PPX(offset, block_id) (CVMX_ADD_IO_SEG(0x0001010000120000ull) + ((block_id) & 255) * 0x20ull) block_id 48 arch/mips/include/asm/octeon/cvmx-dpi-defs.h #define CVMX_DPI_NCBX_CFG(block_id) (CVMX_ADD_IO_SEG(0x0001DF0000000800ull)) block_id 31 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h static inline uint64_t CVMX_GMXX_HG2_CONTROL(unsigned long block_id) block_id 35 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000550ull) + (block_id) * 0x1000000ull; block_id 37 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000550ull) + (block_id) * 0x8000000ull; block_id 40 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h static inline uint64_t CVMX_GMXX_INF_MODE(unsigned long block_id) block_id 44 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x00011800080007F8ull) + (block_id) * 0x1000000ull; block_id 46 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x00011800080007F8ull) + (block_id) * 0x8000000ull; block_id 49 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h static inline uint64_t CVMX_GMXX_PRTX_CFG(unsigned long offset, unsigned long block_id) block_id 53 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000010ull) + ((offset) + (block_id) * 0x0ull) * 2048; block_id 55 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000010ull) + ((offset) + (block_id) * 0x2000ull) * 2048; block_id 57 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000010ull) + ((offset) + (block_id) * 0x10000ull) * 2048; block_id 60 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h static inline uint64_t CVMX_GMXX_RXX_ADR_CAM0(unsigned long offset, unsigned long block_id) block_id 64 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000180ull) + ((offset) + (block_id) * 0x0ull) * 2048; block_id 66 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000180ull) + ((offset) + (block_id) * 0x2000ull) * 2048; block_id 68 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000180ull) + ((offset) + (block_id) * 0x10000ull) * 2048; block_id 71 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h static inline uint64_t CVMX_GMXX_RXX_ADR_CAM1(unsigned long offset, unsigned long block_id) block_id 75 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000188ull) + ((offset) + (block_id) * 0x0ull) * 2048; block_id 77 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000188ull) + ((offset) + (block_id) * 0x2000ull) * 2048; block_id 79 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000188ull) + ((offset) + (block_id) * 0x10000ull) * 2048; block_id 82 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h static inline uint64_t CVMX_GMXX_RXX_ADR_CAM2(unsigned long offset, unsigned long block_id) block_id 86 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000190ull) + ((offset) + (block_id) * 0x0ull) * 2048; block_id 88 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000190ull) + ((offset) + (block_id) * 0x2000ull) * 2048; block_id 90 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000190ull) + ((offset) + (block_id) * 0x10000ull) * 2048; block_id 93 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h static inline uint64_t CVMX_GMXX_RXX_ADR_CAM3(unsigned long offset, unsigned long block_id) block_id 97 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000198ull) + ((offset) + (block_id) * 0x0ull) * 2048; block_id 99 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000198ull) + ((offset) + (block_id) * 0x2000ull) * 2048; block_id 101 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000198ull) + ((offset) + (block_id) * 0x10000ull) * 2048; block_id 104 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h static inline uint64_t CVMX_GMXX_RXX_ADR_CAM4(unsigned long offset, unsigned long block_id) block_id 108 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x00011800080001A0ull) + ((offset) + (block_id) * 0x0ull) * 2048; block_id 110 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x00011800080001A0ull) + ((offset) + (block_id) * 0x2000ull) * 2048; block_id 112 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x00011800080001A0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; block_id 115 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h static inline uint64_t CVMX_GMXX_RXX_ADR_CAM5(unsigned long offset, unsigned long block_id) block_id 119 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x00011800080001A8ull) + ((offset) + (block_id) * 0x0ull) * 2048; block_id 121 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x00011800080001A8ull) + ((offset) + (block_id) * 0x2000ull) * 2048; block_id 123 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x00011800080001A8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; block_id 126 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h static inline uint64_t CVMX_GMXX_RXX_ADR_CAM_EN(unsigned long offset, unsigned long block_id) block_id 130 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000108ull) + ((offset) + (block_id) * 0x0ull) * 2048; block_id 132 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000108ull) + ((offset) + (block_id) * 0x2000ull) * 2048; block_id 134 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000108ull) + ((offset) + (block_id) * 0x10000ull) * 2048; block_id 137 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h static inline uint64_t CVMX_GMXX_RXX_ADR_CTL(unsigned long offset, unsigned long block_id) block_id 141 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000100ull) + ((offset) + (block_id) * 0x0ull) * 2048; block_id 143 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000100ull) + ((offset) + (block_id) * 0x2000ull) * 2048; block_id 145 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000100ull) + ((offset) + (block_id) * 0x10000ull) * 2048; block_id 148 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h static inline uint64_t CVMX_GMXX_RXX_FRM_CTL(unsigned long offset, unsigned long block_id) block_id 152 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000018ull) + ((offset) + (block_id) * 0x0ull) * 2048; block_id 154 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000018ull) + ((offset) + (block_id) * 0x2000ull) * 2048; block_id 156 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000018ull) + ((offset) + (block_id) * 0x10000ull) * 2048; block_id 159 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h #define CVMX_GMXX_RXX_FRM_MAX(offset, block_id) (CVMX_ADD_IO_SEG(0x0001180008000030ull) + (((offset) & 3) + ((block_id) & 1) * 0x10000ull) * 2048) block_id 160 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h #define CVMX_GMXX_RXX_FRM_MIN(offset, block_id) (CVMX_ADD_IO_SEG(0x0001180008000028ull) + (((offset) & 3) + ((block_id) & 1) * 0x10000ull) * 2048) block_id 162 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h static inline uint64_t CVMX_GMXX_RXX_INT_EN(unsigned long offset, unsigned long block_id) block_id 166 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000008ull) + ((offset) + (block_id) * 0x0ull) * 2048; block_id 168 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000008ull) + ((offset) + (block_id) * 0x2000ull) * 2048; block_id 170 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000008ull) + ((offset) + (block_id) * 0x10000ull) * 2048; block_id 173 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h static inline uint64_t CVMX_GMXX_RXX_INT_REG(unsigned long offset, unsigned long block_id) block_id 177 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000000ull) + ((offset) + (block_id) * 0x0ull) * 2048; block_id 179 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000000ull) + ((offset) + (block_id) * 0x2000ull) * 2048; block_id 181 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000000ull) + ((offset) + (block_id) * 0x10000ull) * 2048; block_id 184 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h static inline uint64_t CVMX_GMXX_RXX_JABBER(unsigned long offset, unsigned long block_id) block_id 188 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000038ull) + ((offset) + (block_id) * 0x0ull) * 2048; block_id 190 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000038ull) + ((offset) + (block_id) * 0x2000ull) * 2048; block_id 192 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000038ull) + ((offset) + (block_id) * 0x10000ull) * 2048; block_id 195 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h #define CVMX_GMXX_RXX_RX_INBND(offset, block_id) (CVMX_ADD_IO_SEG(0x0001180008000060ull) + (((offset) & 3) + ((block_id) & 1) * 0x10000ull) * 2048) block_id 197 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h static inline uint64_t CVMX_GMXX_RX_PRTS(unsigned long block_id) block_id 201 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000410ull) + (block_id) * 0x1000000ull; block_id 203 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000410ull) + (block_id) * 0x8000000ull; block_id 206 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h static inline uint64_t CVMX_GMXX_RX_XAUI_CTL(unsigned long block_id) block_id 210 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000530ull) + (block_id) * 0x1000000ull; block_id 212 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000530ull) + (block_id) * 0x8000000ull; block_id 215 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h static inline uint64_t CVMX_GMXX_SMACX(unsigned long offset, unsigned long block_id) block_id 219 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000230ull) + ((offset) + (block_id) * 0x0ull) * 2048; block_id 221 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000230ull) + ((offset) + (block_id) * 0x2000ull) * 2048; block_id 223 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000230ull) + ((offset) + (block_id) * 0x10000ull) * 2048; block_id 226 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h static inline uint64_t CVMX_GMXX_TXX_BURST(unsigned long offset, unsigned long block_id) block_id 230 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000228ull) + ((offset) + (block_id) * 0x0ull) * 2048; block_id 232 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000228ull) + ((offset) + (block_id) * 0x2000ull) * 2048; block_id 234 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000228ull) + ((offset) + (block_id) * 0x10000ull) * 2048; block_id 237 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h #define CVMX_GMXX_TXX_CLK(offset, block_id) (CVMX_ADD_IO_SEG(0x0001180008000208ull) + (((offset) & 3) + ((block_id) & 1) * 0x10000ull) * 2048) block_id 238 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h static inline uint64_t CVMX_GMXX_TXX_CTL(unsigned long offset, unsigned long block_id) block_id 242 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000270ull) + ((offset) + (block_id) * 0x0ull) * 2048; block_id 244 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000270ull) + ((offset) + (block_id) * 0x2000ull) * 2048; block_id 246 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000270ull) + ((offset) + (block_id) * 0x10000ull) * 2048; block_id 249 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h static inline uint64_t CVMX_GMXX_TXX_PAUSE_PKT_INTERVAL(unsigned long offset, unsigned long block_id) block_id 253 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000248ull) + ((offset) + (block_id) * 0x0ull) * 2048; block_id 255 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000248ull) + ((offset) + (block_id) * 0x2000ull) * 2048; block_id 257 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000248ull) + ((offset) + (block_id) * 0x10000ull) * 2048; block_id 260 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h static inline uint64_t CVMX_GMXX_TXX_PAUSE_PKT_TIME(unsigned long offset, unsigned long block_id) block_id 264 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000238ull) + ((offset) + (block_id) * 0x0ull) * 2048; block_id 266 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000238ull) + ((offset) + (block_id) * 0x2000ull) * 2048; block_id 268 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000238ull) + ((offset) + (block_id) * 0x10000ull) * 2048; block_id 271 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h static inline uint64_t CVMX_GMXX_TXX_SLOT(unsigned long offset, unsigned long block_id) block_id 275 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000220ull) + ((offset) + (block_id) * 0x0ull) * 2048; block_id 277 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000220ull) + ((offset) + (block_id) * 0x2000ull) * 2048; block_id 279 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000220ull) + ((offset) + (block_id) * 0x10000ull) * 2048; block_id 282 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h static inline uint64_t CVMX_GMXX_TXX_THRESH(unsigned long offset, unsigned long block_id) block_id 286 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000210ull) + ((offset) + (block_id) * 0x0ull) * 2048; block_id 288 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000210ull) + ((offset) + (block_id) * 0x2000ull) * 2048; block_id 290 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000210ull) + ((offset) + (block_id) * 0x10000ull) * 2048; block_id 293 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h static inline uint64_t CVMX_GMXX_TX_INT_EN(unsigned long block_id) block_id 297 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000508ull) + (block_id) * 0x1000000ull; block_id 299 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000508ull) + (block_id) * 0x8000000ull; block_id 302 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h static inline uint64_t CVMX_GMXX_TX_INT_REG(unsigned long block_id) block_id 306 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000500ull) + (block_id) * 0x1000000ull; block_id 308 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000500ull) + (block_id) * 0x8000000ull; block_id 311 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h static inline uint64_t CVMX_GMXX_TX_OVR_BP(unsigned long block_id) block_id 315 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x00011800080004C8ull) + (block_id) * 0x1000000ull; block_id 317 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x00011800080004C8ull) + (block_id) * 0x8000000ull; block_id 320 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h static inline uint64_t CVMX_GMXX_TX_PRTS(unsigned long block_id) block_id 324 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000480ull) + (block_id) * 0x1000000ull; block_id 326 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000480ull) + (block_id) * 0x8000000ull; block_id 329 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h #define CVMX_GMXX_TX_SPI_CTL(block_id) (CVMX_ADD_IO_SEG(0x00011800080004C0ull) + ((block_id) & 1) * 0x8000000ull) block_id 330 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h #define CVMX_GMXX_TX_SPI_MAX(block_id) (CVMX_ADD_IO_SEG(0x00011800080004B0ull) + ((block_id) & 1) * 0x8000000ull) block_id 331 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h #define CVMX_GMXX_TX_SPI_THRESH(block_id) (CVMX_ADD_IO_SEG(0x00011800080004B8ull) + ((block_id) & 1) * 0x8000000ull) block_id 332 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h static inline uint64_t CVMX_GMXX_TX_XAUI_CTL(unsigned long block_id) block_id 336 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000528ull) + (block_id) * 0x1000000ull; block_id 338 arch/mips/include/asm/octeon/cvmx-gmxx-defs.h return CVMX_ADD_IO_SEG(0x0001180008000528ull) + (block_id) * 0x8000000ull; block_id 50 arch/mips/include/asm/octeon/cvmx-ipd-defs.h #define CVMX_IPD_ON_BP_DROP_PKTX(block_id) (CVMX_ADD_IO_SEG(0x00014F0000004100ull)) block_id 65 arch/mips/include/asm/octeon/cvmx-ipd-defs.h #define CVMX_IPD_PORT_SOPX(block_id) (CVMX_ADD_IO_SEG(0x00014F0000004400ull)) block_id 80 arch/mips/include/asm/octeon/cvmx-ipd-defs.h #define CVMX_IPD_RED_BPID_ENABLEX(block_id) (CVMX_ADD_IO_SEG(0x00014F0000004200ull)) block_id 36 arch/mips/include/asm/octeon/cvmx-l2c-defs.h #define CVMX_L2C_ERR_TDTX(block_id) \ block_id 37 arch/mips/include/asm/octeon/cvmx-l2c-defs.h (CVMX_ADD_IO_SEG(0x0001180080A007E0ull) + ((block_id) & 3) * 0x40000ull) block_id 38 arch/mips/include/asm/octeon/cvmx-l2c-defs.h #define CVMX_L2C_ERR_TTGX(block_id) \ block_id 39 arch/mips/include/asm/octeon/cvmx-l2c-defs.h (CVMX_ADD_IO_SEG(0x0001180080A007E8ull) + ((block_id) & 3) * 0x40000ull) block_id 54 arch/mips/include/asm/octeon/cvmx-l2c-defs.h #define CVMX_L2C_TADX_PFCX(offset, block_id) \ block_id 56 arch/mips/include/asm/octeon/cvmx-l2c-defs.h ((block_id) & 7) * 0x8000ull) * 8) block_id 57 arch/mips/include/asm/octeon/cvmx-l2c-defs.h #define CVMX_L2C_TADX_PFC0(block_id) (CVMX_ADD_IO_SEG(0x0001180080A00400ull) + \ block_id 58 arch/mips/include/asm/octeon/cvmx-l2c-defs.h ((block_id) & 3) * 0x40000ull) block_id 59 arch/mips/include/asm/octeon/cvmx-l2c-defs.h #define CVMX_L2C_TADX_PFC1(block_id) (CVMX_ADD_IO_SEG(0x0001180080A00408ull) + \ block_id 60 arch/mips/include/asm/octeon/cvmx-l2c-defs.h ((block_id) & 3) * 0x40000ull) block_id 61 arch/mips/include/asm/octeon/cvmx-l2c-defs.h #define CVMX_L2C_TADX_PFC2(block_id) (CVMX_ADD_IO_SEG(0x0001180080A00410ull) + \ block_id 62 arch/mips/include/asm/octeon/cvmx-l2c-defs.h ((block_id) & 3) * 0x40000ull) block_id 63 arch/mips/include/asm/octeon/cvmx-l2c-defs.h #define CVMX_L2C_TADX_PFC3(block_id) (CVMX_ADD_IO_SEG(0x0001180080A00418ull) + \ block_id 64 arch/mips/include/asm/octeon/cvmx-l2c-defs.h ((block_id) & 3) * 0x40000ull) block_id 67 arch/mips/include/asm/octeon/cvmx-l2c-defs.h #define CVMX_L2C_TADX_TAG(block_id) (CVMX_ADD_IO_SEG(0x0001180080A00010ull) + \ block_id 68 arch/mips/include/asm/octeon/cvmx-l2c-defs.h ((block_id) & 3) * 0x40000ull) block_id 31 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_BIST_CTL(block_id) (CVMX_ADD_IO_SEG(0x00011800880000F0ull) + ((block_id) & 1) * 0x60000000ull) block_id 32 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_BIST_RESULT(block_id) (CVMX_ADD_IO_SEG(0x00011800880000F8ull) + ((block_id) & 1) * 0x60000000ull) block_id 33 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_CHAR_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180088000220ull) + ((block_id) & 3) * 0x1000000ull) block_id 34 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_CHAR_MASK0(block_id) (CVMX_ADD_IO_SEG(0x0001180088000228ull) + ((block_id) & 3) * 0x1000000ull) block_id 35 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_CHAR_MASK1(block_id) (CVMX_ADD_IO_SEG(0x0001180088000230ull) + ((block_id) & 3) * 0x1000000ull) block_id 36 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_CHAR_MASK2(block_id) (CVMX_ADD_IO_SEG(0x0001180088000238ull) + ((block_id) & 3) * 0x1000000ull) block_id 37 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_CHAR_MASK3(block_id) (CVMX_ADD_IO_SEG(0x0001180088000240ull) + ((block_id) & 3) * 0x1000000ull) block_id 38 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_CHAR_MASK4(block_id) (CVMX_ADD_IO_SEG(0x0001180088000318ull) + ((block_id) & 3) * 0x1000000ull) block_id 39 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_COMP_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180088000028ull) + ((block_id) & 1) * 0x60000000ull) block_id 40 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_COMP_CTL2(block_id) (CVMX_ADD_IO_SEG(0x00011800880001B8ull) + ((block_id) & 3) * 0x1000000ull) block_id 41 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_CONFIG(block_id) (CVMX_ADD_IO_SEG(0x0001180088000188ull) + ((block_id) & 3) * 0x1000000ull) block_id 42 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_CONTROL(block_id) (CVMX_ADD_IO_SEG(0x0001180088000190ull) + ((block_id) & 3) * 0x1000000ull) block_id 43 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180088000010ull) + ((block_id) & 1) * 0x60000000ull) block_id 44 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_CTL1(block_id) (CVMX_ADD_IO_SEG(0x0001180088000090ull) + ((block_id) & 1) * 0x60000000ull) block_id 45 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_DCLK_CNT(block_id) (CVMX_ADD_IO_SEG(0x00011800880001E0ull) + ((block_id) & 3) * 0x1000000ull) block_id 46 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_DCLK_CNT_HI(block_id) (CVMX_ADD_IO_SEG(0x0001180088000070ull) + ((block_id) & 1) * 0x60000000ull) block_id 47 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_DCLK_CNT_LO(block_id) (CVMX_ADD_IO_SEG(0x0001180088000068ull) + ((block_id) & 1) * 0x60000000ull) block_id 48 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_DCLK_CTL(block_id) (CVMX_ADD_IO_SEG(0x00011800880000B8ull) + ((block_id) & 1) * 0x60000000ull) block_id 49 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_DDR2_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180088000018ull) + ((block_id) & 1) * 0x60000000ull) block_id 50 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_DDR_PLL_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180088000258ull) + ((block_id) & 3) * 0x1000000ull) block_id 51 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_DELAY_CFG(block_id) (CVMX_ADD_IO_SEG(0x0001180088000088ull) + ((block_id) & 1) * 0x60000000ull) block_id 52 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_DIMMX_PARAMS(offset, block_id) (CVMX_ADD_IO_SEG(0x0001180088000270ull) + (((offset) & 1) + ((block_id) & 3) * 0x200000ull) * 8) block_id 53 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_DIMM_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180088000310ull) + ((block_id) & 3) * 0x1000000ull) block_id 54 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_DLL_CTL(block_id) (CVMX_ADD_IO_SEG(0x00011800880000C0ull) + ((block_id) & 1) * 0x60000000ull) block_id 55 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_DLL_CTL2(block_id) (CVMX_ADD_IO_SEG(0x00011800880001C8ull) + ((block_id) & 3) * 0x1000000ull) block_id 56 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_DLL_CTL3(block_id) (CVMX_ADD_IO_SEG(0x0001180088000218ull) + ((block_id) & 3) * 0x1000000ull) block_id 57 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h static inline uint64_t CVMX_LMCX_DUAL_MEMCFG(unsigned long block_id) block_id 67 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h return CVMX_ADD_IO_SEG(0x0001180088000098ull) + (block_id) * 0x60000000ull; block_id 69 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h return CVMX_ADD_IO_SEG(0x0001180088000098ull) + (block_id) * 0x60000000ull; block_id 71 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h return CVMX_ADD_IO_SEG(0x0001180088000098ull) + (block_id) * 0x1000000ull; block_id 73 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h return CVMX_ADD_IO_SEG(0x0001180088000098ull) + (block_id) * 0x60000000ull; block_id 76 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h static inline uint64_t CVMX_LMCX_ECC_SYND(unsigned long block_id) block_id 89 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h return CVMX_ADD_IO_SEG(0x0001180088000038ull) + (block_id) * 0x60000000ull; block_id 91 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h return CVMX_ADD_IO_SEG(0x0001180088000038ull) + (block_id) * 0x60000000ull; block_id 93 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h return CVMX_ADD_IO_SEG(0x0001180088000038ull) + (block_id) * 0x1000000ull; block_id 95 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h return CVMX_ADD_IO_SEG(0x0001180088000038ull) + (block_id) * 0x60000000ull; block_id 98 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h static inline uint64_t CVMX_LMCX_FADR(unsigned long block_id) block_id 111 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h return CVMX_ADD_IO_SEG(0x0001180088000020ull) + (block_id) * 0x60000000ull; block_id 113 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h return CVMX_ADD_IO_SEG(0x0001180088000020ull) + (block_id) * 0x60000000ull; block_id 115 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h return CVMX_ADD_IO_SEG(0x0001180088000020ull) + (block_id) * 0x1000000ull; block_id 117 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h return CVMX_ADD_IO_SEG(0x0001180088000020ull) + (block_id) * 0x60000000ull; block_id 120 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_IFB_CNT(block_id) (CVMX_ADD_IO_SEG(0x00011800880001D0ull) + ((block_id) & 3) * 0x1000000ull) block_id 121 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_IFB_CNT_HI(block_id) (CVMX_ADD_IO_SEG(0x0001180088000050ull) + ((block_id) & 1) * 0x60000000ull) block_id 122 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_IFB_CNT_LO(block_id) (CVMX_ADD_IO_SEG(0x0001180088000048ull) + ((block_id) & 1) * 0x60000000ull) block_id 123 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_INT(block_id) (CVMX_ADD_IO_SEG(0x00011800880001F0ull) + ((block_id) & 3) * 0x1000000ull) block_id 124 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_INT_EN(block_id) (CVMX_ADD_IO_SEG(0x00011800880001E8ull) + ((block_id) & 3) * 0x1000000ull) block_id 125 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_MEM_CFG0(block_id) (CVMX_ADD_IO_SEG(0x0001180088000000ull) + ((block_id) & 1) * 0x60000000ull) block_id 126 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_MEM_CFG1(block_id) (CVMX_ADD_IO_SEG(0x0001180088000008ull) + ((block_id) & 1) * 0x60000000ull) block_id 127 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_MODEREG_PARAMS0(block_id) (CVMX_ADD_IO_SEG(0x00011800880001A8ull) + ((block_id) & 3) * 0x1000000ull) block_id 128 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_MODEREG_PARAMS1(block_id) (CVMX_ADD_IO_SEG(0x0001180088000260ull) + ((block_id) & 3) * 0x1000000ull) block_id 129 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h static inline uint64_t CVMX_LMCX_NXM(unsigned long block_id) block_id 138 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h return CVMX_ADD_IO_SEG(0x00011800880000C8ull) + (block_id) * 0x60000000ull; block_id 140 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h return CVMX_ADD_IO_SEG(0x00011800880000C8ull) + (block_id) * 0x60000000ull; block_id 142 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h return CVMX_ADD_IO_SEG(0x00011800880000C8ull) + (block_id) * 0x1000000ull; block_id 144 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h return CVMX_ADD_IO_SEG(0x00011800880000C8ull) + (block_id) * 0x60000000ull; block_id 147 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_OPS_CNT(block_id) (CVMX_ADD_IO_SEG(0x00011800880001D8ull) + ((block_id) & 3) * 0x1000000ull) block_id 148 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_OPS_CNT_HI(block_id) (CVMX_ADD_IO_SEG(0x0001180088000060ull) + ((block_id) & 1) * 0x60000000ull) block_id 149 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_OPS_CNT_LO(block_id) (CVMX_ADD_IO_SEG(0x0001180088000058ull) + ((block_id) & 1) * 0x60000000ull) block_id 150 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_PHY_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180088000210ull) + ((block_id) & 3) * 0x1000000ull) block_id 151 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_PLL_BWCTL(block_id) (CVMX_ADD_IO_SEG(0x0001180088000040ull)) block_id 152 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_PLL_CTL(block_id) (CVMX_ADD_IO_SEG(0x00011800880000A8ull) + ((block_id) & 1) * 0x60000000ull) block_id 153 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_PLL_STATUS(block_id) (CVMX_ADD_IO_SEG(0x00011800880000B0ull) + ((block_id) & 1) * 0x60000000ull) block_id 154 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_READ_LEVEL_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180088000140ull) + ((block_id) & 1) * 0x60000000ull) block_id 155 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_READ_LEVEL_DBG(block_id) (CVMX_ADD_IO_SEG(0x0001180088000148ull) + ((block_id) & 1) * 0x60000000ull) block_id 156 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_READ_LEVEL_RANKX(offset, block_id) (CVMX_ADD_IO_SEG(0x0001180088000100ull) + (((offset) & 3) + ((block_id) & 1) * 0xC000000ull) * 8) block_id 157 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_RESET_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180088000180ull) + ((block_id) & 3) * 0x1000000ull) block_id 158 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_RLEVEL_CTL(block_id) (CVMX_ADD_IO_SEG(0x00011800880002A0ull) + ((block_id) & 3) * 0x1000000ull) block_id 159 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_RLEVEL_DBG(block_id) (CVMX_ADD_IO_SEG(0x00011800880002A8ull) + ((block_id) & 3) * 0x1000000ull) block_id 160 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_RLEVEL_RANKX(offset, block_id) (CVMX_ADD_IO_SEG(0x0001180088000280ull) + (((offset) & 3) + ((block_id) & 3) * 0x200000ull) * 8) block_id 161 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_RODT_COMP_CTL(block_id) (CVMX_ADD_IO_SEG(0x00011800880000A0ull) + ((block_id) & 1) * 0x60000000ull) block_id 162 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_RODT_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180088000078ull) + ((block_id) & 1) * 0x60000000ull) block_id 163 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_RODT_MASK(block_id) (CVMX_ADD_IO_SEG(0x0001180088000268ull) + ((block_id) & 3) * 0x1000000ull) block_id 164 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_SCRAMBLED_FADR(block_id) (CVMX_ADD_IO_SEG(0x0001180088000330ull)) block_id 165 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_SCRAMBLE_CFG0(block_id) (CVMX_ADD_IO_SEG(0x0001180088000320ull)) block_id 166 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_SCRAMBLE_CFG1(block_id) (CVMX_ADD_IO_SEG(0x0001180088000328ull)) block_id 167 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_SLOT_CTL0(block_id) (CVMX_ADD_IO_SEG(0x00011800880001F8ull) + ((block_id) & 3) * 0x1000000ull) block_id 168 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_SLOT_CTL1(block_id) (CVMX_ADD_IO_SEG(0x0001180088000200ull) + ((block_id) & 3) * 0x1000000ull) block_id 169 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_SLOT_CTL2(block_id) (CVMX_ADD_IO_SEG(0x0001180088000208ull) + ((block_id) & 3) * 0x1000000ull) block_id 170 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_TIMING_PARAMS0(block_id) (CVMX_ADD_IO_SEG(0x0001180088000198ull) + ((block_id) & 3) * 0x1000000ull) block_id 171 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_TIMING_PARAMS1(block_id) (CVMX_ADD_IO_SEG(0x00011800880001A0ull) + ((block_id) & 3) * 0x1000000ull) block_id 172 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_TRO_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180088000248ull) + ((block_id) & 3) * 0x1000000ull) block_id 173 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_TRO_STAT(block_id) (CVMX_ADD_IO_SEG(0x0001180088000250ull) + ((block_id) & 3) * 0x1000000ull) block_id 174 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_WLEVEL_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180088000300ull) + ((block_id) & 3) * 0x1000000ull) block_id 175 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_WLEVEL_DBG(block_id) (CVMX_ADD_IO_SEG(0x0001180088000308ull) + ((block_id) & 3) * 0x1000000ull) block_id 176 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_WLEVEL_RANKX(offset, block_id) (CVMX_ADD_IO_SEG(0x00011800880002B0ull) + (((offset) & 3) + ((block_id) & 3) * 0x200000ull) * 8) block_id 177 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_WODT_CTL0(block_id) (CVMX_ADD_IO_SEG(0x0001180088000030ull) + ((block_id) & 1) * 0x60000000ull) block_id 178 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_WODT_CTL1(block_id) (CVMX_ADD_IO_SEG(0x0001180088000080ull) + ((block_id) & 1) * 0x60000000ull) block_id 179 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h #define CVMX_LMCX_WODT_MASK(block_id) (CVMX_ADD_IO_SEG(0x00011800880001B0ull) + ((block_id) & 3) * 0x1000000ull) block_id 33 arch/mips/include/asm/octeon/cvmx-pciercx-defs.h #define CVMX_PCIERCX_CFG001(block_id) (0x0000000000000004ull) block_id 34 arch/mips/include/asm/octeon/cvmx-pciercx-defs.h #define CVMX_PCIERCX_CFG006(block_id) (0x0000000000000018ull) block_id 35 arch/mips/include/asm/octeon/cvmx-pciercx-defs.h #define CVMX_PCIERCX_CFG008(block_id) (0x0000000000000020ull) block_id 36 arch/mips/include/asm/octeon/cvmx-pciercx-defs.h #define CVMX_PCIERCX_CFG009(block_id) (0x0000000000000024ull) block_id 37 arch/mips/include/asm/octeon/cvmx-pciercx-defs.h #define CVMX_PCIERCX_CFG010(block_id) (0x0000000000000028ull) block_id 38 arch/mips/include/asm/octeon/cvmx-pciercx-defs.h #define CVMX_PCIERCX_CFG011(block_id) (0x000000000000002Cull) block_id 39 arch/mips/include/asm/octeon/cvmx-pciercx-defs.h #define CVMX_PCIERCX_CFG030(block_id) (0x0000000000000078ull) block_id 40 arch/mips/include/asm/octeon/cvmx-pciercx-defs.h #define CVMX_PCIERCX_CFG031(block_id) (0x000000000000007Cull) block_id 41 arch/mips/include/asm/octeon/cvmx-pciercx-defs.h #define CVMX_PCIERCX_CFG032(block_id) (0x0000000000000080ull) block_id 42 arch/mips/include/asm/octeon/cvmx-pciercx-defs.h #define CVMX_PCIERCX_CFG034(block_id) (0x0000000000000088ull) block_id 43 arch/mips/include/asm/octeon/cvmx-pciercx-defs.h #define CVMX_PCIERCX_CFG035(block_id) (0x000000000000008Cull) block_id 44 arch/mips/include/asm/octeon/cvmx-pciercx-defs.h #define CVMX_PCIERCX_CFG040(block_id) (0x00000000000000A0ull) block_id 45 arch/mips/include/asm/octeon/cvmx-pciercx-defs.h #define CVMX_PCIERCX_CFG066(block_id) (0x0000000000000108ull) block_id 46 arch/mips/include/asm/octeon/cvmx-pciercx-defs.h #define CVMX_PCIERCX_CFG069(block_id) (0x0000000000000114ull) block_id 47 arch/mips/include/asm/octeon/cvmx-pciercx-defs.h #define CVMX_PCIERCX_CFG070(block_id) (0x0000000000000118ull) block_id 48 arch/mips/include/asm/octeon/cvmx-pciercx-defs.h #define CVMX_PCIERCX_CFG075(block_id) (0x000000000000012Cull) block_id 49 arch/mips/include/asm/octeon/cvmx-pciercx-defs.h #define CVMX_PCIERCX_CFG448(block_id) (0x0000000000000700ull) block_id 50 arch/mips/include/asm/octeon/cvmx-pciercx-defs.h #define CVMX_PCIERCX_CFG452(block_id) (0x0000000000000710ull) block_id 51 arch/mips/include/asm/octeon/cvmx-pciercx-defs.h #define CVMX_PCIERCX_CFG455(block_id) (0x000000000000071Cull) block_id 52 arch/mips/include/asm/octeon/cvmx-pciercx-defs.h #define CVMX_PCIERCX_CFG515(block_id) (0x000000000000080Cull) block_id 31 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h static inline uint64_t CVMX_PCSX_ANX_ADV_REG(unsigned long offset, unsigned long block_id) block_id 35 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001010ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 38 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001010ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 42 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001010ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 44 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001010ull) + ((offset) + (block_id) * 0x4000ull) * 1024; block_id 46 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001010ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 49 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h static inline uint64_t CVMX_PCSX_ANX_EXT_ST_REG(unsigned long offset, unsigned long block_id) block_id 53 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001028ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 56 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001028ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 60 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001028ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 62 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001028ull) + ((offset) + (block_id) * 0x4000ull) * 1024; block_id 64 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001028ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 67 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h static inline uint64_t CVMX_PCSX_ANX_LP_ABIL_REG(unsigned long offset, unsigned long block_id) block_id 71 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001018ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 74 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001018ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 78 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001018ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 80 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001018ull) + ((offset) + (block_id) * 0x4000ull) * 1024; block_id 82 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001018ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 85 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h static inline uint64_t CVMX_PCSX_ANX_RESULTS_REG(unsigned long offset, unsigned long block_id) block_id 89 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001020ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 92 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001020ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 96 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001020ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 98 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001020ull) + ((offset) + (block_id) * 0x4000ull) * 1024; block_id 100 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001020ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 103 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h static inline uint64_t CVMX_PCSX_INTX_EN_REG(unsigned long offset, unsigned long block_id) block_id 107 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001088ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 110 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001088ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 114 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001088ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 116 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001088ull) + ((offset) + (block_id) * 0x4000ull) * 1024; block_id 118 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001088ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 121 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h static inline uint64_t CVMX_PCSX_INTX_REG(unsigned long offset, unsigned long block_id) block_id 125 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001080ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 128 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001080ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 132 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001080ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 134 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001080ull) + ((offset) + (block_id) * 0x4000ull) * 1024; block_id 136 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001080ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 139 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h static inline uint64_t CVMX_PCSX_LINKX_TIMER_COUNT_REG(unsigned long offset, unsigned long block_id) block_id 143 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001040ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 146 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001040ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 150 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001040ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 152 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001040ull) + ((offset) + (block_id) * 0x4000ull) * 1024; block_id 154 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001040ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 157 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h static inline uint64_t CVMX_PCSX_LOG_ANLX_REG(unsigned long offset, unsigned long block_id) block_id 161 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001090ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 164 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001090ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 168 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001090ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 170 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001090ull) + ((offset) + (block_id) * 0x4000ull) * 1024; block_id 172 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001090ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 175 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h static inline uint64_t CVMX_PCSX_MISCX_CTL_REG(unsigned long offset, unsigned long block_id) block_id 179 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001078ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 182 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001078ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 186 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001078ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 188 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001078ull) + ((offset) + (block_id) * 0x4000ull) * 1024; block_id 190 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001078ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 193 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h static inline uint64_t CVMX_PCSX_MRX_CONTROL_REG(unsigned long offset, unsigned long block_id) block_id 197 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001000ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 200 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001000ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 204 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001000ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 206 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001000ull) + ((offset) + (block_id) * 0x4000ull) * 1024; block_id 208 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001000ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 211 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h static inline uint64_t CVMX_PCSX_MRX_STATUS_REG(unsigned long offset, unsigned long block_id) block_id 215 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001008ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 218 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001008ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 222 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001008ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 224 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001008ull) + ((offset) + (block_id) * 0x4000ull) * 1024; block_id 226 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001008ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 229 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h static inline uint64_t CVMX_PCSX_RXX_STATES_REG(unsigned long offset, unsigned long block_id) block_id 233 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001058ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 236 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001058ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 240 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001058ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 242 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001058ull) + ((offset) + (block_id) * 0x4000ull) * 1024; block_id 244 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001058ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 247 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h static inline uint64_t CVMX_PCSX_RXX_SYNC_REG(unsigned long offset, unsigned long block_id) block_id 251 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001050ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 254 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001050ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 258 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001050ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 260 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001050ull) + ((offset) + (block_id) * 0x4000ull) * 1024; block_id 262 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001050ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 265 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h static inline uint64_t CVMX_PCSX_SGMX_AN_ADV_REG(unsigned long offset, unsigned long block_id) block_id 269 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001068ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 272 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001068ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 276 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001068ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 278 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001068ull) + ((offset) + (block_id) * 0x4000ull) * 1024; block_id 280 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001068ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 283 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h static inline uint64_t CVMX_PCSX_SGMX_LP_ADV_REG(unsigned long offset, unsigned long block_id) block_id 287 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001070ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 290 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001070ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 294 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001070ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 296 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001070ull) + ((offset) + (block_id) * 0x4000ull) * 1024; block_id 298 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001070ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 301 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h static inline uint64_t CVMX_PCSX_TXX_STATES_REG(unsigned long offset, unsigned long block_id) block_id 305 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001060ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 308 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001060ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 312 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001060ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 314 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001060ull) + ((offset) + (block_id) * 0x4000ull) * 1024; block_id 316 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001060ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 319 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h static inline uint64_t CVMX_PCSX_TX_RXX_POLARITY_REG(unsigned long offset, unsigned long block_id) block_id 323 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001048ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 326 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001048ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 330 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001048ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 332 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001048ull) + ((offset) + (block_id) * 0x4000ull) * 1024; block_id 334 arch/mips/include/asm/octeon/cvmx-pcsx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0001048ull) + ((offset) + (block_id) * 0x20000ull) * 1024; block_id 31 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h static inline uint64_t CVMX_PCSXX_10GBX_STATUS_REG(unsigned long block_id) block_id 37 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000828ull) + (block_id) * 0x8000000ull; block_id 40 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000828ull) + (block_id) * 0x8000000ull; block_id 42 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000828ull) + (block_id) * 0x1000000ull; block_id 44 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000828ull) + (block_id) * 0x1000000ull; block_id 47 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h static inline uint64_t CVMX_PCSXX_BIST_STATUS_REG(unsigned long block_id) block_id 53 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000870ull) + (block_id) * 0x8000000ull; block_id 56 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000870ull) + (block_id) * 0x8000000ull; block_id 58 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000870ull) + (block_id) * 0x1000000ull; block_id 60 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000870ull) + (block_id) * 0x1000000ull; block_id 63 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h static inline uint64_t CVMX_PCSXX_BIT_LOCK_STATUS_REG(unsigned long block_id) block_id 69 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000850ull) + (block_id) * 0x8000000ull; block_id 72 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000850ull) + (block_id) * 0x8000000ull; block_id 74 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000850ull) + (block_id) * 0x1000000ull; block_id 76 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000850ull) + (block_id) * 0x1000000ull; block_id 79 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h static inline uint64_t CVMX_PCSXX_CONTROL1_REG(unsigned long block_id) block_id 85 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000800ull) + (block_id) * 0x8000000ull; block_id 88 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000800ull) + (block_id) * 0x8000000ull; block_id 90 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000800ull) + (block_id) * 0x1000000ull; block_id 92 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000800ull) + (block_id) * 0x1000000ull; block_id 95 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h static inline uint64_t CVMX_PCSXX_CONTROL2_REG(unsigned long block_id) block_id 101 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000818ull) + (block_id) * 0x8000000ull; block_id 104 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000818ull) + (block_id) * 0x8000000ull; block_id 106 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000818ull) + (block_id) * 0x1000000ull; block_id 108 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000818ull) + (block_id) * 0x1000000ull; block_id 111 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h static inline uint64_t CVMX_PCSXX_INT_EN_REG(unsigned long block_id) block_id 117 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000860ull) + (block_id) * 0x8000000ull; block_id 120 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000860ull) + (block_id) * 0x8000000ull; block_id 122 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000860ull) + (block_id) * 0x1000000ull; block_id 124 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000860ull) + (block_id) * 0x1000000ull; block_id 127 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h static inline uint64_t CVMX_PCSXX_INT_REG(unsigned long block_id) block_id 133 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000858ull) + (block_id) * 0x8000000ull; block_id 136 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000858ull) + (block_id) * 0x8000000ull; block_id 138 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000858ull) + (block_id) * 0x1000000ull; block_id 140 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000858ull) + (block_id) * 0x1000000ull; block_id 143 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h static inline uint64_t CVMX_PCSXX_LOG_ANL_REG(unsigned long block_id) block_id 149 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000868ull) + (block_id) * 0x8000000ull; block_id 152 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000868ull) + (block_id) * 0x8000000ull; block_id 154 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000868ull) + (block_id) * 0x1000000ull; block_id 156 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000868ull) + (block_id) * 0x1000000ull; block_id 159 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h static inline uint64_t CVMX_PCSXX_MISC_CTL_REG(unsigned long block_id) block_id 165 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000848ull) + (block_id) * 0x8000000ull; block_id 168 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000848ull) + (block_id) * 0x8000000ull; block_id 170 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000848ull) + (block_id) * 0x1000000ull; block_id 172 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000848ull) + (block_id) * 0x1000000ull; block_id 175 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h static inline uint64_t CVMX_PCSXX_RX_SYNC_STATES_REG(unsigned long block_id) block_id 181 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000838ull) + (block_id) * 0x8000000ull; block_id 184 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000838ull) + (block_id) * 0x8000000ull; block_id 186 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000838ull) + (block_id) * 0x1000000ull; block_id 188 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000838ull) + (block_id) * 0x1000000ull; block_id 191 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h static inline uint64_t CVMX_PCSXX_SPD_ABIL_REG(unsigned long block_id) block_id 197 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000810ull) + (block_id) * 0x8000000ull; block_id 200 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000810ull) + (block_id) * 0x8000000ull; block_id 202 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000810ull) + (block_id) * 0x1000000ull; block_id 204 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000810ull) + (block_id) * 0x1000000ull; block_id 207 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h static inline uint64_t CVMX_PCSXX_STATUS1_REG(unsigned long block_id) block_id 213 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000808ull) + (block_id) * 0x8000000ull; block_id 216 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000808ull) + (block_id) * 0x8000000ull; block_id 218 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000808ull) + (block_id) * 0x1000000ull; block_id 220 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000808ull) + (block_id) * 0x1000000ull; block_id 223 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h static inline uint64_t CVMX_PCSXX_STATUS2_REG(unsigned long block_id) block_id 229 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000820ull) + (block_id) * 0x8000000ull; block_id 232 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000820ull) + (block_id) * 0x8000000ull; block_id 234 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000820ull) + (block_id) * 0x1000000ull; block_id 236 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000820ull) + (block_id) * 0x1000000ull; block_id 239 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h static inline uint64_t CVMX_PCSXX_TX_RX_POLARITY_REG(unsigned long block_id) block_id 245 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000840ull) + (block_id) * 0x8000000ull; block_id 248 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000840ull) + (block_id) * 0x8000000ull; block_id 250 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000840ull) + (block_id) * 0x1000000ull; block_id 252 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000840ull) + (block_id) * 0x1000000ull; block_id 255 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h static inline uint64_t CVMX_PCSXX_TX_RX_STATES_REG(unsigned long block_id) block_id 261 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000830ull) + (block_id) * 0x8000000ull; block_id 264 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000830ull) + (block_id) * 0x8000000ull; block_id 266 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000830ull) + (block_id) * 0x1000000ull; block_id 268 arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h return CVMX_ADD_IO_SEG(0x00011800B0000830ull) + (block_id) * 0x1000000ull; block_id 31 arch/mips/include/asm/octeon/cvmx-pemx-defs.h #define CVMX_PEMX_BAR1_INDEXX(offset, block_id) (CVMX_ADD_IO_SEG(0x00011800C00000A8ull) + (((offset) & 15) + ((block_id) & 1) * 0x200000ull) * 8) block_id 32 arch/mips/include/asm/octeon/cvmx-pemx-defs.h #define CVMX_PEMX_BAR2_MASK(block_id) (CVMX_ADD_IO_SEG(0x00011800C0000130ull) + ((block_id) & 1) * 0x1000000ull) block_id 33 arch/mips/include/asm/octeon/cvmx-pemx-defs.h #define CVMX_PEMX_BAR_CTL(block_id) (CVMX_ADD_IO_SEG(0x00011800C0000128ull) + ((block_id) & 1) * 0x1000000ull) block_id 34 arch/mips/include/asm/octeon/cvmx-pemx-defs.h #define CVMX_PEMX_BIST_STATUS(block_id) (CVMX_ADD_IO_SEG(0x00011800C0000018ull) + ((block_id) & 1) * 0x1000000ull) block_id 35 arch/mips/include/asm/octeon/cvmx-pemx-defs.h #define CVMX_PEMX_BIST_STATUS2(block_id) (CVMX_ADD_IO_SEG(0x00011800C0000420ull) + ((block_id) & 1) * 0x1000000ull) block_id 36 arch/mips/include/asm/octeon/cvmx-pemx-defs.h #define CVMX_PEMX_CFG_RD(block_id) (CVMX_ADD_IO_SEG(0x00011800C0000030ull) + ((block_id) & 1) * 0x1000000ull) block_id 37 arch/mips/include/asm/octeon/cvmx-pemx-defs.h #define CVMX_PEMX_CFG_WR(block_id) (CVMX_ADD_IO_SEG(0x00011800C0000028ull) + ((block_id) & 1) * 0x1000000ull) block_id 38 arch/mips/include/asm/octeon/cvmx-pemx-defs.h #define CVMX_PEMX_CPL_LUT_VALID(block_id) (CVMX_ADD_IO_SEG(0x00011800C0000098ull) + ((block_id) & 1) * 0x1000000ull) block_id 39 arch/mips/include/asm/octeon/cvmx-pemx-defs.h #define CVMX_PEMX_CTL_STATUS(block_id) (CVMX_ADD_IO_SEG(0x00011800C0000000ull) + ((block_id) & 1) * 0x1000000ull) block_id 40 arch/mips/include/asm/octeon/cvmx-pemx-defs.h #define CVMX_PEMX_DBG_INFO(block_id) (CVMX_ADD_IO_SEG(0x00011800C0000008ull) + ((block_id) & 1) * 0x1000000ull) block_id 41 arch/mips/include/asm/octeon/cvmx-pemx-defs.h #define CVMX_PEMX_DBG_INFO_EN(block_id) (CVMX_ADD_IO_SEG(0x00011800C00000A0ull) + ((block_id) & 1) * 0x1000000ull) block_id 42 arch/mips/include/asm/octeon/cvmx-pemx-defs.h #define CVMX_PEMX_DIAG_STATUS(block_id) (CVMX_ADD_IO_SEG(0x00011800C0000020ull) + ((block_id) & 1) * 0x1000000ull) block_id 43 arch/mips/include/asm/octeon/cvmx-pemx-defs.h #define CVMX_PEMX_INB_READ_CREDITS(block_id) (CVMX_ADD_IO_SEG(0x00011800C0000138ull) + ((block_id) & 1) * 0x1000000ull) block_id 44 arch/mips/include/asm/octeon/cvmx-pemx-defs.h #define CVMX_PEMX_INT_ENB(block_id) (CVMX_ADD_IO_SEG(0x00011800C0000410ull) + ((block_id) & 1) * 0x1000000ull) block_id 45 arch/mips/include/asm/octeon/cvmx-pemx-defs.h #define CVMX_PEMX_INT_ENB_INT(block_id) (CVMX_ADD_IO_SEG(0x00011800C0000418ull) + ((block_id) & 1) * 0x1000000ull) block_id 46 arch/mips/include/asm/octeon/cvmx-pemx-defs.h #define CVMX_PEMX_INT_SUM(block_id) (CVMX_ADD_IO_SEG(0x00011800C0000408ull) + ((block_id) & 1) * 0x1000000ull) block_id 47 arch/mips/include/asm/octeon/cvmx-pemx-defs.h #define CVMX_PEMX_P2N_BAR0_START(block_id) (CVMX_ADD_IO_SEG(0x00011800C0000080ull) + ((block_id) & 1) * 0x1000000ull) block_id 48 arch/mips/include/asm/octeon/cvmx-pemx-defs.h #define CVMX_PEMX_P2N_BAR1_START(block_id) (CVMX_ADD_IO_SEG(0x00011800C0000088ull) + ((block_id) & 1) * 0x1000000ull) block_id 49 arch/mips/include/asm/octeon/cvmx-pemx-defs.h #define CVMX_PEMX_P2N_BAR2_START(block_id) (CVMX_ADD_IO_SEG(0x00011800C0000090ull) + ((block_id) & 1) * 0x1000000ull) block_id 50 arch/mips/include/asm/octeon/cvmx-pemx-defs.h #define CVMX_PEMX_P2P_BARX_END(offset, block_id) (CVMX_ADD_IO_SEG(0x00011800C0000048ull) + (((offset) & 3) + ((block_id) & 1) * 0x100000ull) * 16) block_id 51 arch/mips/include/asm/octeon/cvmx-pemx-defs.h #define CVMX_PEMX_P2P_BARX_START(offset, block_id) (CVMX_ADD_IO_SEG(0x00011800C0000040ull) + (((offset) & 3) + ((block_id) & 1) * 0x100000ull) * 16) block_id 52 arch/mips/include/asm/octeon/cvmx-pemx-defs.h #define CVMX_PEMX_TLP_CREDITS(block_id) (CVMX_ADD_IO_SEG(0x00011800C0000038ull) + ((block_id) & 1) * 0x1000000ull) block_id 31 arch/mips/include/asm/octeon/cvmx-pescx-defs.h #define CVMX_PESCX_BIST_STATUS(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000018ull) + ((block_id) & 1) * 0x8000000ull) block_id 32 arch/mips/include/asm/octeon/cvmx-pescx-defs.h #define CVMX_PESCX_BIST_STATUS2(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000418ull) + ((block_id) & 1) * 0x8000000ull) block_id 33 arch/mips/include/asm/octeon/cvmx-pescx-defs.h #define CVMX_PESCX_CFG_RD(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000030ull) + ((block_id) & 1) * 0x8000000ull) block_id 34 arch/mips/include/asm/octeon/cvmx-pescx-defs.h #define CVMX_PESCX_CFG_WR(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000028ull) + ((block_id) & 1) * 0x8000000ull) block_id 35 arch/mips/include/asm/octeon/cvmx-pescx-defs.h #define CVMX_PESCX_CPL_LUT_VALID(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000098ull) + ((block_id) & 1) * 0x8000000ull) block_id 36 arch/mips/include/asm/octeon/cvmx-pescx-defs.h #define CVMX_PESCX_CTL_STATUS(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000000ull) + ((block_id) & 1) * 0x8000000ull) block_id 37 arch/mips/include/asm/octeon/cvmx-pescx-defs.h #define CVMX_PESCX_CTL_STATUS2(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000400ull) + ((block_id) & 1) * 0x8000000ull) block_id 38 arch/mips/include/asm/octeon/cvmx-pescx-defs.h #define CVMX_PESCX_DBG_INFO(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000008ull) + ((block_id) & 1) * 0x8000000ull) block_id 39 arch/mips/include/asm/octeon/cvmx-pescx-defs.h #define CVMX_PESCX_DBG_INFO_EN(block_id) (CVMX_ADD_IO_SEG(0x00011800C80000A0ull) + ((block_id) & 1) * 0x8000000ull) block_id 40 arch/mips/include/asm/octeon/cvmx-pescx-defs.h #define CVMX_PESCX_DIAG_STATUS(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000020ull) + ((block_id) & 1) * 0x8000000ull) block_id 41 arch/mips/include/asm/octeon/cvmx-pescx-defs.h #define CVMX_PESCX_P2N_BAR0_START(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000080ull) + ((block_id) & 1) * 0x8000000ull) block_id 42 arch/mips/include/asm/octeon/cvmx-pescx-defs.h #define CVMX_PESCX_P2N_BAR1_START(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000088ull) + ((block_id) & 1) * 0x8000000ull) block_id 43 arch/mips/include/asm/octeon/cvmx-pescx-defs.h #define CVMX_PESCX_P2N_BAR2_START(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000090ull) + ((block_id) & 1) * 0x8000000ull) block_id 44 arch/mips/include/asm/octeon/cvmx-pescx-defs.h #define CVMX_PESCX_P2P_BARX_END(offset, block_id) (CVMX_ADD_IO_SEG(0x00011800C8000048ull) + (((offset) & 3) + ((block_id) & 1) * 0x800000ull) * 16) block_id 45 arch/mips/include/asm/octeon/cvmx-pescx-defs.h #define CVMX_PESCX_P2P_BARX_START(offset, block_id) (CVMX_ADD_IO_SEG(0x00011800C8000040ull) + (((offset) & 3) + ((block_id) & 1) * 0x800000ull) * 16) block_id 46 arch/mips/include/asm/octeon/cvmx-pescx-defs.h #define CVMX_PESCX_TLP_CREDITS(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000038ull) + ((block_id) & 1) * 0x8000000ull) block_id 113 arch/mips/include/asm/octeon/cvmx-pip-defs.h #define CVMX_PIP_SUB_PKIND_FCSX(block_id) (CVMX_ADD_IO_SEG(0x00011800A0080000ull)) block_id 31 arch/mips/include/asm/octeon/cvmx-spxx-defs.h #define CVMX_SPXX_BCKPRS_CNT(block_id) (CVMX_ADD_IO_SEG(0x0001180090000340ull) + ((block_id) & 1) * 0x8000000ull) block_id 32 arch/mips/include/asm/octeon/cvmx-spxx-defs.h #define CVMX_SPXX_BIST_STAT(block_id) (CVMX_ADD_IO_SEG(0x00011800900007F8ull) + ((block_id) & 1) * 0x8000000ull) block_id 33 arch/mips/include/asm/octeon/cvmx-spxx-defs.h #define CVMX_SPXX_CLK_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180090000348ull) + ((block_id) & 1) * 0x8000000ull) block_id 34 arch/mips/include/asm/octeon/cvmx-spxx-defs.h #define CVMX_SPXX_CLK_STAT(block_id) (CVMX_ADD_IO_SEG(0x0001180090000350ull) + ((block_id) & 1) * 0x8000000ull) block_id 35 arch/mips/include/asm/octeon/cvmx-spxx-defs.h #define CVMX_SPXX_DBG_DESKEW_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180090000368ull) + ((block_id) & 1) * 0x8000000ull) block_id 36 arch/mips/include/asm/octeon/cvmx-spxx-defs.h #define CVMX_SPXX_DBG_DESKEW_STATE(block_id) (CVMX_ADD_IO_SEG(0x0001180090000370ull) + ((block_id) & 1) * 0x8000000ull) block_id 37 arch/mips/include/asm/octeon/cvmx-spxx-defs.h #define CVMX_SPXX_DRV_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180090000358ull) + ((block_id) & 1) * 0x8000000ull) block_id 38 arch/mips/include/asm/octeon/cvmx-spxx-defs.h #define CVMX_SPXX_ERR_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180090000320ull) + ((block_id) & 1) * 0x8000000ull) block_id 39 arch/mips/include/asm/octeon/cvmx-spxx-defs.h #define CVMX_SPXX_INT_DAT(block_id) (CVMX_ADD_IO_SEG(0x0001180090000318ull) + ((block_id) & 1) * 0x8000000ull) block_id 40 arch/mips/include/asm/octeon/cvmx-spxx-defs.h #define CVMX_SPXX_INT_MSK(block_id) (CVMX_ADD_IO_SEG(0x0001180090000308ull) + ((block_id) & 1) * 0x8000000ull) block_id 41 arch/mips/include/asm/octeon/cvmx-spxx-defs.h #define CVMX_SPXX_INT_REG(block_id) (CVMX_ADD_IO_SEG(0x0001180090000300ull) + ((block_id) & 1) * 0x8000000ull) block_id 42 arch/mips/include/asm/octeon/cvmx-spxx-defs.h #define CVMX_SPXX_INT_SYNC(block_id) (CVMX_ADD_IO_SEG(0x0001180090000310ull) + ((block_id) & 1) * 0x8000000ull) block_id 43 arch/mips/include/asm/octeon/cvmx-spxx-defs.h #define CVMX_SPXX_TPA_ACC(block_id) (CVMX_ADD_IO_SEG(0x0001180090000338ull) + ((block_id) & 1) * 0x8000000ull) block_id 44 arch/mips/include/asm/octeon/cvmx-spxx-defs.h #define CVMX_SPXX_TPA_MAX(block_id) (CVMX_ADD_IO_SEG(0x0001180090000330ull) + ((block_id) & 1) * 0x8000000ull) block_id 45 arch/mips/include/asm/octeon/cvmx-spxx-defs.h #define CVMX_SPXX_TPA_SEL(block_id) (CVMX_ADD_IO_SEG(0x0001180090000328ull) + ((block_id) & 1) * 0x8000000ull) block_id 46 arch/mips/include/asm/octeon/cvmx-spxx-defs.h #define CVMX_SPXX_TRN4_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180090000360ull) + ((block_id) & 1) * 0x8000000ull) block_id 31 arch/mips/include/asm/octeon/cvmx-sriox-defs.h #define CVMX_SRIOX_ACC_CTRL(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000148ull) + ((block_id) & 3) * 0x1000000ull) block_id 32 arch/mips/include/asm/octeon/cvmx-sriox-defs.h #define CVMX_SRIOX_ASMBLY_ID(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000200ull) + ((block_id) & 3) * 0x1000000ull) block_id 33 arch/mips/include/asm/octeon/cvmx-sriox-defs.h #define CVMX_SRIOX_ASMBLY_INFO(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000208ull) + ((block_id) & 3) * 0x1000000ull) block_id 34 arch/mips/include/asm/octeon/cvmx-sriox-defs.h #define CVMX_SRIOX_BELL_RESP_CTRL(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000310ull) + ((block_id) & 3) * 0x1000000ull) block_id 35 arch/mips/include/asm/octeon/cvmx-sriox-defs.h #define CVMX_SRIOX_BIST_STATUS(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000108ull) + ((block_id) & 3) * 0x1000000ull) block_id 36 arch/mips/include/asm/octeon/cvmx-sriox-defs.h #define CVMX_SRIOX_IMSG_CTRL(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000508ull) + ((block_id) & 3) * 0x1000000ull) block_id 37 arch/mips/include/asm/octeon/cvmx-sriox-defs.h #define CVMX_SRIOX_IMSG_INST_HDRX(offset, block_id) (CVMX_ADD_IO_SEG(0x00011800C8000510ull) + (((offset) & 1) + ((block_id) & 3) * 0x200000ull) * 8) block_id 38 arch/mips/include/asm/octeon/cvmx-sriox-defs.h #define CVMX_SRIOX_IMSG_QOS_GRPX(offset, block_id) (CVMX_ADD_IO_SEG(0x00011800C8000600ull) + (((offset) & 31) + ((block_id) & 3) * 0x200000ull) * 8) block_id 39 arch/mips/include/asm/octeon/cvmx-sriox-defs.h #define CVMX_SRIOX_IMSG_STATUSX(offset, block_id) (CVMX_ADD_IO_SEG(0x00011800C8000700ull) + (((offset) & 31) + ((block_id) & 3) * 0x200000ull) * 8) block_id 40 arch/mips/include/asm/octeon/cvmx-sriox-defs.h #define CVMX_SRIOX_IMSG_VPORT_THR(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000500ull) + ((block_id) & 3) * 0x1000000ull) block_id 41 arch/mips/include/asm/octeon/cvmx-sriox-defs.h #define CVMX_SRIOX_IMSG_VPORT_THR2(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000528ull) + ((block_id) & 3) * 0x1000000ull) block_id 42 arch/mips/include/asm/octeon/cvmx-sriox-defs.h #define CVMX_SRIOX_INT2_ENABLE(block_id) (CVMX_ADD_IO_SEG(0x00011800C80003E0ull) + ((block_id) & 3) * 0x1000000ull) block_id 43 arch/mips/include/asm/octeon/cvmx-sriox-defs.h #define CVMX_SRIOX_INT2_REG(block_id) (CVMX_ADD_IO_SEG(0x00011800C80003E8ull) + ((block_id) & 3) * 0x1000000ull) block_id 44 arch/mips/include/asm/octeon/cvmx-sriox-defs.h #define CVMX_SRIOX_INT_ENABLE(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000110ull) + ((block_id) & 3) * 0x1000000ull) block_id 45 arch/mips/include/asm/octeon/cvmx-sriox-defs.h #define CVMX_SRIOX_INT_INFO0(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000120ull) + ((block_id) & 3) * 0x1000000ull) block_id 46 arch/mips/include/asm/octeon/cvmx-sriox-defs.h #define CVMX_SRIOX_INT_INFO1(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000128ull) + ((block_id) & 3) * 0x1000000ull) block_id 47 arch/mips/include/asm/octeon/cvmx-sriox-defs.h #define CVMX_SRIOX_INT_INFO2(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000130ull) + ((block_id) & 3) * 0x1000000ull) block_id 48 arch/mips/include/asm/octeon/cvmx-sriox-defs.h #define CVMX_SRIOX_INT_INFO3(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000138ull) + ((block_id) & 3) * 0x1000000ull) block_id 49 arch/mips/include/asm/octeon/cvmx-sriox-defs.h #define CVMX_SRIOX_INT_REG(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000118ull) + ((block_id) & 3) * 0x1000000ull) block_id 50 arch/mips/include/asm/octeon/cvmx-sriox-defs.h #define CVMX_SRIOX_IP_FEATURE(block_id) (CVMX_ADD_IO_SEG(0x00011800C80003F8ull) + ((block_id) & 3) * 0x1000000ull) block_id 51 arch/mips/include/asm/octeon/cvmx-sriox-defs.h #define CVMX_SRIOX_MAC_BUFFERS(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000390ull) + ((block_id) & 3) * 0x1000000ull) block_id 52 arch/mips/include/asm/octeon/cvmx-sriox-defs.h #define CVMX_SRIOX_MAINT_OP(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000158ull) + ((block_id) & 3) * 0x1000000ull) block_id 53 arch/mips/include/asm/octeon/cvmx-sriox-defs.h #define CVMX_SRIOX_MAINT_RD_DATA(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000160ull) + ((block_id) & 3) * 0x1000000ull) block_id 54 arch/mips/include/asm/octeon/cvmx-sriox-defs.h #define CVMX_SRIOX_MCE_TX_CTL(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000240ull) + ((block_id) & 3) * 0x1000000ull) block_id 55 arch/mips/include/asm/octeon/cvmx-sriox-defs.h #define CVMX_SRIOX_MEM_OP_CTRL(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000168ull) + ((block_id) & 3) * 0x1000000ull) block_id 56 arch/mips/include/asm/octeon/cvmx-sriox-defs.h #define CVMX_SRIOX_OMSG_CTRLX(offset, block_id) (CVMX_ADD_IO_SEG(0x00011800C8000488ull) + (((offset) & 1) + ((block_id) & 3) * 0x40000ull) * 64) block_id 57 arch/mips/include/asm/octeon/cvmx-sriox-defs.h #define CVMX_SRIOX_OMSG_DONE_COUNTSX(offset, block_id) (CVMX_ADD_IO_SEG(0x00011800C80004B0ull) + (((offset) & 1) + ((block_id) & 3) * 0x40000ull) * 64) block_id 58 arch/mips/include/asm/octeon/cvmx-sriox-defs.h #define CVMX_SRIOX_OMSG_FMP_MRX(offset, block_id) (CVMX_ADD_IO_SEG(0x00011800C8000498ull) + (((offset) & 1) + ((block_id) & 3) * 0x40000ull) * 64) block_id 59 arch/mips/include/asm/octeon/cvmx-sriox-defs.h #define CVMX_SRIOX_OMSG_NMP_MRX(offset, block_id) (CVMX_ADD_IO_SEG(0x00011800C80004A0ull) + (((offset) & 1) + ((block_id) & 3) * 0x40000ull) * 64) block_id 60 arch/mips/include/asm/octeon/cvmx-sriox-defs.h #define CVMX_SRIOX_OMSG_PORTX(offset, block_id) (CVMX_ADD_IO_SEG(0x00011800C8000480ull) + (((offset) & 1) + ((block_id) & 3) * 0x40000ull) * 64) block_id 61 arch/mips/include/asm/octeon/cvmx-sriox-defs.h #define CVMX_SRIOX_OMSG_SILO_THR(block_id) (CVMX_ADD_IO_SEG(0x00011800C80004F8ull) + ((block_id) & 3) * 0x1000000ull) block_id 62 arch/mips/include/asm/octeon/cvmx-sriox-defs.h #define CVMX_SRIOX_OMSG_SP_MRX(offset, block_id) (CVMX_ADD_IO_SEG(0x00011800C8000490ull) + (((offset) & 1) + ((block_id) & 3) * 0x40000ull) * 64) block_id 63 arch/mips/include/asm/octeon/cvmx-sriox-defs.h #define CVMX_SRIOX_PRIOX_IN_USE(offset, block_id) (CVMX_ADD_IO_SEG(0x00011800C80003C0ull) + (((offset) & 3) + ((block_id) & 3) * 0x200000ull) * 8) block_id 64 arch/mips/include/asm/octeon/cvmx-sriox-defs.h #define CVMX_SRIOX_RX_BELL(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000308ull) + ((block_id) & 3) * 0x1000000ull) block_id 65 arch/mips/include/asm/octeon/cvmx-sriox-defs.h #define CVMX_SRIOX_RX_BELL_SEQ(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000300ull) + ((block_id) & 3) * 0x1000000ull) block_id 66 arch/mips/include/asm/octeon/cvmx-sriox-defs.h #define CVMX_SRIOX_RX_STATUS(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000380ull) + ((block_id) & 3) * 0x1000000ull) block_id 67 arch/mips/include/asm/octeon/cvmx-sriox-defs.h #define CVMX_SRIOX_S2M_TYPEX(offset, block_id) (CVMX_ADD_IO_SEG(0x00011800C8000180ull) + (((offset) & 15) + ((block_id) & 3) * 0x200000ull) * 8) block_id 68 arch/mips/include/asm/octeon/cvmx-sriox-defs.h #define CVMX_SRIOX_SEQ(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000278ull) + ((block_id) & 3) * 0x1000000ull) block_id 69 arch/mips/include/asm/octeon/cvmx-sriox-defs.h #define CVMX_SRIOX_STATUS_REG(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000100ull) + ((block_id) & 3) * 0x1000000ull) block_id 70 arch/mips/include/asm/octeon/cvmx-sriox-defs.h #define CVMX_SRIOX_TAG_CTRL(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000178ull) + ((block_id) & 3) * 0x1000000ull) block_id 71 arch/mips/include/asm/octeon/cvmx-sriox-defs.h #define CVMX_SRIOX_TLP_CREDITS(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000150ull) + ((block_id) & 3) * 0x1000000ull) block_id 72 arch/mips/include/asm/octeon/cvmx-sriox-defs.h #define CVMX_SRIOX_TX_BELL(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000280ull) + ((block_id) & 3) * 0x1000000ull) block_id 73 arch/mips/include/asm/octeon/cvmx-sriox-defs.h #define CVMX_SRIOX_TX_BELL_INFO(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000288ull) + ((block_id) & 3) * 0x1000000ull) block_id 74 arch/mips/include/asm/octeon/cvmx-sriox-defs.h #define CVMX_SRIOX_TX_CTRL(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000170ull) + ((block_id) & 3) * 0x1000000ull) block_id 75 arch/mips/include/asm/octeon/cvmx-sriox-defs.h #define CVMX_SRIOX_TX_EMPHASIS(block_id) (CVMX_ADD_IO_SEG(0x00011800C80003F0ull) + ((block_id) & 3) * 0x1000000ull) block_id 76 arch/mips/include/asm/octeon/cvmx-sriox-defs.h #define CVMX_SRIOX_TX_STATUS(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000388ull) + ((block_id) & 3) * 0x1000000ull) block_id 77 arch/mips/include/asm/octeon/cvmx-sriox-defs.h #define CVMX_SRIOX_WR_DONE_COUNTS(block_id) (CVMX_ADD_IO_SEG(0x00011800C8000340ull) + ((block_id) & 3) * 0x1000000ull) block_id 31 arch/mips/include/asm/octeon/cvmx-srxx-defs.h #define CVMX_SRXX_COM_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180090000200ull) + ((block_id) & 1) * 0x8000000ull) block_id 32 arch/mips/include/asm/octeon/cvmx-srxx-defs.h #define CVMX_SRXX_IGN_RX_FULL(block_id) (CVMX_ADD_IO_SEG(0x0001180090000218ull) + ((block_id) & 1) * 0x8000000ull) block_id 33 arch/mips/include/asm/octeon/cvmx-srxx-defs.h #define CVMX_SRXX_SPI4_CALX(offset, block_id) (CVMX_ADD_IO_SEG(0x0001180090000000ull) + (((offset) & 31) + ((block_id) & 1) * 0x1000000ull) * 8) block_id 34 arch/mips/include/asm/octeon/cvmx-srxx-defs.h #define CVMX_SRXX_SPI4_STAT(block_id) (CVMX_ADD_IO_SEG(0x0001180090000208ull) + ((block_id) & 1) * 0x8000000ull) block_id 35 arch/mips/include/asm/octeon/cvmx-srxx-defs.h #define CVMX_SRXX_SW_TICK_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180090000220ull) + ((block_id) & 1) * 0x8000000ull) block_id 36 arch/mips/include/asm/octeon/cvmx-srxx-defs.h #define CVMX_SRXX_SW_TICK_DAT(block_id) (CVMX_ADD_IO_SEG(0x0001180090000228ull) + ((block_id) & 1) * 0x8000000ull) block_id 31 arch/mips/include/asm/octeon/cvmx-stxx-defs.h #define CVMX_STXX_ARB_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180090000608ull) + ((block_id) & 1) * 0x8000000ull) block_id 32 arch/mips/include/asm/octeon/cvmx-stxx-defs.h #define CVMX_STXX_BCKPRS_CNT(block_id) (CVMX_ADD_IO_SEG(0x0001180090000688ull) + ((block_id) & 1) * 0x8000000ull) block_id 33 arch/mips/include/asm/octeon/cvmx-stxx-defs.h #define CVMX_STXX_COM_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180090000600ull) + ((block_id) & 1) * 0x8000000ull) block_id 34 arch/mips/include/asm/octeon/cvmx-stxx-defs.h #define CVMX_STXX_DIP_CNT(block_id) (CVMX_ADD_IO_SEG(0x0001180090000690ull) + ((block_id) & 1) * 0x8000000ull) block_id 35 arch/mips/include/asm/octeon/cvmx-stxx-defs.h #define CVMX_STXX_IGN_CAL(block_id) (CVMX_ADD_IO_SEG(0x0001180090000610ull) + ((block_id) & 1) * 0x8000000ull) block_id 36 arch/mips/include/asm/octeon/cvmx-stxx-defs.h #define CVMX_STXX_INT_MSK(block_id) (CVMX_ADD_IO_SEG(0x00011800900006A0ull) + ((block_id) & 1) * 0x8000000ull) block_id 37 arch/mips/include/asm/octeon/cvmx-stxx-defs.h #define CVMX_STXX_INT_REG(block_id) (CVMX_ADD_IO_SEG(0x0001180090000698ull) + ((block_id) & 1) * 0x8000000ull) block_id 38 arch/mips/include/asm/octeon/cvmx-stxx-defs.h #define CVMX_STXX_INT_SYNC(block_id) (CVMX_ADD_IO_SEG(0x00011800900006A8ull) + ((block_id) & 1) * 0x8000000ull) block_id 39 arch/mips/include/asm/octeon/cvmx-stxx-defs.h #define CVMX_STXX_MIN_BST(block_id) (CVMX_ADD_IO_SEG(0x0001180090000618ull) + ((block_id) & 1) * 0x8000000ull) block_id 40 arch/mips/include/asm/octeon/cvmx-stxx-defs.h #define CVMX_STXX_SPI4_CALX(offset, block_id) (CVMX_ADD_IO_SEG(0x0001180090000400ull) + (((offset) & 31) + ((block_id) & 1) * 0x1000000ull) * 8) block_id 41 arch/mips/include/asm/octeon/cvmx-stxx-defs.h #define CVMX_STXX_SPI4_DAT(block_id) (CVMX_ADD_IO_SEG(0x0001180090000628ull) + ((block_id) & 1) * 0x8000000ull) block_id 42 arch/mips/include/asm/octeon/cvmx-stxx-defs.h #define CVMX_STXX_SPI4_STAT(block_id) (CVMX_ADD_IO_SEG(0x0001180090000630ull) + ((block_id) & 1) * 0x8000000ull) block_id 43 arch/mips/include/asm/octeon/cvmx-stxx-defs.h #define CVMX_STXX_STAT_BYTES_HI(block_id) (CVMX_ADD_IO_SEG(0x0001180090000648ull) + ((block_id) & 1) * 0x8000000ull) block_id 44 arch/mips/include/asm/octeon/cvmx-stxx-defs.h #define CVMX_STXX_STAT_BYTES_LO(block_id) (CVMX_ADD_IO_SEG(0x0001180090000680ull) + ((block_id) & 1) * 0x8000000ull) block_id 45 arch/mips/include/asm/octeon/cvmx-stxx-defs.h #define CVMX_STXX_STAT_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180090000638ull) + ((block_id) & 1) * 0x8000000ull) block_id 46 arch/mips/include/asm/octeon/cvmx-stxx-defs.h #define CVMX_STXX_STAT_PKT_XMT(block_id) (CVMX_ADD_IO_SEG(0x0001180090000640ull) + ((block_id) & 1) * 0x8000000ull) block_id 31 arch/mips/include/asm/octeon/cvmx-uctlx-defs.h #define CVMX_UCTLX_BIST_STATUS(block_id) (CVMX_ADD_IO_SEG(0x000118006F0000A0ull)) block_id 32 arch/mips/include/asm/octeon/cvmx-uctlx-defs.h #define CVMX_UCTLX_CLK_RST_CTL(block_id) (CVMX_ADD_IO_SEG(0x000118006F000000ull)) block_id 33 arch/mips/include/asm/octeon/cvmx-uctlx-defs.h #define CVMX_UCTLX_EHCI_CTL(block_id) (CVMX_ADD_IO_SEG(0x000118006F000080ull)) block_id 34 arch/mips/include/asm/octeon/cvmx-uctlx-defs.h #define CVMX_UCTLX_EHCI_FLA(block_id) (CVMX_ADD_IO_SEG(0x000118006F0000A8ull)) block_id 35 arch/mips/include/asm/octeon/cvmx-uctlx-defs.h #define CVMX_UCTLX_ERTO_CTL(block_id) (CVMX_ADD_IO_SEG(0x000118006F000090ull)) block_id 36 arch/mips/include/asm/octeon/cvmx-uctlx-defs.h #define CVMX_UCTLX_IF_ENA(block_id) (CVMX_ADD_IO_SEG(0x000118006F000030ull)) block_id 37 arch/mips/include/asm/octeon/cvmx-uctlx-defs.h #define CVMX_UCTLX_INT_ENA(block_id) (CVMX_ADD_IO_SEG(0x000118006F000028ull)) block_id 38 arch/mips/include/asm/octeon/cvmx-uctlx-defs.h #define CVMX_UCTLX_INT_REG(block_id) (CVMX_ADD_IO_SEG(0x000118006F000020ull)) block_id 39 arch/mips/include/asm/octeon/cvmx-uctlx-defs.h #define CVMX_UCTLX_OHCI_CTL(block_id) (CVMX_ADD_IO_SEG(0x000118006F000088ull)) block_id 40 arch/mips/include/asm/octeon/cvmx-uctlx-defs.h #define CVMX_UCTLX_ORTO_CTL(block_id) (CVMX_ADD_IO_SEG(0x000118006F000098ull)) block_id 41 arch/mips/include/asm/octeon/cvmx-uctlx-defs.h #define CVMX_UCTLX_PPAF_WM(block_id) (CVMX_ADD_IO_SEG(0x000118006F000038ull)) block_id 42 arch/mips/include/asm/octeon/cvmx-uctlx-defs.h #define CVMX_UCTLX_UPHY_CTL_STATUS(block_id) (CVMX_ADD_IO_SEG(0x000118006F000008ull)) block_id 43 arch/mips/include/asm/octeon/cvmx-uctlx-defs.h #define CVMX_UCTLX_UPHY_PORTX_CTL_STATUS(offset, block_id) (CVMX_ADD_IO_SEG(0x000118006F000010ull) + (((offset) & 1) + ((block_id) & 0) * 0x0ull) * 8) block_id 564 drivers/base/memory.c static struct memory_block *find_memory_block_by_id(unsigned long block_id) block_id 568 drivers/base/memory.c dev = subsys_find_device_by_id(&memory_subsys, block_id, NULL); block_id 582 drivers/base/memory.c unsigned long block_id = base_memory_block_id(__section_nr(section)); block_id 584 drivers/base/memory.c return find_memory_block_by_id(block_id); block_id 629 drivers/base/memory.c unsigned long block_id, unsigned long state) block_id 635 drivers/base/memory.c mem = find_memory_block_by_id(block_id); block_id 644 drivers/base/memory.c mem->start_section_nr = block_id * sections_per_block; block_id 697 drivers/base/memory.c unsigned long block_id; block_id 705 drivers/base/memory.c for (block_id = start_block_id; block_id != end_block_id; block_id++) { block_id 706 drivers/base/memory.c ret = init_memory_block(&mem, block_id, MEM_OFFLINE); block_id 712 drivers/base/memory.c end_block_id = block_id; block_id 713 drivers/base/memory.c for (block_id = start_block_id; block_id != end_block_id; block_id 714 drivers/base/memory.c block_id++) { block_id 715 drivers/base/memory.c mem = find_memory_block_by_id(block_id); block_id 734 drivers/base/memory.c unsigned long block_id; block_id 741 drivers/base/memory.c for (block_id = start_block_id; block_id != end_block_id; block_id++) { block_id 742 drivers/base/memory.c mem = find_memory_block_by_id(block_id); block_id 840 drivers/base/memory.c unsigned long block_id; block_id 846 drivers/base/memory.c for (block_id = start_block_id; block_id <= end_block_id; block_id++) { block_id 847 drivers/base/memory.c mem = find_memory_block_by_id(block_id); block_id 405 drivers/block/drbd/drbd_int.h u64 block_id; block_id 1105 drivers/block/drbd/drbd_int.h sector_t sector, int blksize, u64 block_id); block_id 1111 drivers/block/drbd/drbd_int.h sector_t sector, int size, u64 block_id); block_id 1343 drivers/block/drbd/drbd_main.c u64 sector, u32 blksize, u64 block_id) block_id 1356 drivers/block/drbd/drbd_main.c p->block_id = block_id; block_id 1371 drivers/block/drbd/drbd_main.c dp->block_id); block_id 1377 drivers/block/drbd/drbd_main.c _drbd_send_ack(peer_device, cmd, rp->sector, rp->blksize, rp->block_id); block_id 1392 drivers/block/drbd/drbd_main.c peer_req->block_id); block_id 1398 drivers/block/drbd/drbd_main.c sector_t sector, int blksize, u64 block_id) block_id 1403 drivers/block/drbd/drbd_main.c cpu_to_be64(block_id)); block_id 1423 drivers/block/drbd/drbd_main.c sector_t sector, int size, u64 block_id) block_id 1433 drivers/block/drbd/drbd_main.c p->block_id = block_id; block_id 1451 drivers/block/drbd/drbd_main.c p->block_id = ID_SYNCER /* unused */; block_id 1466 drivers/block/drbd/drbd_main.c p->block_id = ID_SYNCER /* unused */; block_id 1691 drivers/block/drbd/drbd_main.c p->block_id = (unsigned long)req; block_id 1798 drivers/block/drbd/drbd_main.c p->block_id = peer_req->block_id; block_id 147 drivers/block/drbd/drbd_protocol.h u64 block_id; /* to identify the request in protocol B&C */ block_id 172 drivers/block/drbd/drbd_protocol.h u64 block_id; block_id 179 drivers/block/drbd/drbd_protocol.h u64 block_id; block_id 395 drivers/block/drbd/drbd_receiver.c peer_req->block_id = id; block_id 2159 drivers/block/drbd/drbd_receiver.c req = find_request(device, &device->read_requests, p->block_id, sector, false, __func__); block_id 2191 drivers/block/drbd/drbd_receiver.c D_ASSERT(device, p->block_id == ID_SYNCER); block_id 2622 drivers/block/drbd/drbd_receiver.c peer_req = read_in_block(peer_device, p->block_id, sector, pi); block_id 2898 drivers/block/drbd/drbd_receiver.c peer_req = drbd_alloc_peer_req(peer_device, p->block_id, sector, size, block_id 5753 drivers/block/drbd/drbd_receiver.c if (p->block_id == ID_SYNCER) { block_id 5778 drivers/block/drbd/drbd_receiver.c return validate_req_change_req_state(device, p->block_id, sector, block_id 5799 drivers/block/drbd/drbd_receiver.c if (p->block_id == ID_SYNCER) { block_id 5805 drivers/block/drbd/drbd_receiver.c err = validate_req_change_req_state(device, p->block_id, sector, block_id 5836 drivers/block/drbd/drbd_receiver.c return validate_req_change_req_state(device, p->block_id, sector, block_id 5920 drivers/block/drbd/drbd_receiver.c if (be64_to_cpu(p->block_id) == ID_OUT_OF_SYNC) block_id 109 drivers/block/drbd/drbd_worker.c u64 block_id; block_id 118 drivers/block/drbd/drbd_worker.c block_id = peer_req->block_id; block_id 141 drivers/block/drbd/drbd_worker.c do_wake = list_empty(block_id == ID_SYNCER ? &device->sync_ee : &device->active_ee); block_id 155 drivers/block/drbd/drbd_worker.c if (block_id == ID_SYNCER) block_id 1212 drivers/block/drbd/drbd_worker.c peer_req->block_id = ID_SYNCER; /* By setting block_id, digest pointer becomes invalid! */ block_id 106 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c static int amdgpu_ras_find_block_id_by_name(const char *name, int *block_id) block_id 111 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c *block_id = i; block_id 127 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c int block_id; block_id 152 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c if (amdgpu_ras_find_block_id_by_name(block_name, &block_id)) block_id 155 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c data->head.block = block_id; block_id 456 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c .block_id = amdgpu_ras_block_to_ta(head->block), block_id 461 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c .block_id = amdgpu_ras_block_to_ta(head->block), block_id 641 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c .block_id = amdgpu_ras_block_to_ta(info->head.block), block_id 6080 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c block_info.block_id = amdgpu_ras_block_to_ta(info->head.block); block_id 392 drivers/gpu/drm/amd/amdgpu/kv_dpm.c while (values->block_id != 0xffffffff) { block_id 395 drivers/gpu/drm/amd/amdgpu/kv_dpm.c data = ((values->block_id << local_cac_reg->block_shift) & block_id 79 drivers/gpu/drm/amd/amdgpu/kv_dpm.h u32 block_id; block_id 83 drivers/gpu/drm/amd/amdgpu/ta_ras_if.h enum ta_ras_block block_id; block_id 88 drivers/gpu/drm/amd/amdgpu/ta_ras_if.h enum ta_ras_block block_id; block_id 93 drivers/gpu/drm/amd/amdgpu/ta_ras_if.h enum ta_ras_block block_id; // ras-block. i.e. umc, gfx block_id 2158 drivers/gpu/drm/amd/include/atomfirmware.h union atom_umc_reg_setting_id_config_access block_id; block_id 266 drivers/gpu/drm/radeon/kv_dpm.c while (values->block_id != 0xffffffff) { block_id 269 drivers/gpu/drm/radeon/kv_dpm.c data = ((values->block_id << local_cac_reg->block_shift) & block_id 53 drivers/gpu/drm/radeon/kv_dpm.h u32 block_id; block_id 1162 drivers/memstick/core/ms_block.c p->header.block_id = be16_to_cpu(p->header.block_id); block_id 1225 drivers/memstick/core/ms_block.c if (be16_to_cpu(page->header.block_id) != MS_BLOCK_BOOT_ID) { block_id 52 drivers/memstick/core/ms_block.h unsigned short block_id; block_id 471 drivers/net/dsa/sja1105/sja1105_static_config.c sja1105_packing(buf, &entry->block_id, 31, 24, size, op); block_id 641 drivers/net/dsa/sja1105/sja1105_static_config.c header.block_id = blk_id_map[i]; block_id 663 drivers/net/dsa/sja1105/sja1105_static_config.c header.block_id = 0; block_id 265 drivers/net/dsa/sja1105/sja1105_static_config.h u64 block_id; block_id 1233 drivers/net/ethernet/intel/ice/ice_flex_pipe.c static void ice_fill_tbl(struct ice_hw *hw, enum ice_block block_id, u32 sid) block_id 1268 drivers/net/ethernet/intel/ice/ice_flex_pipe.c sizeof(*hw->blk[block_id].xlt1.t); block_id 1269 drivers/net/ethernet/intel/ice/ice_flex_pipe.c dst = hw->blk[block_id].xlt1.t; block_id 1270 drivers/net/ethernet/intel/ice/ice_flex_pipe.c dst_len = hw->blk[block_id].xlt1.count * block_id 1271 drivers/net/ethernet/intel/ice/ice_flex_pipe.c sizeof(*hw->blk[block_id].xlt1.t); block_id 1281 drivers/net/ethernet/intel/ice/ice_flex_pipe.c sizeof(*hw->blk[block_id].xlt2.t); block_id 1282 drivers/net/ethernet/intel/ice/ice_flex_pipe.c dst = (u8 *)hw->blk[block_id].xlt2.t; block_id 1283 drivers/net/ethernet/intel/ice/ice_flex_pipe.c dst_len = hw->blk[block_id].xlt2.count * block_id 1284 drivers/net/ethernet/intel/ice/ice_flex_pipe.c sizeof(*hw->blk[block_id].xlt2.t); block_id 1294 drivers/net/ethernet/intel/ice/ice_flex_pipe.c sizeof(*hw->blk[block_id].prof.t); block_id 1295 drivers/net/ethernet/intel/ice/ice_flex_pipe.c dst = (u8 *)hw->blk[block_id].prof.t; block_id 1296 drivers/net/ethernet/intel/ice/ice_flex_pipe.c dst_len = hw->blk[block_id].prof.count * block_id 1297 drivers/net/ethernet/intel/ice/ice_flex_pipe.c sizeof(*hw->blk[block_id].prof.t); block_id 1307 drivers/net/ethernet/intel/ice/ice_flex_pipe.c sizeof(*hw->blk[block_id].prof_redir.t); block_id 1308 drivers/net/ethernet/intel/ice/ice_flex_pipe.c dst = hw->blk[block_id].prof_redir.t; block_id 1309 drivers/net/ethernet/intel/ice/ice_flex_pipe.c dst_len = hw->blk[block_id].prof_redir.count * block_id 1310 drivers/net/ethernet/intel/ice/ice_flex_pipe.c sizeof(*hw->blk[block_id].prof_redir.t); block_id 1320 drivers/net/ethernet/intel/ice/ice_flex_pipe.c hw->blk[block_id].es.fvw) * block_id 1321 drivers/net/ethernet/intel/ice/ice_flex_pipe.c sizeof(*hw->blk[block_id].es.t); block_id 1322 drivers/net/ethernet/intel/ice/ice_flex_pipe.c dst = (u8 *)hw->blk[block_id].es.t; block_id 1323 drivers/net/ethernet/intel/ice/ice_flex_pipe.c dst_len = (u32)(hw->blk[block_id].es.count * block_id 1324 drivers/net/ethernet/intel/ice/ice_flex_pipe.c hw->blk[block_id].es.fvw) * block_id 1325 drivers/net/ethernet/intel/ice/ice_flex_pipe.c sizeof(*hw->blk[block_id].es.t); block_id 13 drivers/net/ethernet/mellanox/mlx5/core/lib/hv.c int block_id; block_id 18 drivers/net/ethernet/mellanox/mlx5/core/lib/hv.c block_id = offset / HV_CONFIG_BLOCK_SIZE_MAX; block_id 22 drivers/net/ethernet/mellanox/mlx5/core/lib/hv.c HV_CONFIG_BLOCK_SIZE_MAX, block_id, block_id 25 drivers/net/ethernet/mellanox/mlx5/core/lib/hv.c HV_CONFIG_BLOCK_SIZE_MAX, block_id); block_id 201 drivers/net/ethernet/qlogic/qed/qed_debug.c enum block_id block_id; block_id 1861 drivers/net/ethernet/qlogic/qed/qed_debug.c enum block_id block_id) block_id 1865 drivers/net/ethernet/qlogic/qed/qed_debug.c return (struct dbg_bus_block *)&dbg_bus_blocks[block_id * block_id 2263 drivers/net/ethernet/qlogic/qed/qed_debug.c enum block_id block_id, u8 mem_group_id) block_id 2265 drivers/net/ethernet/qlogic/qed/qed_debug.c struct block_defs *block = s_block_defs[block_id]; block_id 2352 drivers/net/ethernet/qlogic/qed/qed_debug.c u32 block_id, i; block_id 2355 drivers/net/ethernet/qlogic/qed/qed_debug.c for (block_id = 0; block_id < MAX_BLOCK_ID; block_id++) { block_id 2356 drivers/net/ethernet/qlogic/qed/qed_debug.c struct block_defs *block = s_block_defs[block_id]; block_id 2382 drivers/net/ethernet/qlogic/qed/qed_debug.c qed_get_block_attn_data(enum block_id block_id, enum dbg_attn_type attn_type) block_id 2388 drivers/net/ethernet/qlogic/qed/qed_debug.c return &base_attn_block_arr[block_id].per_type_data[attn_type]; block_id 2393 drivers/net/ethernet/qlogic/qed/qed_debug.c qed_get_block_attn_regs(enum block_id block_id, enum dbg_attn_type attn_type, block_id 2397 drivers/net/ethernet/qlogic/qed/qed_debug.c qed_get_block_attn_data(block_id, attn_type); block_id 2413 drivers/net/ethernet/qlogic/qed/qed_debug.c u32 block_id; block_id 2415 drivers/net/ethernet/qlogic/qed/qed_debug.c for (block_id = 0; block_id < MAX_BLOCK_ID; block_id++) { block_id 2416 drivers/net/ethernet/qlogic/qed/qed_debug.c if (dev_data->block_in_reset[block_id]) block_id 2419 drivers/net/ethernet/qlogic/qed/qed_debug.c attn_reg_arr = qed_get_block_attn_regs((enum block_id)block_id, block_id 2702 drivers/net/ethernet/qlogic/qed/qed_debug.c if (!mode_match || !block_enable[cond_hdr->block_id]) { block_id 2907 drivers/net/ethernet/qlogic/qed/qed_debug.c u32 block_id, offset = 0, num_reg_entries = 0; block_id 2917 drivers/net/ethernet/qlogic/qed/qed_debug.c for (block_id = 0; block_id < MAX_BLOCK_ID; block_id++) { block_id 2918 drivers/net/ethernet/qlogic/qed/qed_debug.c if (dev_data->block_in_reset[block_id] && dump) block_id 2921 drivers/net/ethernet/qlogic/qed/qed_debug.c attn_reg_arr = qed_get_block_attn_regs((enum block_id)block_id, block_id 2969 drivers/net/ethernet/qlogic/qed/qed_debug.c if (dev_data->block_in_reset[storm->block_id] && dump) block_id 3201 drivers/net/ethernet/qlogic/qed/qed_debug.c enum block_id block_id; block_id 3209 drivers/net/ethernet/qlogic/qed/qed_debug.c block_id = (enum block_id)cond_hdr->block_id; block_id 3211 drivers/net/ethernet/qlogic/qed/qed_debug.c block_id, block_id 3249 drivers/net/ethernet/qlogic/qed/qed_debug.c [cond_hdr->block_id]->associated_to_storm) { block_id 3253 drivers/net/ethernet/qlogic/qed/qed_debug.c [cond_hdr->block_id]-> block_id 3868 drivers/net/ethernet/qlogic/qed/qed_debug.c enum block_id block_id, block_id 3874 drivers/net/ethernet/qlogic/qed/qed_debug.c struct block_defs *block = s_block_defs[block_id]; block_id 3889 drivers/net/ethernet/qlogic/qed/qed_debug.c u32 block_id, line_id, offset = 0; block_id 3897 drivers/net/ethernet/qlogic/qed/qed_debug.c for (block_id = 0; block_id < MAX_BLOCK_ID; block_id++) { block_id 3898 drivers/net/ethernet/qlogic/qed/qed_debug.c struct block_defs *block = s_block_defs[block_id]; block_id 3916 drivers/net/ethernet/qlogic/qed/qed_debug.c for (block_id = 0; block_id < MAX_BLOCK_ID; block_id++) { block_id 3917 drivers/net/ethernet/qlogic/qed/qed_debug.c struct block_defs *block = s_block_defs[block_id]; block_id 3927 drivers/net/ethernet/qlogic/qed/qed_debug.c (enum block_id)block_id); block_id 3946 drivers/net/ethernet/qlogic/qed/qed_debug.c if (dev_data->block_in_reset[block_id]) { block_id 3966 drivers/net/ethernet/qlogic/qed/qed_debug.c (enum block_id)block_id, block_id 4233 drivers/net/ethernet/qlogic/qed/qed_debug.c u32 block_id; block_id 4241 drivers/net/ethernet/qlogic/qed/qed_debug.c block_id = GET_FIELD(reg->data, DBG_IDLE_CHK_INFO_REG_BLOCK_ID); block_id 4242 drivers/net/ethernet/qlogic/qed/qed_debug.c if (block_id >= MAX_BLOCK_ID) { block_id 4247 drivers/net/ethernet/qlogic/qed/qed_debug.c if (!dev_data->block_in_reset[block_id]) { block_id 4336 drivers/net/ethernet/qlogic/qed/qed_debug.c u32 block_id = block_id 4340 drivers/net/ethernet/qlogic/qed/qed_debug.c if (block_id >= MAX_BLOCK_ID) { block_id 4345 drivers/net/ethernet/qlogic/qed/qed_debug.c check_rule = !dev_data->block_in_reset[block_id]; block_id 5040 drivers/net/ethernet/qlogic/qed/qed_debug.c if (dev_data->block_in_reset[storm->block_id]) block_id 5119 drivers/net/ethernet/qlogic/qed/qed_debug.c if (dev_data->block_in_reset[storm->block_id]) block_id 5559 drivers/net/ethernet/qlogic/qed/qed_debug.c enum block_id block_id, block_id 5576 drivers/net/ethernet/qlogic/qed/qed_debug.c attn_reg_arr = qed_get_block_attn_regs(block_id, block_id 5619 drivers/net/ethernet/qlogic/qed/qed_debug.c results->block_id = (u8)block_id; block_id 5621 drivers/net/ethernet/qlogic/qed/qed_debug.c qed_get_block_attn_data(block_id, attn_type)->names_offset; block_id 5633 drivers/net/ethernet/qlogic/qed/qed_debug.c enum block_id id; block_id 7637 drivers/net/ethernet/qlogic/qed/qed_debug.c block_name = s_block_info_arr[results->block_id].name; block_id 1995 drivers/net/ethernet/qlogic/qed/qed_hsi.h u8 block_id; block_id 2063 drivers/net/ethernet/qlogic/qed/qed_hsi.h u8 block_id; /* block ID */ block_id 2831 drivers/net/ethernet/qlogic/qed/qed_hsi.h u16 block_id; block_id 3337 drivers/net/ethernet/qlogic/qed/qed_hsi.h enum block_id block, block_id 104 drivers/net/ethernet/qlogic/qed/qed_int.c enum block_id block_index; block_id 872 drivers/net/ethernet/qlogic/qed/qed_int.c enum block_id id, block_id 957 drivers/net/ethernet/qlogic/qed/qed_int.c u32 block_id = p_aeu->block_index, mask, val; block_id 963 drivers/net/ethernet/qlogic/qed/qed_int.c if (block_id != MAX_BLOCK_ID) { block_id 964 drivers/net/ethernet/qlogic/qed/qed_int.c qed_int_attn_print(p_hwfn, block_id, ATTN_TYPE_PARITY, false); block_id 967 drivers/net/ethernet/qlogic/qed/qed_int.c if (block_id == BLOCK_BTB) { block_id 22 drivers/pci/controller/pci-hyperv-intf.c unsigned int block_id, unsigned int *bytes_returned) block_id 27 drivers/pci/controller/pci-hyperv-intf.c return hvpci_block_ops.read_block(dev, buf, buf_len, block_id, block_id 33 drivers/pci/controller/pci-hyperv-intf.c unsigned int block_id) block_id 38 drivers/pci/controller/pci-hyperv-intf.c return hvpci_block_ops.write_block(dev, buf, len, block_id); block_id 373 drivers/pci/controller/pci-hyperv.c u32 block_id; block_id 389 drivers/pci/controller/pci-hyperv.c u32 block_id; block_id 934 drivers/pci/controller/pci-hyperv.c unsigned int block_id, unsigned int *bytes_returned) block_id 960 drivers/pci/controller/pci-hyperv.c read_blk->block_id = block_id; block_id 1014 drivers/pci/controller/pci-hyperv.c unsigned int block_id) block_id 1040 drivers/pci/controller/pci-hyperv.c write_blk->block_id = block_id; block_id 1072 drivers/s390/char/tape_34xx.c } __attribute__ ((packed)) block_id; block_id 1075 drivers/s390/char/tape_34xx.c rc = tape_std_read_block_id(device, (__u64 *) &block_id); block_id 1079 drivers/s390/char/tape_34xx.c tape_34xx_add_sbid(device, block_id.cbid); block_id 1080 drivers/s390/char/tape_34xx.c return block_id.cbid.block; block_id 523 drivers/s390/char/tape_3590.c __u64 block_id; block_id 526 drivers/s390/char/tape_3590.c rc = tape_std_read_block_id(device, &block_id); block_id 529 drivers/s390/char/tape_3590.c return block_id >> 32; block_id 1605 include/linux/hyperv.h unsigned int block_id, unsigned int *bytes_returned); block_id 1607 include/linux/hyperv.h unsigned int block_id); block_id 1614 include/linux/hyperv.h unsigned int block_id, unsigned int *bytes_returned); block_id 1616 include/linux/hyperv.h unsigned int block_id); block_id 334 sound/usb/caiaq/input.c unsigned int i, block_id = (buf[0] << 8) | buf[1]; block_id 336 sound/usb/caiaq/input.c switch (block_id) { block_id 460 sound/usb/caiaq/input.c __func__, block_id);