bit_mask 67 arch/arm/mach-socfpga/ocram.c static inline void ecc_set_bits(u32 bit_mask, void __iomem *ioaddr) bit_mask 71 arch/arm/mach-socfpga/ocram.c value |= bit_mask; bit_mask 75 arch/arm/mach-socfpga/ocram.c static inline void ecc_clear_bits(u32 bit_mask, void __iomem *ioaddr) bit_mask 79 arch/arm/mach-socfpga/ocram.c value &= ~bit_mask; bit_mask 83 arch/arm/mach-socfpga/ocram.c static inline int ecc_test_bits(u32 bit_mask, void __iomem *ioaddr) bit_mask 87 arch/arm/mach-socfpga/ocram.c return (value & bit_mask) ? 1 : 0; bit_mask 93 arch/x86/include/asm/hpet.h extern int hpet_mask_rtc_irq_bit(unsigned long bit_mask); bit_mask 94 arch/x86/include/asm/hpet.h extern int hpet_set_rtc_irq_bit(unsigned long bit_mask); bit_mask 1134 arch/x86/kernel/hpet.c int hpet_mask_rtc_irq_bit(unsigned long bit_mask) bit_mask 1139 arch/x86/kernel/hpet.c hpet_rtc_flags &= ~bit_mask; bit_mask 1147 arch/x86/kernel/hpet.c int hpet_set_rtc_irq_bit(unsigned long bit_mask) bit_mask 1154 arch/x86/kernel/hpet.c hpet_rtc_flags |= bit_mask; bit_mask 1156 arch/x86/kernel/hpet.c if ((bit_mask & RTC_UIE) && !(oldbits & RTC_UIE)) bit_mask 99 drivers/clk/bcm/clk-iproc-asiu.c div_h = (val >> clk->div.high_shift) & bit_mask(clk->div.high_width); bit_mask 101 drivers/clk/bcm/clk-iproc-asiu.c div_l = (val >> clk->div.low_shift) & bit_mask(clk->div.low_width); bit_mask 159 drivers/clk/bcm/clk-iproc-asiu.c val &= ~(bit_mask(clk->div.high_width) bit_mask 163 drivers/clk/bcm/clk-iproc-asiu.c val &= ~(bit_mask(clk->div.high_width) bit_mask 167 drivers/clk/bcm/clk-iproc-asiu.c val &= ~(bit_mask(clk->div.low_width) << clk->div.low_shift); bit_mask 170 drivers/clk/bcm/clk-iproc-asiu.c val &= ~(bit_mask(clk->div.low_width) << clk->div.low_shift); bit_mask 198 drivers/clk/bcm/clk-iproc-pll.c val |= bit_mask(ctrl->aon.pwr_width) << ctrl->aon.pwr_shift; bit_mask 209 drivers/clk/bcm/clk-iproc-pll.c val &= ~(bit_mask(ctrl->aon.pwr_width) << ctrl->aon.pwr_shift); bit_mask 221 drivers/clk/bcm/clk-iproc-pll.c val &= ~(bit_mask(ctrl->aon.pwr_width) << ctrl->aon.pwr_shift); bit_mask 228 drivers/clk/bcm/clk-iproc-pll.c val |= bit_mask(ctrl->aon.pwr_width) << ctrl->aon.pwr_shift; bit_mask 266 drivers/clk/bcm/clk-iproc-pll.c val &= ~(bit_mask(dig_filter->ki_width) << dig_filter->ki_shift | bit_mask 267 drivers/clk/bcm/clk-iproc-pll.c bit_mask(dig_filter->kp_width) << dig_filter->kp_shift | bit_mask 268 drivers/clk/bcm/clk-iproc-pll.c bit_mask(dig_filter->ka_width) << dig_filter->ka_shift); bit_mask 301 drivers/clk/bcm/clk-iproc-pll.c bit_mask(ctrl->ndiv_int.width); bit_mask 307 drivers/clk/bcm/clk-iproc-pll.c pdiv = (val >> ctrl->pdiv.shift) & bit_mask(ctrl->pdiv.width); bit_mask 368 drivers/clk/bcm/clk-iproc-pll.c val &= ~(bit_mask(ctrl->ndiv_frac.width) << bit_mask 383 drivers/clk/bcm/clk-iproc-pll.c val &= ~(bit_mask(ctrl->macro_mode.width) << bit_mask 406 drivers/clk/bcm/clk-iproc-pll.c val &= ~(bit_mask(ctrl->ndiv_int.width) << ctrl->ndiv_int.shift); bit_mask 413 drivers/clk/bcm/clk-iproc-pll.c val &= ~(bit_mask(ctrl->ndiv_frac.width) << bit_mask 422 drivers/clk/bcm/clk-iproc-pll.c val &= ~(bit_mask(ctrl->pdiv.width) << ctrl->pdiv.shift); bit_mask 483 drivers/clk/bcm/clk-iproc-pll.c bit_mask(ctrl->ndiv_int.width); bit_mask 489 drivers/clk/bcm/clk-iproc-pll.c bit_mask(ctrl->ndiv_frac.width); bit_mask 494 drivers/clk/bcm/clk-iproc-pll.c pdiv = (val >> ctrl->pdiv.shift) & bit_mask(ctrl->pdiv.width); bit_mask 634 drivers/clk/bcm/clk-iproc-pll.c mdiv = (val >> ctrl->mdiv.shift) & bit_mask(ctrl->mdiv.width); bit_mask 689 drivers/clk/bcm/clk-iproc-pll.c val &= ~(bit_mask(ctrl->mdiv.width) << ctrl->mdiv.shift); bit_mask 691 drivers/clk/bcm/clk-iproc-pll.c val &= ~(bit_mask(ctrl->mdiv.width) << ctrl->mdiv.shift); bit_mask 194 drivers/clk/bcm/clk-kona.c u32 bit_mask = 1 << bit; bit_mask 201 drivers/clk/bcm/clk-kona.c bit_val = (val & bit_mask) != 0; bit_mask 360 drivers/clk/bcm/clk-kona.c u32 bit_mask; bit_mask 367 drivers/clk/bcm/clk-kona.c bit_mask = 1 << gate->status_bit; bit_mask 370 drivers/clk/bcm/clk-kona.c return (reg_val & bit_mask) != 0; bit_mask 477 drivers/dma/mediatek/mtk-uart-apdma.c int bit_mask = 32, rc; bit_mask 497 drivers/dma/mediatek/mtk-uart-apdma.c bit_mask = 33; bit_mask 499 drivers/dma/mediatek/mtk-uart-apdma.c rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(bit_mask)); bit_mask 953 drivers/edac/altera_edac.c static inline void ecc_set_bits(u32 bit_mask, void __iomem *ioaddr) bit_mask 957 drivers/edac/altera_edac.c value |= bit_mask; bit_mask 961 drivers/edac/altera_edac.c static inline void ecc_clear_bits(u32 bit_mask, void __iomem *ioaddr) bit_mask 965 drivers/edac/altera_edac.c value &= ~bit_mask; bit_mask 969 drivers/edac/altera_edac.c static inline int ecc_test_bits(u32 bit_mask, void __iomem *ioaddr) bit_mask 973 drivers/edac/altera_edac.c return (value & bit_mask) ? 1 : 0; bit_mask 435 drivers/gpio/gpio-twl4030.c u8 bit_mask; bit_mask 438 drivers/gpio/gpio-twl4030.c for (bit_mask = 0, j = 0; j < 8; j += 2, gpio_bit <<= 1) { bit_mask 440 drivers/gpio/gpio-twl4030.c bit_mask |= 1 << (j + 1); bit_mask 442 drivers/gpio/gpio-twl4030.c bit_mask |= 1 << (j + 0); bit_mask 444 drivers/gpio/gpio-twl4030.c message[i] = bit_mask; bit_mask 370 drivers/gpu/drm/msm/dsi/phy/dsi_phy.c u32 bit_mask) bit_mask 381 drivers/gpu/drm/msm/dsi/phy/dsi_phy.c dsi_phy_write(phy->base + reg, val | bit_mask); bit_mask 383 drivers/gpu/drm/msm/dsi/phy/dsi_phy.c dsi_phy_write(phy->base + reg, val & (~bit_mask)); bit_mask 104 drivers/gpu/drm/msm/dsi/phy/dsi_phy.h u32 bit_mask); bit_mask 1402 drivers/hid/hid-core.c u8 bit_mask = ((1U << n) - 1); bit_mask 1403 drivers/hid/hid-core.c report[idx] &= ~(bit_mask << bit_shift); bit_mask 308 drivers/hid/hid-prodikeys.c u32 bit_mask; bit_mask 310 drivers/hid/hid-prodikeys.c bit_mask = data[1]; bit_mask 311 drivers/hid/hid-prodikeys.c bit_mask = (bit_mask << 8) | data[2]; bit_mask 312 drivers/hid/hid-prodikeys.c bit_mask = (bit_mask << 8) | data[3]; bit_mask 317 drivers/hid/hid-prodikeys.c if (pm->midi_mode && bit_mask == 0x004000) { bit_mask 327 drivers/hid/hid-prodikeys.c else if (pm->midi_mode && bit_mask == 0x000004) { bit_mask 384 drivers/hid/hid-prodikeys.c u32 bit_mask; bit_mask 387 drivers/hid/hid-prodikeys.c bit_mask = data[1]; bit_mask 388 drivers/hid/hid-prodikeys.c bit_mask = (bit_mask << 8) | data[2]; bit_mask 389 drivers/hid/hid-prodikeys.c bit_mask = (bit_mask << 8) | data[3]; bit_mask 393 drivers/hid/hid-prodikeys.c if (!((0x01 << bit_index) & bit_mask)) { bit_mask 403 drivers/hid/hid-prodikeys.c switch ((0x01 << bit_index) & bit_mask) { bit_mask 1867 drivers/media/dvb-frontends/cxd2880/cxd2880_tnrdmd.c tnr_dmd->cfg_mem[i].bit_mask); bit_mask 1877 drivers/media/dvb-frontends/cxd2880/cxd2880_tnrdmd.c u8 bank, u8 address, u8 value, u8 bit_mask) bit_mask 1890 drivers/media/dvb-frontends/cxd2880/cxd2880_tnrdmd.c tnr_dmd->cfg_mem[i].value &= ~bit_mask; bit_mask 1891 drivers/media/dvb-frontends/cxd2880/cxd2880_tnrdmd.c tnr_dmd->cfg_mem[i].value |= (value & bit_mask); bit_mask 1893 drivers/media/dvb-frontends/cxd2880/cxd2880_tnrdmd.c tnr_dmd->cfg_mem[i].bit_mask |= bit_mask; bit_mask 1906 drivers/media/dvb-frontends/cxd2880/cxd2880_tnrdmd.c tnr_dmd->cfg_mem[tnr_dmd->cfg_mem_last_entry].value = (value & bit_mask); bit_mask 1907 drivers/media/dvb-frontends/cxd2880/cxd2880_tnrdmd.c tnr_dmd->cfg_mem[tnr_dmd->cfg_mem_last_entry].bit_mask = bit_mask; bit_mask 3249 drivers/media/dvb-frontends/cxd2880/cxd2880_tnrdmd.c u8 value, u8 bit_mask) bit_mask 3265 drivers/media/dvb-frontends/cxd2880/cxd2880_tnrdmd.c tgt, address, value, bit_mask); bit_mask 3269 drivers/media/dvb-frontends/cxd2880/cxd2880_tnrdmd.c return set_cfg_mem(tnr_dmd, tgt, bank, address, value, bit_mask); bit_mask 157 drivers/media/dvb-frontends/cxd2880/cxd2880_tnrdmd.h u8 bit_mask; bit_mask 320 drivers/media/dvb-frontends/cxd2880/cxd2880_tnrdmd.h u8 value, u8 bit_mask); bit_mask 407 drivers/media/tuners/r820t.c u8 bit_mask) bit_mask 415 drivers/media/tuners/r820t.c tmp = (rc & ~bit_mask) | (tmp & bit_mask); bit_mask 72 drivers/mfd/adp5520.c uint8_t bit_mask) bit_mask 83 drivers/mfd/adp5520.c reg_val |= bit_mask; bit_mask 103 drivers/mfd/adp5520.c int adp5520_set_bits(struct device *dev, int reg, uint8_t bit_mask) bit_mask 113 drivers/mfd/adp5520.c if (!ret && ((reg_val & bit_mask) != bit_mask)) { bit_mask 114 drivers/mfd/adp5520.c reg_val |= bit_mask; bit_mask 123 drivers/mfd/adp5520.c int adp5520_clr_bits(struct device *dev, int reg, uint8_t bit_mask) bit_mask 133 drivers/mfd/adp5520.c if (!ret && (reg_val & bit_mask)) { bit_mask 134 drivers/mfd/adp5520.c reg_val &= ~bit_mask; bit_mask 170 drivers/mfd/da903x.c int da903x_set_bits(struct device *dev, int reg, uint8_t bit_mask) bit_mask 182 drivers/mfd/da903x.c if ((reg_val & bit_mask) != bit_mask) { bit_mask 183 drivers/mfd/da903x.c reg_val |= bit_mask; bit_mask 192 drivers/mfd/da903x.c int da903x_clr_bits(struct device *dev, int reg, uint8_t bit_mask) bit_mask 204 drivers/mfd/da903x.c if (reg_val & bit_mask) { bit_mask 205 drivers/mfd/da903x.c reg_val &= ~bit_mask; bit_mask 177 drivers/mfd/tps6586x.c int tps6586x_set_bits(struct device *dev, int reg, uint8_t bit_mask) bit_mask 181 drivers/mfd/tps6586x.c return regmap_update_bits(tps6586x->regmap, reg, bit_mask, bit_mask); bit_mask 185 drivers/mfd/tps6586x.c int tps6586x_clr_bits(struct device *dev, int reg, uint8_t bit_mask) bit_mask 189 drivers/mfd/tps6586x.c return regmap_update_bits(tps6586x->regmap, reg, bit_mask, 0); bit_mask 231 drivers/mfd/twl6030-irq.c int twl6030_interrupt_unmask(u8 bit_mask, u8 offset) bit_mask 238 drivers/mfd/twl6030-irq.c unmask_value &= (~(bit_mask)); bit_mask 245 drivers/mfd/twl6030-irq.c int twl6030_interrupt_mask(u8 bit_mask, u8 offset) bit_mask 252 drivers/mfd/twl6030-irq.c mask_value |= (bit_mask); bit_mask 255 drivers/misc/xilinx_sdfec.c u32 bit_mask = 1 << bit_num; bit_mask 258 drivers/misc/xilinx_sdfec.c *config_value = (reg_val & bit_mask) > 0; bit_mask 249 drivers/net/can/ti_hecc.c u32 bit_mask) bit_mask 251 drivers/net/can/ti_hecc.c hecc_write(priv, reg, hecc_read(priv, reg) | bit_mask); bit_mask 255 drivers/net/can/ti_hecc.c u32 bit_mask) bit_mask 257 drivers/net/can/ti_hecc.c hecc_write(priv, reg, hecc_read(priv, reg) & ~bit_mask); bit_mask 260 drivers/net/can/ti_hecc.c static inline u32 hecc_get_bit(struct ti_hecc_priv *priv, int reg, u32 bit_mask) bit_mask 262 drivers/net/can/ti_hecc.c return (hecc_read(priv, reg) & bit_mask) ? 1 : 0; bit_mask 9 drivers/net/ethernet/altera/altera_utils.c void tse_set_bit(void __iomem *ioaddr, size_t offs, u32 bit_mask) bit_mask 12 drivers/net/ethernet/altera/altera_utils.c value |= bit_mask; bit_mask 16 drivers/net/ethernet/altera/altera_utils.c void tse_clear_bit(void __iomem *ioaddr, size_t offs, u32 bit_mask) bit_mask 19 drivers/net/ethernet/altera/altera_utils.c value &= ~bit_mask; bit_mask 23 drivers/net/ethernet/altera/altera_utils.c int tse_bit_is_set(void __iomem *ioaddr, size_t offs, u32 bit_mask) bit_mask 26 drivers/net/ethernet/altera/altera_utils.c return (value & bit_mask) ? 1 : 0; bit_mask 29 drivers/net/ethernet/altera/altera_utils.c int tse_bit_is_clear(void __iomem *ioaddr, size_t offs, u32 bit_mask) bit_mask 32 drivers/net/ethernet/altera/altera_utils.c return (value & bit_mask) ? 0 : 1; bit_mask 11 drivers/net/ethernet/altera/altera_utils.h void tse_set_bit(void __iomem *ioaddr, size_t offs, u32 bit_mask); bit_mask 12 drivers/net/ethernet/altera/altera_utils.h void tse_clear_bit(void __iomem *ioaddr, size_t offs, u32 bit_mask); bit_mask 13 drivers/net/ethernet/altera/altera_utils.h int tse_bit_is_set(void __iomem *ioaddr, size_t offs, u32 bit_mask); bit_mask 14 drivers/net/ethernet/altera/altera_utils.h int tse_bit_is_clear(void __iomem *ioaddr, size_t offs, u32 bit_mask); bit_mask 618 drivers/net/ethernet/brocade/bna/bfi_enet.h u32 bit_mask[BFI_ENET_VLAN_WORDS_MAX]; bit_mask 270 drivers/net/ethernet/brocade/bna/bna_tx_rx.c req->bit_mask[i] = bit_mask 273 drivers/net/ethernet/brocade/bna/bna_tx_rx.c req->bit_mask[i] = 0xFFFFFFFF; bit_mask 34 drivers/net/ethernet/cavium/thunder/nicvf_queues.c u64 bit_mask; bit_mask 38 drivers/net/ethernet/cavium/thunder/nicvf_queues.c bit_mask = (1ULL << bits) - 1; bit_mask 39 drivers/net/ethernet/cavium/thunder/nicvf_queues.c bit_mask = (bit_mask << bit_pos); bit_mask 43 drivers/net/ethernet/cavium/thunder/nicvf_queues.c if (((reg_val & bit_mask) >> bit_pos) == val) bit_mask 1462 drivers/net/ethernet/freescale/fman/fman.c u32 bit_mask; bit_mask 1466 drivers/net/ethernet/freescale/fman/fman.c bit_mask = EX_DMA_BUS_ERROR; bit_mask 1469 drivers/net/ethernet/freescale/fman/fman.c bit_mask = EX_DMA_SINGLE_PORT_ECC; bit_mask 1472 drivers/net/ethernet/freescale/fman/fman.c bit_mask = EX_DMA_READ_ECC; bit_mask 1475 drivers/net/ethernet/freescale/fman/fman.c bit_mask = EX_DMA_SYSTEM_WRITE_ECC; bit_mask 1478 drivers/net/ethernet/freescale/fman/fman.c bit_mask = EX_DMA_FM_WRITE_ECC; bit_mask 1481 drivers/net/ethernet/freescale/fman/fman.c bit_mask = EX_FPM_STALL_ON_TASKS; bit_mask 1484 drivers/net/ethernet/freescale/fman/fman.c bit_mask = EX_FPM_SINGLE_ECC; bit_mask 1487 drivers/net/ethernet/freescale/fman/fman.c bit_mask = EX_FPM_DOUBLE_ECC; bit_mask 1490 drivers/net/ethernet/freescale/fman/fman.c bit_mask = EX_QMI_SINGLE_ECC; bit_mask 1493 drivers/net/ethernet/freescale/fman/fman.c bit_mask = EX_QMI_DOUBLE_ECC; bit_mask 1496 drivers/net/ethernet/freescale/fman/fman.c bit_mask = EX_QMI_DEQ_FROM_UNKNOWN_PORTID; bit_mask 1499 drivers/net/ethernet/freescale/fman/fman.c bit_mask = EX_BMI_LIST_RAM_ECC; bit_mask 1502 drivers/net/ethernet/freescale/fman/fman.c bit_mask = EX_BMI_STORAGE_PROFILE_ECC; bit_mask 1505 drivers/net/ethernet/freescale/fman/fman.c bit_mask = EX_BMI_STATISTICS_RAM_ECC; bit_mask 1508 drivers/net/ethernet/freescale/fman/fman.c bit_mask = EX_BMI_DISPATCH_RAM_ECC; bit_mask 1511 drivers/net/ethernet/freescale/fman/fman.c bit_mask = EX_MURAM_ECC; bit_mask 1514 drivers/net/ethernet/freescale/fman/fman.c bit_mask = 0; bit_mask 1518 drivers/net/ethernet/freescale/fman/fman.c return bit_mask; bit_mask 2040 drivers/net/ethernet/freescale/fman/fman.c u32 bit_mask = 0; bit_mask 2045 drivers/net/ethernet/freescale/fman/fman.c bit_mask = get_exception_flag(exception); bit_mask 2046 drivers/net/ethernet/freescale/fman/fman.c if (bit_mask) { bit_mask 2048 drivers/net/ethernet/freescale/fman/fman.c fman->state->exceptions |= bit_mask; bit_mask 2050 drivers/net/ethernet/freescale/fman/fman.c fman->state->exceptions &= ~bit_mask; bit_mask 539 drivers/net/ethernet/freescale/fman/fman_dtsec.c u32 bit_mask = 0x80000000 >> bit_idx; bit_mask 548 drivers/net/ethernet/freescale/fman/fman_dtsec.c iowrite32be(ioread32be(reg) | bit_mask, reg); bit_mask 550 drivers/net/ethernet/freescale/fman/fman_dtsec.c iowrite32be(ioread32be(reg) & (~bit_mask), reg); bit_mask 608 drivers/net/ethernet/freescale/fman/fman_dtsec.c u32 bit_mask; bit_mask 612 drivers/net/ethernet/freescale/fman/fman_dtsec.c bit_mask = DTSEC_IMASK_BREN; bit_mask 615 drivers/net/ethernet/freescale/fman/fman_dtsec.c bit_mask = DTSEC_IMASK_RXCEN; bit_mask 618 drivers/net/ethernet/freescale/fman/fman_dtsec.c bit_mask = DTSEC_IMASK_GTSCEN; bit_mask 621 drivers/net/ethernet/freescale/fman/fman_dtsec.c bit_mask = DTSEC_IMASK_BTEN; bit_mask 624 drivers/net/ethernet/freescale/fman/fman_dtsec.c bit_mask = DTSEC_IMASK_TXCEN; bit_mask 627 drivers/net/ethernet/freescale/fman/fman_dtsec.c bit_mask = DTSEC_IMASK_TXEEN; bit_mask 630 drivers/net/ethernet/freescale/fman/fman_dtsec.c bit_mask = DTSEC_IMASK_LCEN; bit_mask 633 drivers/net/ethernet/freescale/fman/fman_dtsec.c bit_mask = DTSEC_IMASK_CRLEN; bit_mask 636 drivers/net/ethernet/freescale/fman/fman_dtsec.c bit_mask = DTSEC_IMASK_XFUNEN; bit_mask 639 drivers/net/ethernet/freescale/fman/fman_dtsec.c bit_mask = DTSEC_IMASK_MAGEN; bit_mask 642 drivers/net/ethernet/freescale/fman/fman_dtsec.c bit_mask = DTSEC_IMASK_MMRDEN; bit_mask 645 drivers/net/ethernet/freescale/fman/fman_dtsec.c bit_mask = DTSEC_IMASK_MMWREN; bit_mask 648 drivers/net/ethernet/freescale/fman/fman_dtsec.c bit_mask = DTSEC_IMASK_GRSCEN; bit_mask 651 drivers/net/ethernet/freescale/fman/fman_dtsec.c bit_mask = DTSEC_IMASK_TDPEEN; bit_mask 654 drivers/net/ethernet/freescale/fman/fman_dtsec.c bit_mask = DTSEC_IMASK_MSROEN; bit_mask 657 drivers/net/ethernet/freescale/fman/fman_dtsec.c bit_mask = 0; bit_mask 661 drivers/net/ethernet/freescale/fman/fman_dtsec.c return bit_mask; bit_mask 1340 drivers/net/ethernet/freescale/fman/fman_dtsec.c u32 bit_mask = 0; bit_mask 1346 drivers/net/ethernet/freescale/fman/fman_dtsec.c bit_mask = get_exception_flag(exception); bit_mask 1347 drivers/net/ethernet/freescale/fman/fman_dtsec.c if (bit_mask) { bit_mask 1349 drivers/net/ethernet/freescale/fman/fman_dtsec.c dtsec->exceptions |= bit_mask; bit_mask 1351 drivers/net/ethernet/freescale/fman/fman_dtsec.c dtsec->exceptions &= ~bit_mask; bit_mask 1357 drivers/net/ethernet/freescale/fman/fman_dtsec.c iowrite32be(ioread32be(®s->imask) | bit_mask, bit_mask 1360 drivers/net/ethernet/freescale/fman/fman_dtsec.c iowrite32be(ioread32be(®s->imask) & ~bit_mask, bit_mask 617 drivers/net/ethernet/freescale/fman/fman_memac.c u32 bit_mask; bit_mask 621 drivers/net/ethernet/freescale/fman/fman_memac.c bit_mask = MEMAC_IMASK_TECC_ER; bit_mask 624 drivers/net/ethernet/freescale/fman/fman_memac.c bit_mask = MEMAC_IMASK_RECC_ER; bit_mask 627 drivers/net/ethernet/freescale/fman/fman_memac.c bit_mask = MEMAC_IMASK_TSECC_ER; bit_mask 630 drivers/net/ethernet/freescale/fman/fman_memac.c bit_mask = MEMAC_IMASK_MGI; bit_mask 633 drivers/net/ethernet/freescale/fman/fman_memac.c bit_mask = 0; bit_mask 637 drivers/net/ethernet/freescale/fman/fman_memac.c return bit_mask; bit_mask 1008 drivers/net/ethernet/freescale/fman/fman_memac.c u32 bit_mask = 0; bit_mask 1013 drivers/net/ethernet/freescale/fman/fman_memac.c bit_mask = get_exception_flag(exception); bit_mask 1014 drivers/net/ethernet/freescale/fman/fman_memac.c if (bit_mask) { bit_mask 1016 drivers/net/ethernet/freescale/fman/fman_memac.c memac->exceptions |= bit_mask; bit_mask 1018 drivers/net/ethernet/freescale/fman/fman_memac.c memac->exceptions &= ~bit_mask; bit_mask 1023 drivers/net/ethernet/freescale/fman/fman_memac.c set_exception(memac->regs, bit_mask, enable); bit_mask 294 drivers/net/ethernet/freescale/fman/fman_tgec.c u32 bit_mask; bit_mask 298 drivers/net/ethernet/freescale/fman/fman_tgec.c bit_mask = TGEC_IMASK_MDIO_SCAN_EVENT; bit_mask 301 drivers/net/ethernet/freescale/fman/fman_tgec.c bit_mask = TGEC_IMASK_MDIO_CMD_CMPL; bit_mask 304 drivers/net/ethernet/freescale/fman/fman_tgec.c bit_mask = TGEC_IMASK_REM_FAULT; bit_mask 307 drivers/net/ethernet/freescale/fman/fman_tgec.c bit_mask = TGEC_IMASK_LOC_FAULT; bit_mask 310 drivers/net/ethernet/freescale/fman/fman_tgec.c bit_mask = TGEC_IMASK_TX_ECC_ER; bit_mask 313 drivers/net/ethernet/freescale/fman/fman_tgec.c bit_mask = TGEC_IMASK_TX_FIFO_UNFL; bit_mask 316 drivers/net/ethernet/freescale/fman/fman_tgec.c bit_mask = TGEC_IMASK_TX_FIFO_OVFL; bit_mask 319 drivers/net/ethernet/freescale/fman/fman_tgec.c bit_mask = TGEC_IMASK_TX_ER; bit_mask 322 drivers/net/ethernet/freescale/fman/fman_tgec.c bit_mask = TGEC_IMASK_RX_FIFO_OVFL; bit_mask 325 drivers/net/ethernet/freescale/fman/fman_tgec.c bit_mask = TGEC_IMASK_RX_ECC_ER; bit_mask 328 drivers/net/ethernet/freescale/fman/fman_tgec.c bit_mask = TGEC_IMASK_RX_JAB_FRM; bit_mask 331 drivers/net/ethernet/freescale/fman/fman_tgec.c bit_mask = TGEC_IMASK_RX_OVRSZ_FRM; bit_mask 334 drivers/net/ethernet/freescale/fman/fman_tgec.c bit_mask = TGEC_IMASK_RX_RUNT_FRM; bit_mask 337 drivers/net/ethernet/freescale/fman/fman_tgec.c bit_mask = TGEC_IMASK_RX_FRAG_FRM; bit_mask 340 drivers/net/ethernet/freescale/fman/fman_tgec.c bit_mask = TGEC_IMASK_RX_LEN_ER; bit_mask 343 drivers/net/ethernet/freescale/fman/fman_tgec.c bit_mask = TGEC_IMASK_RX_CRC_ER; bit_mask 346 drivers/net/ethernet/freescale/fman/fman_tgec.c bit_mask = TGEC_IMASK_RX_ALIGN_ER; bit_mask 349 drivers/net/ethernet/freescale/fman/fman_tgec.c bit_mask = 0; bit_mask 353 drivers/net/ethernet/freescale/fman/fman_tgec.c return bit_mask; bit_mask 665 drivers/net/ethernet/freescale/fman/fman_tgec.c u32 bit_mask = 0; bit_mask 670 drivers/net/ethernet/freescale/fman/fman_tgec.c bit_mask = get_exception_flag(exception); bit_mask 671 drivers/net/ethernet/freescale/fman/fman_tgec.c if (bit_mask) { bit_mask 673 drivers/net/ethernet/freescale/fman/fman_tgec.c tgec->exceptions |= bit_mask; bit_mask 675 drivers/net/ethernet/freescale/fman/fman_tgec.c tgec->exceptions &= ~bit_mask; bit_mask 681 drivers/net/ethernet/freescale/fman/fman_tgec.c iowrite32be(ioread32be(®s->imask) | bit_mask, ®s->imask); bit_mask 683 drivers/net/ethernet/freescale/fman/fman_tgec.c iowrite32be(ioread32be(®s->imask) & ~bit_mask, ®s->imask); bit_mask 236 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_rule.c mlx5dr_ste_set_bit_mask(hw_ste, nic_matcher->ste_builder[sb_idx].bit_mask); bit_mask 411 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_rule.c nic_matcher->ste_builder[ste_location - 1].bit_mask)) { bit_mask 33 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c #define DR_STE_SET_MASK(lookup_type, bit_mask, bm_fname, spec, s_fname) \ bit_mask 34 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_VAL(lookup_type, bit_mask, bm_fname, spec, s_fname, -1) bit_mask 37 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c #define DR_STE_SET_MASK_V(lookup_type, bit_mask, bm_fname, spec, s_fname) \ bit_mask 38 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_VAL(lookup_type, bit_mask, bm_fname, spec, s_fname, (spec)->s_fname) bit_mask 52 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c #define DR_STE_SET_MPLS_MASK(lookup_type, mask, in_out, bit_mask) do { \ bit_mask 137 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c static u16 dr_ste_conv_bit_to_byte_mask(u8 *bit_mask) bit_mask 144 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c if (bit_mask[i] == 0xff) bit_mask 150 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c void mlx5dr_ste_set_bit_mask(u8 *hw_ste_p, u8 *bit_mask) bit_mask 154 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c memcpy(hw_ste->mask, bit_mask, DR_STE_SIZE_MASK); bit_mask 753 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c mlx5dr_ste_set_bit_mask(ste_arr, sb->bit_mask); bit_mask 774 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c bool inner, u8 *bit_mask) bit_mask 778 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l2_src_dst, bit_mask, dmac_47_16, mask, dmac_47_16); bit_mask 779 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l2_src_dst, bit_mask, dmac_15_0, mask, dmac_15_0); bit_mask 782 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c MLX5_SET(ste_eth_l2_src_dst, bit_mask, smac_47_32, bit_mask 784 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c MLX5_SET(ste_eth_l2_src_dst, bit_mask, smac_31_0, bit_mask 790 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l2_src_dst, bit_mask, first_vlan_id, mask, first_vid); bit_mask 791 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l2_src_dst, bit_mask, first_cfi, mask, first_cfi); bit_mask 792 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l2_src_dst, bit_mask, first_priority, mask, first_prio); bit_mask 793 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK(eth_l2_src_dst, bit_mask, l3_type, mask, ip_version); bit_mask 796 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c MLX5_SET(ste_eth_l2_src_dst, bit_mask, first_vlan_qualifier, -1); bit_mask 799 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c MLX5_SET(ste_eth_l2_src_dst, bit_mask, first_vlan_qualifier, -1); bit_mask 1106 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c ret = dr_ste_build_eth_l2_src_des_bit_mask(mask, inner, sb->bit_mask); bit_mask 1113 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c sb->byte_mask = dr_ste_conv_bit_to_byte_mask(sb->bit_mask); bit_mask 1120 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c bool inner, u8 *bit_mask) bit_mask 1124 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l3_ipv6_dst, bit_mask, dst_ip_127_96, mask, dst_ip_127_96); bit_mask 1125 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l3_ipv6_dst, bit_mask, dst_ip_95_64, mask, dst_ip_95_64); bit_mask 1126 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l3_ipv6_dst, bit_mask, dst_ip_63_32, mask, dst_ip_63_32); bit_mask 1127 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l3_ipv6_dst, bit_mask, dst_ip_31_0, mask, dst_ip_31_0); bit_mask 1150 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c dr_ste_build_eth_l3_ipv6_dst_bit_mask(mask, inner, sb->bit_mask); bit_mask 1155 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c sb->byte_mask = dr_ste_conv_bit_to_byte_mask(sb->bit_mask); bit_mask 1160 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c bool inner, u8 *bit_mask) bit_mask 1164 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l3_ipv6_src, bit_mask, src_ip_127_96, mask, src_ip_127_96); bit_mask 1165 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l3_ipv6_src, bit_mask, src_ip_95_64, mask, src_ip_95_64); bit_mask 1166 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l3_ipv6_src, bit_mask, src_ip_63_32, mask, src_ip_63_32); bit_mask 1167 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l3_ipv6_src, bit_mask, src_ip_31_0, mask, src_ip_31_0); bit_mask 1190 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c dr_ste_build_eth_l3_ipv6_src_bit_mask(mask, inner, sb->bit_mask); bit_mask 1195 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c sb->byte_mask = dr_ste_conv_bit_to_byte_mask(sb->bit_mask); bit_mask 1201 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c u8 *bit_mask) bit_mask 1205 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l3_ipv4_5_tuple, bit_mask, bit_mask 1207 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l3_ipv4_5_tuple, bit_mask, bit_mask 1209 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l3_ipv4_5_tuple, bit_mask, bit_mask 1211 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l3_ipv4_5_tuple, bit_mask, bit_mask 1213 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l3_ipv4_5_tuple, bit_mask, bit_mask 1215 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l3_ipv4_5_tuple, bit_mask, bit_mask 1217 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l3_ipv4_5_tuple, bit_mask, bit_mask 1219 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l3_ipv4_5_tuple, bit_mask, bit_mask 1221 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l3_ipv4_5_tuple, bit_mask, bit_mask 1223 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l3_ipv4_5_tuple, bit_mask, bit_mask 1227 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_TCP_FLAGS(eth_l3_ipv4_5_tuple, bit_mask, mask); bit_mask 1263 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c dr_ste_build_eth_l3_ipv4_5_tuple_bit_mask(mask, inner, sb->bit_mask); bit_mask 1268 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c sb->byte_mask = dr_ste_conv_bit_to_byte_mask(sb->bit_mask); bit_mask 1274 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c bool inner, u8 *bit_mask) bit_mask 1279 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l2_src, bit_mask, first_vlan_id, mask, first_vid); bit_mask 1280 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l2_src, bit_mask, first_cfi, mask, first_cfi); bit_mask 1281 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l2_src, bit_mask, first_priority, mask, first_prio); bit_mask 1282 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l2_src, bit_mask, ip_fragmented, mask, frag); bit_mask 1283 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l2_src, bit_mask, l3_ethertype, mask, ethertype); bit_mask 1284 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK(eth_l2_src, bit_mask, l3_type, mask, ip_version); bit_mask 1287 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c MLX5_SET(ste_eth_l2_src, bit_mask, first_vlan_qualifier, -1); bit_mask 1295 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c MLX5_SET(ste_eth_l2_src, bit_mask, second_vlan_qualifier, -1); bit_mask 1300 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l2_src, bit_mask, bit_mask 1302 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l2_src, bit_mask, bit_mask 1304 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l2_src, bit_mask, bit_mask 1309 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c MLX5_SET(ste_eth_l2_src, bit_mask, second_vlan_qualifier, -1); bit_mask 1314 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l2_src, bit_mask, bit_mask 1316 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l2_src, bit_mask, bit_mask 1318 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l2_src, bit_mask, bit_mask 1387 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c bool inner, u8 *bit_mask) bit_mask 1391 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l2_src, bit_mask, smac_47_16, mask, smac_47_16); bit_mask 1392 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l2_src, bit_mask, smac_15_0, mask, smac_15_0); bit_mask 1394 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c dr_ste_build_eth_l2_src_or_dst_bit_mask(value, inner, bit_mask); bit_mask 1415 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c dr_ste_build_eth_l2_src_bit_mask(mask, inner, sb->bit_mask); bit_mask 1419 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c sb->byte_mask = dr_ste_conv_bit_to_byte_mask(sb->bit_mask); bit_mask 1424 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c bool inner, u8 *bit_mask) bit_mask 1428 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l2_dst, bit_mask, dmac_47_16, mask, dmac_47_16); bit_mask 1429 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l2_dst, bit_mask, dmac_15_0, mask, dmac_15_0); bit_mask 1431 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c dr_ste_build_eth_l2_src_or_dst_bit_mask(value, inner, bit_mask); bit_mask 1452 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c dr_ste_build_eth_l2_dst_bit_mask(mask, inner, sb->bit_mask); bit_mask 1457 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c sb->byte_mask = dr_ste_conv_bit_to_byte_mask(sb->bit_mask); bit_mask 1462 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c bool inner, u8 *bit_mask) bit_mask 1467 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l2_tnl, bit_mask, dmac_47_16, mask, dmac_47_16); bit_mask 1468 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l2_tnl, bit_mask, dmac_15_0, mask, dmac_15_0); bit_mask 1469 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l2_tnl, bit_mask, first_vlan_id, mask, first_vid); bit_mask 1470 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l2_tnl, bit_mask, first_cfi, mask, first_cfi); bit_mask 1471 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l2_tnl, bit_mask, first_priority, mask, first_prio); bit_mask 1472 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l2_tnl, bit_mask, ip_fragmented, mask, frag); bit_mask 1473 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l2_tnl, bit_mask, l3_ethertype, mask, ethertype); bit_mask 1474 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK(eth_l2_tnl, bit_mask, l3_type, mask, ip_version); bit_mask 1477 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c MLX5_SET(ste_eth_l2_tnl, bit_mask, bit_mask 1483 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c MLX5_SET(ste_eth_l2_tnl, bit_mask, first_vlan_qualifier, -1); bit_mask 1538 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c dr_ste_build_eth_l2_tnl_bit_mask(mask, inner, sb->bit_mask); bit_mask 1543 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c sb->byte_mask = dr_ste_conv_bit_to_byte_mask(sb->bit_mask); bit_mask 1548 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c bool inner, u8 *bit_mask) bit_mask 1552 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l3_ipv4_misc, bit_mask, time_to_live, mask, ttl_hoplimit); bit_mask 1572 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c dr_ste_build_eth_l3_ipv4_misc_bit_mask(mask, inner, sb->bit_mask); bit_mask 1577 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c sb->byte_mask = dr_ste_conv_bit_to_byte_mask(sb->bit_mask); bit_mask 1582 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c bool inner, u8 *bit_mask) bit_mask 1586 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l4, bit_mask, dst_port, mask, tcp_dport); bit_mask 1587 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l4, bit_mask, src_port, mask, tcp_sport); bit_mask 1588 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l4, bit_mask, dst_port, mask, udp_dport); bit_mask 1589 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l4, bit_mask, src_port, mask, udp_sport); bit_mask 1590 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l4, bit_mask, protocol, mask, ip_protocol); bit_mask 1591 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l4, bit_mask, fragmented, mask, frag); bit_mask 1592 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l4, bit_mask, dscp, mask, ip_dscp); bit_mask 1593 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l4, bit_mask, ecn, mask, ip_ecn); bit_mask 1594 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l4, bit_mask, ipv6_hop_limit, mask, ttl_hoplimit); bit_mask 1597 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_TCP_FLAGS(eth_l4, bit_mask, mask); bit_mask 1632 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c dr_ste_build_ipv6_l3_l4_bit_mask(mask, inner, sb->bit_mask); bit_mask 1637 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c sb->byte_mask = dr_ste_conv_bit_to_byte_mask(sb->bit_mask); bit_mask 1657 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c bool inner, u8 *bit_mask) bit_mask 1662 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MPLS_MASK(mpls, misc2_mask, inner, bit_mask); bit_mask 1664 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MPLS_MASK(mpls, misc2_mask, outer, bit_mask); bit_mask 1687 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c dr_ste_build_mpls_bit_mask(mask, inner, sb->bit_mask); bit_mask 1692 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c sb->byte_mask = dr_ste_conv_bit_to_byte_mask(sb->bit_mask); bit_mask 1697 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c bool inner, u8 *bit_mask) bit_mask 1701 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(gre, bit_mask, gre_protocol, misc_mask, gre_protocol); bit_mask 1702 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(gre, bit_mask, gre_k_present, misc_mask, gre_k_present); bit_mask 1703 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(gre, bit_mask, gre_key_h, misc_mask, gre_key_h); bit_mask 1704 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(gre, bit_mask, gre_key_l, misc_mask, gre_key_l); bit_mask 1706 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(gre, bit_mask, gre_c_present, misc_mask, gre_c_present); bit_mask 1707 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(gre, bit_mask, gre_s_present, misc_mask, gre_s_present); bit_mask 1734 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c dr_ste_build_gre_bit_mask(mask, inner, sb->bit_mask); bit_mask 1739 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c sb->byte_mask = dr_ste_conv_bit_to_byte_mask(sb->bit_mask); bit_mask 1744 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c bool inner, u8 *bit_mask) bit_mask 1749 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(flex_parser_0, bit_mask, parser_3_label, bit_mask 1752 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(flex_parser_0, bit_mask, parser_3_exp, bit_mask 1755 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(flex_parser_0, bit_mask, parser_3_s_bos, bit_mask 1758 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(flex_parser_0, bit_mask, parser_3_ttl, bit_mask 1761 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(flex_parser_0, bit_mask, parser_3_label, bit_mask 1764 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(flex_parser_0, bit_mask, parser_3_exp, bit_mask 1767 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(flex_parser_0, bit_mask, parser_3_s_bos, bit_mask 1770 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(flex_parser_0, bit_mask, parser_3_ttl, bit_mask 1815 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c dr_ste_build_flex_parser_0_bit_mask(mask, inner, sb->bit_mask); bit_mask 1820 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c sb->byte_mask = dr_ste_conv_bit_to_byte_mask(sb->bit_mask); bit_mask 1830 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c u8 *bit_mask) bit_mask 1857 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c MLX5_SET(ste_flex_parser_1, bit_mask, flex_parser_4, bit_mask 1865 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c u32 cur_val = MLX5_GET(ste_flex_parser_1, bit_mask, bit_mask 1867 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c MLX5_SET(ste_flex_parser_1, bit_mask, flex_parser_4, bit_mask 1882 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c MLX5_SET(ste_flex_parser_1, bit_mask, flex_parser_5, bit_mask 1977 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c ret = dr_ste_build_flex_parser_1_bit_mask(mask, caps, sb->bit_mask); bit_mask 1985 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c sb->byte_mask = dr_ste_conv_bit_to_byte_mask(sb->bit_mask); bit_mask 1992 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c bool inner, u8 *bit_mask) bit_mask 1996 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(general_purpose, bit_mask, bit_mask 2019 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c dr_ste_build_general_purpose_bit_mask(mask, inner, sb->bit_mask); bit_mask 2024 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c sb->byte_mask = dr_ste_conv_bit_to_byte_mask(sb->bit_mask); bit_mask 2029 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c bool inner, u8 *bit_mask) bit_mask 2034 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l4_misc, bit_mask, seq_num, misc_3_mask, bit_mask 2036 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l4_misc, bit_mask, ack_num, misc_3_mask, bit_mask 2039 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l4_misc, bit_mask, seq_num, misc_3_mask, bit_mask 2041 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(eth_l4_misc, bit_mask, ack_num, misc_3_mask, bit_mask 2069 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c dr_ste_build_eth_l4_misc_bit_mask(mask, inner, sb->bit_mask); bit_mask 2074 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c sb->byte_mask = dr_ste_conv_bit_to_byte_mask(sb->bit_mask); bit_mask 2079 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c bool inner, u8 *bit_mask) bit_mask 2085 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c MLX5_SET(ste_flex_parser_tnl, bit_mask, bit_mask 2094 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c MLX5_SET(ste_flex_parser_tnl, bit_mask, bit_mask 2133 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c dr_ste_build_flex_parser_tnl_bit_mask(mask, inner, sb->bit_mask); bit_mask 2138 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c sb->byte_mask = dr_ste_conv_bit_to_byte_mask(sb->bit_mask); bit_mask 2143 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c u8 *bit_mask) bit_mask 2147 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(register_0, bit_mask, register_0_h, bit_mask 2149 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(register_0, bit_mask, register_0_l, bit_mask 2151 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(register_0, bit_mask, register_1_h, bit_mask 2153 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(register_0, bit_mask, register_1_l, bit_mask 2177 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c dr_ste_build_register_0_bit_mask(mask, sb->bit_mask); bit_mask 2182 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c sb->byte_mask = dr_ste_conv_bit_to_byte_mask(sb->bit_mask); bit_mask 2187 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c u8 *bit_mask) bit_mask 2191 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(register_1, bit_mask, register_2_h, bit_mask 2193 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(register_1, bit_mask, register_2_l, bit_mask 2195 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(register_1, bit_mask, register_3_h, bit_mask 2197 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK_V(register_1, bit_mask, register_3_l, bit_mask 2221 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c dr_ste_build_register_1_bit_mask(mask, sb->bit_mask); bit_mask 2226 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c sb->byte_mask = dr_ste_conv_bit_to_byte_mask(sb->bit_mask); bit_mask 2231 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c u8 *bit_mask) bit_mask 2244 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK(src_gvmi_qp, bit_mask, source_gvmi, misc_mask, source_port); bit_mask 2245 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c DR_STE_SET_MASK(src_gvmi_qp, bit_mask, source_qp, misc_mask, source_sqn); bit_mask 2260 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c u8 *bit_mask = sb->bit_mask; bit_mask 2283 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c source_gvmi_set = MLX5_GET(ste_src_gvmi_qp, bit_mask, source_gvmi); bit_mask 2303 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c ret = dr_ste_build_src_gvmi_qpn_bit_mask(mask, sb->bit_mask); bit_mask 2311 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c sb->byte_mask = dr_ste_conv_bit_to_byte_mask(sb->bit_mask); bit_mask 188 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_types.h u8 bit_mask[DR_STE_SIZE_MASK]; bit_mask 223 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_types.h void mlx5dr_ste_set_bit_mask(u8 *hw_ste_p, u8 *bit_mask); bit_mask 118 drivers/net/ethernet/mellanox/mlx5/core/steering/mlx5_ifc_dr.h u8 bit_mask[0x60]; bit_mask 84 drivers/net/ethernet/microchip/lan743x_main.c int offset, u32 bit_mask, bit_mask 91 drivers/net/ethernet/microchip/lan743x_main.c target_value == ((data & bit_mask) ? 1 : 0), bit_mask 45 drivers/net/ethernet/microchip/lan743x_ptp.c u32 bit_mask) bit_mask 52 drivers/net/ethernet/microchip/lan743x_ptp.c bit_mask))) { bit_mask 59 drivers/net/ethernet/microchip/lan743x_ptp.c bit_mask); bit_mask 187 drivers/net/ethernet/microchip/lan743x_ptp.c int bit_mask = BIT(bit); bit_mask 192 drivers/net/ethernet/microchip/lan743x_ptp.c if (!(gpio->used_bits & bit_mask)) { bit_mask 193 drivers/net/ethernet/microchip/lan743x_ptp.c gpio->used_bits |= bit_mask; bit_mask 194 drivers/net/ethernet/microchip/lan743x_ptp.c gpio->output_bits |= bit_mask; bit_mask 195 drivers/net/ethernet/microchip/lan743x_ptp.c gpio->ptp_bits |= bit_mask; bit_mask 231 drivers/net/ethernet/microchip/lan743x_ptp.c int bit_mask = BIT(bit); bit_mask 234 drivers/net/ethernet/microchip/lan743x_ptp.c if (gpio->used_bits & bit_mask) { bit_mask 235 drivers/net/ethernet/microchip/lan743x_ptp.c gpio->used_bits &= ~bit_mask; bit_mask 236 drivers/net/ethernet/microchip/lan743x_ptp.c if (gpio->output_bits & bit_mask) { bit_mask 237 drivers/net/ethernet/microchip/lan743x_ptp.c gpio->output_bits &= ~bit_mask; bit_mask 239 drivers/net/ethernet/microchip/lan743x_ptp.c if (gpio->ptp_bits & bit_mask) { bit_mask 240 drivers/net/ethernet/microchip/lan743x_ptp.c gpio->ptp_bits &= ~bit_mask; bit_mask 343 drivers/net/wireless/ralink/rt2x00/rt2500usb.c mask = TXRX_CSR0_KEY_ID.bit_mask; bit_mask 1705 drivers/net/wireless/ralink/rt2x00/rt2800lib.c field.bit_mask = 0x7 << field.bit_offset; bit_mask 10408 drivers/net/wireless/ralink/rt2x00/rt2800lib.c field.bit_mask = 0xffff << field.bit_offset; bit_mask 10416 drivers/net/wireless/ralink/rt2x00/rt2800lib.c field.bit_mask = 0xf << field.bit_offset; bit_mask 149 drivers/net/wireless/ralink/rt2x00/rt2x00reg.h u8 bit_mask; bit_mask 154 drivers/net/wireless/ralink/rt2x00/rt2x00reg.h u16 bit_mask; bit_mask 159 drivers/net/wireless/ralink/rt2x00/rt2x00reg.h u32 bit_mask; bit_mask 238 drivers/net/wireless/ralink/rt2x00/rt2x00reg.h *(__reg) &= ~((__field).bit_mask); \ bit_mask 241 drivers/net/wireless/ralink/rt2x00/rt2x00reg.h ((__field).bit_mask); \ bit_mask 247 drivers/net/wireless/ralink/rt2x00/rt2x00reg.h ((__reg) & ((__field).bit_mask)) >> \ bit_mask 2830 drivers/net/wireless/ralink/rt2x00/rt61pci.c field.bit_mask = 0xffff << field.bit_offset; bit_mask 2838 drivers/net/wireless/ralink/rt2x00/rt61pci.c field.bit_mask = 0xf << field.bit_offset; bit_mask 309 drivers/net/wireless/ralink/rt2x00/rt73usb.c field.bit_mask = 0x7 << field.bit_offset; bit_mask 316 drivers/net/wireless/ralink/rt2x00/rt73usb.c field.bit_mask = 0x7 << field.bit_offset; bit_mask 2253 drivers/net/wireless/ralink/rt2x00/rt73usb.c field.bit_mask = 0xffff << field.bit_offset; bit_mask 2261 drivers/net/wireless/ralink/rt2x00/rt73usb.c field.bit_mask = 0xf << field.bit_offset; bit_mask 942 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.c u32 bit_mask, u8 data) bit_mask 949 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.c if (bit_mask != MASKDWORD) {/*if not "double word" write*/ bit_mask 952 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.c if ((bit_mask>>i) & 0x1) bit_mask 956 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.c data = (original_value & (~bit_mask)) | bit_mask 957 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.c ((data << bit_shift) & bit_mask); bit_mask 993 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.c static void halbtc_set_bbreg(void *bt_context, u32 reg_addr, u32 bit_mask, bit_mask 999 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.c rtl_set_bbreg(rtlpriv->mac80211.hw, reg_addr, bit_mask, data); bit_mask 1002 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.c static u32 halbtc_get_bbreg(void *bt_context, u32 reg_addr, u32 bit_mask) bit_mask 1007 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.c return rtl_get_bbreg(rtlpriv->mac80211.hw, reg_addr, bit_mask); bit_mask 1011 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.c u32 bit_mask, u32 data) bit_mask 1016 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.c rtl_set_rfreg(rtlpriv->mac80211.hw, rf_path, reg_addr, bit_mask, data); bit_mask 1020 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.c u32 bit_mask) bit_mask 1025 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.c return rtl_get_rfreg(rtlpriv->mac80211.hw, rf_path, reg_addr, bit_mask); bit_mask 694 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.h u32 bit_mask, u8 data1b); bit_mask 703 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.h u32 bit_mask, u32 data); bit_mask 705 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.h u32 bit_mask); bit_mask 707 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.h u32 bit_mask, u32 data); bit_mask 709 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.h u32 reg_addr, u32 bit_mask); bit_mask 420 drivers/platform/x86/intel_pmc_core.c pf_map[index].bit_mask & pf_reg ? "Off" : "On"); bit_mask 511 drivers/platform/x86/intel_pmc_core.c map[index].bit_mask & val_low ? "Not power gated" : bit_mask 518 drivers/platform/x86/intel_pmc_core.c map[index].bit_mask & val_high ? "Not power gated" : bit_mask 555 drivers/platform/x86/intel_pmc_core.c map[index].bit_mask & val ? "Active" : "Idle"); bit_mask 652 drivers/platform/x86/intel_pmc_core.c data & map->bit_mask ? bit_mask 709 drivers/platform/x86/intel_pmc_core.c map[index].bit_mask); bit_mask 742 drivers/platform/x86/intel_pmc_core.c if (rdmsrl_safe(map[index].bit_mask, &pcstate_count)) bit_mask 1011 drivers/platform/x86/intel_pmc_core.c data & map->bit_mask ? "Yes" : "No"); bit_mask 191 drivers/platform/x86/intel_pmc_core.h u32 bit_mask; bit_mask 22 drivers/platform/x86/pmc_atom.c u32 bit_mask; bit_mask 278 drivers/platform/x86/pmc_atom.c fd_map[index].bit_mask & fd ? "Disabled" : "Enabled ", bit_mask 279 drivers/platform/x86/pmc_atom.c sts_map[index].bit_mask & sts ? "D3" : "D0"); bit_mask 316 drivers/platform/x86/pmc_atom.c map[index].bit_mask & pss ? "Off" : "On"); bit_mask 1294 drivers/scsi/bfa/bfa_fcbuild.c fc_get_fc4type_bitmask(u8 fc4_type, u8 *bit_mask) bit_mask 1297 drivers/scsi/bfa/bfa_fcbuild.c __be32 *ptr = (__be32 *) bit_mask; bit_mask 265 drivers/scsi/bfa/bfa_fcbuild.h void fc_get_fc4type_bitmask(u8 fc4_type, u8 *bit_mask); bit_mask 394 drivers/spi/spi-armada-3700.c unsigned int bit_mask) bit_mask 399 drivers/spi/spi-armada-3700.c a3700_spi->wait_mask = bit_mask; bit_mask 507 drivers/staging/comedi/drivers/ni_mio_common.c unsigned int bit_mask, bit_mask 516 drivers/staging/comedi/drivers/ni_mio_common.c devpriv->int_a_enable_reg &= ~bit_mask; bit_mask 517 drivers/staging/comedi/drivers/ni_mio_common.c devpriv->int_a_enable_reg |= bit_values & bit_mask; bit_mask 521 drivers/staging/comedi/drivers/ni_mio_common.c devpriv->int_b_enable_reg &= ~bit_mask; bit_mask 522 drivers/staging/comedi/drivers/ni_mio_common.c devpriv->int_b_enable_reg |= bit_values & bit_mask; bit_mask 526 drivers/staging/comedi/drivers/ni_mio_common.c devpriv->io_bidirection_pin_reg &= ~bit_mask; bit_mask 527 drivers/staging/comedi/drivers/ni_mio_common.c devpriv->io_bidirection_pin_reg |= bit_values & bit_mask; bit_mask 531 drivers/staging/comedi/drivers/ni_mio_common.c devpriv->ai_ao_select_reg &= ~bit_mask; bit_mask 532 drivers/staging/comedi/drivers/ni_mio_common.c devpriv->ai_ao_select_reg |= bit_values & bit_mask; bit_mask 536 drivers/staging/comedi/drivers/ni_mio_common.c devpriv->g0_g1_select_reg &= ~bit_mask; bit_mask 537 drivers/staging/comedi/drivers/ni_mio_common.c devpriv->g0_g1_select_reg |= bit_values & bit_mask; bit_mask 541 drivers/staging/comedi/drivers/ni_mio_common.c devpriv->cdio_dma_select_reg &= ~bit_mask; bit_mask 542 drivers/staging/comedi/drivers/ni_mio_common.c devpriv->cdio_dma_select_reg |= bit_values & bit_mask; bit_mask 161 drivers/staging/most/dim2/hal.c u32 const cmd = bit_mask(MADR_WNR_BIT) | bit_mask(MADR_TB_BIT); bit_mask 197 drivers/staging/most/dim2/hal.c dim2_transfer_madr(bit_mask(MADR_WNR_BIT) | ctr_addr); bit_mask 306 drivers/staging/most/dim2/hal.c bit_mask(ADT1_PS_BIT + shift) | bit_mask 307 drivers/staging/most/dim2/hal.c bit_mask(ADT1_RDY_BIT + shift) | bit_mask 329 drivers/staging/most/dim2/hal.c bit_mask(ADT1_RDY_BIT + shift) | bit_mask 360 drivers/staging/most/dim2/hal.c writel(readl(&g.dim2->ACMR0) | bit_mask(ch_addr), &g.dim2->ACMR0); bit_mask 366 drivers/staging/most/dim2/hal.c writel(readl(&g.dim2->ACMR0) & ~bit_mask(ch_addr), &g.dim2->ACMR0); bit_mask 375 drivers/staging/most/dim2/hal.c writel(bit_mask(ch_addr), &g.dim2->ACSR0); bit_mask 551 drivers/staging/most/dim2/hal.c writel(bit_mask(HCTL_EN_BIT), &g.dim2->HCTL); bit_mask 560 drivers/staging/most/dim2/hal.c u32 const mask0 = bit_mask(MLBC0_MLBLK_BIT); bit_mask 561 drivers/staging/most/dim2/hal.c u32 const mask1 = bit_mask(MLBC1_CLKMERR_BIT) | bit_mask 562 drivers/staging/most/dim2/hal.c bit_mask(MLBC1_LOCKERR_BIT); bit_mask 585 drivers/staging/most/dim2/hal.c bit_mask(ADT1_DNE_BIT + shift) | bit_mask 586 drivers/staging/most/dim2/hal.c bit_mask(ADT1_ERR_BIT + shift) | bit_mask 587 drivers/staging/most/dim2/hal.c bit_mask(ADT1_RDY_BIT + shift); bit_mask 591 drivers/staging/most/dim2/hal.c writel(bit_mask(ch_addr), &g.dim2->ACSR0); bit_mask 825 drivers/staging/most/dim2/hal.c writel(bit_mask(20), &g.dim2->MIEN); bit_mask 534 drivers/staging/rtl8188eu/hal/bb_cfg.c u32 addr, u32 bit_mask, u32 data) bit_mask 556 drivers/staging/rtl8188eu/hal/bb_cfg.c store_pwrindex_offset(adapt, addr, bit_mask, data); bit_mask 110 drivers/staging/rtl8188eu/hal/phy.c u32 reg_addr, u32 bit_mask) bit_mask 115 drivers/staging/rtl8188eu/hal/phy.c bit_shift = cal_bit_shift(bit_mask); bit_mask 116 drivers/staging/rtl8188eu/hal/phy.c return (original_value & bit_mask) >> bit_shift; bit_mask 120 drivers/staging/rtl8188eu/hal/phy.c u32 reg_addr, u32 bit_mask, u32 data) bit_mask 125 drivers/staging/rtl8188eu/hal/phy.c if (bit_mask != bRFRegOffsetMask) { bit_mask 127 drivers/staging/rtl8188eu/hal/phy.c bit_shift = cal_bit_shift(bit_mask); bit_mask 128 drivers/staging/rtl8188eu/hal/phy.c data = (original_value & (~bit_mask)) | (data << bit_shift); bit_mask 15 drivers/staging/rtl8188eu/include/phy.h u32 reg_addr, u32 bit_mask); bit_mask 17 drivers/staging/rtl8188eu/include/phy.h u32 reg_addr, u32 bit_mask, u32 data); bit_mask 1204 drivers/staging/rtl8192e/rtl8192e/rtl_dm.c u32 bit_mask = 0x7f; bit_mask 1210 drivers/staging/rtl8192e/rtl8192e/rtl_dm.c rtl92e_set_bb_reg(dev, rOFDM0_XAAGCCore1, bit_mask, bit_mask 1212 drivers/staging/rtl8192e/rtl8192e/rtl_dm.c rtl92e_set_bb_reg(dev, rOFDM0_XBAGCCore1, bit_mask, bit_mask 1214 drivers/staging/rtl8192e/rtl8192e/rtl_dm.c rtl92e_set_bb_reg(dev, rOFDM0_XCAGCCore1, bit_mask, bit_mask 1216 drivers/staging/rtl8192e/rtl8192e/rtl_dm.c rtl92e_set_bb_reg(dev, rOFDM0_XDAGCCore1, bit_mask, bit_mask 1218 drivers/staging/rtl8192e/rtl8192e/rtl_dm.c bit_mask = bMaskByte2; bit_mask 1219 drivers/staging/rtl8192e/rtl8192e/rtl_dm.c rtl92e_set_bb_reg(dev, rCCK0_CCA, bit_mask, bit_mask 1239 drivers/staging/rtl8192e/rtl8192e/rtl_dm.c u32 bit_mask = bMaskByte0; bit_mask 1248 drivers/staging/rtl8192e/rtl8192e/rtl_dm.c priv->initgain_backup.xaagccore1 = (u8)rtl92e_get_bb_reg(dev, rOFDM0_XAAGCCore1, bit_mask); bit_mask 1249 drivers/staging/rtl8192e/rtl8192e/rtl_dm.c priv->initgain_backup.xbagccore1 = (u8)rtl92e_get_bb_reg(dev, rOFDM0_XBAGCCore1, bit_mask); bit_mask 1250 drivers/staging/rtl8192e/rtl8192e/rtl_dm.c priv->initgain_backup.xcagccore1 = (u8)rtl92e_get_bb_reg(dev, rOFDM0_XCAGCCore1, bit_mask); bit_mask 1251 drivers/staging/rtl8192e/rtl8192e/rtl_dm.c priv->initgain_backup.xdagccore1 = (u8)rtl92e_get_bb_reg(dev, rOFDM0_XDAGCCore1, bit_mask); bit_mask 1252 drivers/staging/rtl8192e/rtl8192e/rtl_dm.c bit_mask = bMaskByte2; bit_mask 1253 drivers/staging/rtl8192e/rtl8192e/rtl_dm.c priv->initgain_backup.cca = (u8)rtl92e_get_bb_reg(dev, rCCK0_CCA, bit_mask); bit_mask 1531 drivers/staging/rtl8192u/r8192U_dm.c u32 bit_mask = 0x7f; /* Bit0~ Bit6 */ bit_mask 1539 drivers/staging/rtl8192u/r8192U_dm.c rtl8192_setBBreg(dev, rOFDM0_XAAGCCore1, bit_mask, (u32)priv->initgain_backup.xaagccore1); bit_mask 1540 drivers/staging/rtl8192u/r8192U_dm.c rtl8192_setBBreg(dev, rOFDM0_XBAGCCore1, bit_mask, (u32)priv->initgain_backup.xbagccore1); bit_mask 1541 drivers/staging/rtl8192u/r8192U_dm.c rtl8192_setBBreg(dev, rOFDM0_XCAGCCore1, bit_mask, (u32)priv->initgain_backup.xcagccore1); bit_mask 1542 drivers/staging/rtl8192u/r8192U_dm.c rtl8192_setBBreg(dev, rOFDM0_XDAGCCore1, bit_mask, (u32)priv->initgain_backup.xdagccore1); bit_mask 1543 drivers/staging/rtl8192u/r8192U_dm.c bit_mask = bMaskByte2; bit_mask 1544 drivers/staging/rtl8192u/r8192U_dm.c rtl8192_setBBreg(dev, rCCK0_CCA, bit_mask, (u32)priv->initgain_backup.cca); bit_mask 1560 drivers/staging/rtl8192u/r8192U_dm.c u32 bit_mask = bMaskByte0; /* Bit0~ Bit6 */ bit_mask 1567 drivers/staging/rtl8192u/r8192U_dm.c priv->initgain_backup.xaagccore1 = (u8)rtl8192_QueryBBReg(dev, rOFDM0_XAAGCCore1, bit_mask); bit_mask 1568 drivers/staging/rtl8192u/r8192U_dm.c priv->initgain_backup.xbagccore1 = (u8)rtl8192_QueryBBReg(dev, rOFDM0_XBAGCCore1, bit_mask); bit_mask 1569 drivers/staging/rtl8192u/r8192U_dm.c priv->initgain_backup.xcagccore1 = (u8)rtl8192_QueryBBReg(dev, rOFDM0_XCAGCCore1, bit_mask); bit_mask 1570 drivers/staging/rtl8192u/r8192U_dm.c priv->initgain_backup.xdagccore1 = (u8)rtl8192_QueryBBReg(dev, rOFDM0_XDAGCCore1, bit_mask); bit_mask 1571 drivers/staging/rtl8192u/r8192U_dm.c bit_mask = bMaskByte2; bit_mask 1572 drivers/staging/rtl8192u/r8192U_dm.c priv->initgain_backup.cca = (u8)rtl8192_QueryBBReg(dev, rCCK0_CCA, bit_mask); bit_mask 1674 drivers/usb/gadget/udc/fsl_udc_core.c int i, ep_num, direction, bit_mask, status; bit_mask 1689 drivers/usb/gadget/udc/fsl_udc_core.c bit_mask = 1 << (ep_num + 16 * direction); bit_mask 1691 drivers/usb/gadget/udc/fsl_udc_core.c if (!(bit_pos & bit_mask)) bit_mask 138 drivers/video/backlight/adp8860_bl.c static int adp8860_set_bits(struct i2c_client *client, int reg, uint8_t bit_mask) bit_mask 148 drivers/video/backlight/adp8860_bl.c if (!ret && ((reg_val & bit_mask) != bit_mask)) { bit_mask 149 drivers/video/backlight/adp8860_bl.c reg_val |= bit_mask; bit_mask 157 drivers/video/backlight/adp8860_bl.c static int adp8860_clr_bits(struct i2c_client *client, int reg, uint8_t bit_mask) bit_mask 167 drivers/video/backlight/adp8860_bl.c if (!ret && (reg_val & bit_mask)) { bit_mask 168 drivers/video/backlight/adp8860_bl.c reg_val &= ~bit_mask; bit_mask 153 drivers/video/backlight/adp8870_bl.c static int adp8870_set_bits(struct i2c_client *client, int reg, uint8_t bit_mask) bit_mask 163 drivers/video/backlight/adp8870_bl.c if (!ret && ((reg_val & bit_mask) != bit_mask)) { bit_mask 164 drivers/video/backlight/adp8870_bl.c reg_val |= bit_mask; bit_mask 172 drivers/video/backlight/adp8870_bl.c static int adp8870_clr_bits(struct i2c_client *client, int reg, uint8_t bit_mask) bit_mask 182 drivers/video/backlight/adp8870_bl.c if (!ret && (reg_val & bit_mask)) { bit_mask 183 drivers/video/backlight/adp8870_bl.c reg_val &= ~bit_mask; bit_mask 221 drivers/video/fbdev/core/cfbimgblt.c u32 bit_mask, end_mask, eorx, shift; bit_mask 247 drivers/video/fbdev/core/cfbimgblt.c bit_mask = (1 << ppw) - 1; bit_mask 256 drivers/video/fbdev/core/cfbimgblt.c end_mask = tab[(*src >> shift) & bit_mask]; bit_mask 191 drivers/video/fbdev/core/sysimgblt.c u32 bit_mask, end_mask, eorx, shift; bit_mask 217 drivers/video/fbdev/core/sysimgblt.c bit_mask = (1 << ppw) - 1; bit_mask 228 drivers/video/fbdev/core/sysimgblt.c end_mask = tab[(*src >> shift) & bit_mask]; bit_mask 289 include/linux/mfd/adp5520.h extern int adp5520_clr_bits(struct device *dev, int reg, uint8_t bit_mask); bit_mask 290 include/linux/mfd/adp5520.h extern int adp5520_set_bits(struct device *dev, int reg, uint8_t bit_mask); bit_mask 246 include/linux/mfd/da903x.h extern int da903x_set_bits(struct device *dev, int reg, uint8_t bit_mask); bit_mask 247 include/linux/mfd/da903x.h extern int da903x_clr_bits(struct device *dev, int reg, uint8_t bit_mask); bit_mask 185 include/linux/mfd/da9052/da9052.h unsigned char bit_mask, bit_mask 190 include/linux/mfd/da9052/da9052.h ret = regmap_update_bits(da9052->regmap, reg, bit_mask, reg_val); bit_mask 68 include/linux/mfd/da9055/core.h unsigned char bit_mask, bit_mask 71 include/linux/mfd/da9055/core.h return regmap_update_bits(da9055->regmap, reg, bit_mask, reg_val); bit_mask 344 include/linux/mfd/rc5t583.h unsigned int bit_mask) bit_mask 347 include/linux/mfd/rc5t583.h return regmap_update_bits(rc5t583->regmap, reg, bit_mask, bit_mask); bit_mask 351 include/linux/mfd/rc5t583.h unsigned int bit_mask) bit_mask 354 include/linux/mfd/rc5t583.h return regmap_update_bits(rc5t583->regmap, reg, bit_mask, 0); bit_mask 105 include/linux/mfd/tps6586x.h extern int tps6586x_set_bits(struct device *dev, int reg, uint8_t bit_mask); bit_mask 106 include/linux/mfd/tps6586x.h extern int tps6586x_clr_bits(struct device *dev, int reg, uint8_t bit_mask); bit_mask 589 include/linux/mfd/tps80031.h int reg, uint8_t bit_mask) bit_mask 594 include/linux/mfd/tps80031.h bit_mask, bit_mask); bit_mask 598 include/linux/mfd/tps80031.h int reg, uint8_t bit_mask) bit_mask 602 include/linux/mfd/tps80031.h return regmap_update_bits(tps80031->regmap[sid], reg, bit_mask, 0); bit_mask 199 include/linux/mfd/twl.h int twl6030_interrupt_unmask(u8 bit_mask, u8 offset); bit_mask 200 include/linux/mfd/twl.h int twl6030_interrupt_mask(u8 bit_mask, u8 offset);