bcm63xx_core_set_reset  178 arch/mips/bcm63xx/clk.c 		bcm63xx_core_set_reset(BCM63XX_RESET_ENETSW, 1);
bcm63xx_core_set_reset  180 arch/mips/bcm63xx/clk.c 		bcm63xx_core_set_reset(BCM63XX_RESET_ENETSW, 0);
bcm63xx_core_set_reset  308 arch/mips/bcm63xx/clk.c 		bcm63xx_core_set_reset(BCM63XX_RESET_SAR, 1);
bcm63xx_core_set_reset  310 arch/mips/bcm63xx/clk.c 		bcm63xx_core_set_reset(BCM63XX_RESET_SAR, 0);
bcm63xx_core_set_reset  217 arch/mips/bcm63xx/reset.c EXPORT_SYMBOL(bcm63xx_core_set_reset);
bcm63xx_core_set_reset   20 arch/mips/include/asm/mach-bcm63xx/bcm63xx_reset.h void bcm63xx_core_set_reset(enum bcm63xx_core_reset, int reset);
bcm63xx_core_set_reset  137 arch/mips/pci/pci-bcm63xx.c 	bcm63xx_core_set_reset(BCM63XX_RESET_PCIE, 1);
bcm63xx_core_set_reset  138 arch/mips/pci/pci-bcm63xx.c 	bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_EXT, 1);
bcm63xx_core_set_reset  141 arch/mips/pci/pci-bcm63xx.c 	bcm63xx_core_set_reset(BCM63XX_RESET_PCIE, 0);
bcm63xx_core_set_reset  144 arch/mips/pci/pci-bcm63xx.c 	bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_EXT, 0);