CACR_DCINVA        46 arch/m68k/include/asm/cacheflush_mm.h 		: "r" (CACHE_MODE | CACR_DCINVA));
CACR_DCINVA        55 arch/m68k/include/asm/cacheflush_mm.h 		: "r" (CACHE_MODE | CACR_ICINVA | CACR_BCINVA | CACR_DCINVA));
CACR_DCINVA        90 arch/m68k/include/asm/m54xxacr.h #define CACHE_INIT (CACR_DCINVA+CACR_BCINVA+CACR_ICINVA)
CACR_DCINVA       123 arch/m68k/include/asm/m54xxacr.h #define CACHE_INVALIDATE  (CACHE_MODE+CACR_DCINVA+CACR_BCINVA+CACR_ICINVA)
CACR_DCINVA       125 arch/m68k/include/asm/m54xxacr.h #define CACHE_INVALIDATED (CACHE_MODE+CACR_DCINVA)