CACHE_MODE_1      222 drivers/gpu/drm/i915/gt/intel_workarounds.c 	WA_SET_BIT_MASKED(CACHE_MODE_1, GEN8_4x4_STC_OPTIMIZATION_DISABLE);
CACHE_MODE_1      308 drivers/gpu/drm/i915/gt/intel_workarounds.c 	WA_SET_BIT_MASKED(CACHE_MODE_1,
CACHE_MODE_1     1923 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_DFH(CACHE_MODE_1, D_ALL, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL);
CACHE_MODE_1       61 drivers/gpu/drm/i915/gvt/mmio_context.c 	{RCS0, CACHE_MODE_1, 0xffff, true}, /* 0x7004 */
CACHE_MODE_1       93 drivers/gpu/drm/i915/gvt/mmio_context.c 	{RCS0, CACHE_MODE_1, 0xffff, true}, /* 0x7004 */
CACHE_MODE_1     9372 drivers/gpu/drm/i915/intel_pm.c 	I915_WRITE(CACHE_MODE_1,
CACHE_MODE_1     9466 drivers/gpu/drm/i915/intel_pm.c 	I915_WRITE(CACHE_MODE_1,
CACHE_MODE_1     9543 drivers/gpu/drm/i915/intel_pm.c 	I915_WRITE(CACHE_MODE_1,