CACHE_EVENT_PTR   164 arch/powerpc/perf/power8-pmu.c 	CACHE_EVENT_PTR(PM_LD_MISS_L1),
CACHE_EVENT_PTR   165 arch/powerpc/perf/power8-pmu.c 	CACHE_EVENT_PTR(PM_LD_REF_L1),
CACHE_EVENT_PTR   166 arch/powerpc/perf/power8-pmu.c 	CACHE_EVENT_PTR(PM_L1_PREF),
CACHE_EVENT_PTR   167 arch/powerpc/perf/power8-pmu.c 	CACHE_EVENT_PTR(PM_ST_MISS_L1),
CACHE_EVENT_PTR   168 arch/powerpc/perf/power8-pmu.c 	CACHE_EVENT_PTR(PM_L1_ICACHE_MISS),
CACHE_EVENT_PTR   169 arch/powerpc/perf/power8-pmu.c 	CACHE_EVENT_PTR(PM_INST_FROM_L1),
CACHE_EVENT_PTR   170 arch/powerpc/perf/power8-pmu.c 	CACHE_EVENT_PTR(PM_IC_PREF_WRITE),
CACHE_EVENT_PTR   171 arch/powerpc/perf/power8-pmu.c 	CACHE_EVENT_PTR(PM_DATA_FROM_L3MISS),
CACHE_EVENT_PTR   172 arch/powerpc/perf/power8-pmu.c 	CACHE_EVENT_PTR(PM_DATA_FROM_L3),
CACHE_EVENT_PTR   173 arch/powerpc/perf/power8-pmu.c 	CACHE_EVENT_PTR(PM_L3_PREF_ALL),
CACHE_EVENT_PTR   174 arch/powerpc/perf/power8-pmu.c 	CACHE_EVENT_PTR(PM_L2_ST_MISS),
CACHE_EVENT_PTR   175 arch/powerpc/perf/power8-pmu.c 	CACHE_EVENT_PTR(PM_L2_ST),
CACHE_EVENT_PTR   177 arch/powerpc/perf/power8-pmu.c 	CACHE_EVENT_PTR(PM_BR_MPRED_CMPL),
CACHE_EVENT_PTR   178 arch/powerpc/perf/power8-pmu.c 	CACHE_EVENT_PTR(PM_BRU_FIN),
CACHE_EVENT_PTR   180 arch/powerpc/perf/power8-pmu.c 	CACHE_EVENT_PTR(PM_DTLB_MISS),
CACHE_EVENT_PTR   181 arch/powerpc/perf/power8-pmu.c 	CACHE_EVENT_PTR(PM_ITLB_MISS),
CACHE_EVENT_PTR   189 arch/powerpc/perf/power9-pmu.c 	CACHE_EVENT_PTR(PM_LD_MISS_L1_FIN),
CACHE_EVENT_PTR   190 arch/powerpc/perf/power9-pmu.c 	CACHE_EVENT_PTR(PM_LD_REF_L1),
CACHE_EVENT_PTR   191 arch/powerpc/perf/power9-pmu.c 	CACHE_EVENT_PTR(PM_L1_PREF),
CACHE_EVENT_PTR   192 arch/powerpc/perf/power9-pmu.c 	CACHE_EVENT_PTR(PM_ST_MISS_L1),
CACHE_EVENT_PTR   193 arch/powerpc/perf/power9-pmu.c 	CACHE_EVENT_PTR(PM_L1_ICACHE_MISS),
CACHE_EVENT_PTR   194 arch/powerpc/perf/power9-pmu.c 	CACHE_EVENT_PTR(PM_INST_FROM_L1),
CACHE_EVENT_PTR   195 arch/powerpc/perf/power9-pmu.c 	CACHE_EVENT_PTR(PM_IC_PREF_WRITE),
CACHE_EVENT_PTR   196 arch/powerpc/perf/power9-pmu.c 	CACHE_EVENT_PTR(PM_DATA_FROM_L3MISS),
CACHE_EVENT_PTR   197 arch/powerpc/perf/power9-pmu.c 	CACHE_EVENT_PTR(PM_DATA_FROM_L3),
CACHE_EVENT_PTR   198 arch/powerpc/perf/power9-pmu.c 	CACHE_EVENT_PTR(PM_L3_PREF_ALL),
CACHE_EVENT_PTR   199 arch/powerpc/perf/power9-pmu.c 	CACHE_EVENT_PTR(PM_BR_MPRED_CMPL),
CACHE_EVENT_PTR   200 arch/powerpc/perf/power9-pmu.c 	CACHE_EVENT_PTR(PM_BR_CMPL),
CACHE_EVENT_PTR   201 arch/powerpc/perf/power9-pmu.c 	CACHE_EVENT_PTR(PM_DTLB_MISS),
CACHE_EVENT_PTR   202 arch/powerpc/perf/power9-pmu.c 	CACHE_EVENT_PTR(PM_ITLB_MISS),