CACHELINE_BYTES    29 drivers/gpu/drm/i915/gt/intel_engine.h #define CACHELINE_DWORDS (CACHELINE_BYTES / sizeof(u32))
CACHELINE_BYTES   301 drivers/gpu/drm/i915/gt/intel_engine.h #define cacheline(a) round_down(a, CACHELINE_BYTES)
CACHELINE_BYTES   330 drivers/gpu/drm/i915/gt/intel_engine.h 	return (head - tail - CACHELINE_BYTES) & (size - 1);
CACHELINE_BYTES  2075 drivers/gpu/drm/i915/gt/intel_lrc.c 	while ((unsigned long)batch % CACHELINE_BYTES)
CACHELINE_BYTES  2172 drivers/gpu/drm/i915/gt/intel_lrc.c 	while ((unsigned long)batch % CACHELINE_BYTES)
CACHELINE_BYTES  2206 drivers/gpu/drm/i915/gt/intel_lrc.c 	while ((unsigned long)batch % CACHELINE_BYTES)
CACHELINE_BYTES  2301 drivers/gpu/drm/i915/gt/intel_lrc.c 						  CACHELINE_BYTES))) {
CACHELINE_BYTES  3240 drivers/gpu/drm/i915/gt/intel_lrc.c 				(wa_ctx->indirect_ctx.size / CACHELINE_BYTES);
CACHELINE_BYTES  1323 drivers/gpu/drm/i915/gt/intel_ringbuffer.c 		ring->effective_size -= 2 * CACHELINE_BYTES;
CACHELINE_BYTES  1990 drivers/gpu/drm/i915/gt/intel_ringbuffer.c 	num_dwords = (rq->ring->emit & (CACHELINE_BYTES - 1)) / sizeof(u32);
CACHELINE_BYTES  2004 drivers/gpu/drm/i915/gt/intel_ringbuffer.c 	GEM_BUG_ON(rq->ring->emit & (CACHELINE_BYTES - 1));
CACHELINE_BYTES    59 drivers/gpu/drm/i915/gt/intel_timeline.c 	BUILD_BUG_ON(BITS_PER_TYPE(u64) * CACHELINE_BYTES > PAGE_SIZE);
CACHELINE_BYTES   236 drivers/gpu/drm/i915/gt/intel_timeline.c 		timeline->hwsp_offset = cacheline * CACHELINE_BYTES;
CACHELINE_BYTES   248 drivers/gpu/drm/i915/gt/intel_timeline.c 		memset(vaddr + timeline->hwsp_offset, 0, CACHELINE_BYTES);
CACHELINE_BYTES   458 drivers/gpu/drm/i915/gt/intel_timeline.c 	tl->hwsp_offset = cacheline * CACHELINE_BYTES;
CACHELINE_BYTES   460 drivers/gpu/drm/i915/gt/intel_timeline.c 		memset(vaddr + tl->hwsp_offset, 0, CACHELINE_BYTES);
CACHELINE_BYTES   519 drivers/gpu/drm/i915/gt/intel_timeline.c 				CACHELINE_BYTES;
CACHELINE_BYTES    31 drivers/gpu/drm/i915/gt/selftest_timeline.c 	return (address + tl->hwsp_offset) / CACHELINE_BYTES;
CACHELINE_BYTES    34 drivers/gpu/drm/i915/gt/selftest_timeline.c #define CACHELINES_PER_PAGE (PAGE_SIZE / CACHELINE_BYTES)
CACHELINE_BYTES  2822 drivers/gpu/drm/i915/gvt/cmd_parser.c 	ring_size = round_up(wa_ctx->indirect_ctx.size + CACHELINE_BYTES,
CACHELINE_BYTES  2942 drivers/gpu/drm/i915/gvt/cmd_parser.c 					   roundup(ctx_size + CACHELINE_BYTES,
CACHELINE_BYTES  2997 drivers/gpu/drm/i915/gvt/cmd_parser.c 	memcpy(bb_start_sva, per_ctx_start, CACHELINE_BYTES);
CACHELINE_BYTES   557 drivers/gpu/drm/i915/gvt/scheduler.c 				       0, CACHELINE_BYTES, 0);
CACHELINE_BYTES   569 drivers/gpu/drm/i915/gvt/scheduler.c 	memset(per_ctx_va, 0, CACHELINE_BYTES);
CACHELINE_BYTES  1562 drivers/gpu/drm/i915/gvt/scheduler.c 			CACHELINE_BYTES;
CACHELINE_BYTES  1581 drivers/gpu/drm/i915/gvt/scheduler.c 				CACHELINE_BYTES)) {