ast_get_index_reg_mask 21 drivers/gpu/drm/ast/ast_dp501.c sendack = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x9b, 0xff); ast_get_index_reg_mask 29 drivers/gpu/drm/ast/ast_dp501.c sendack = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x9b, 0xff); ast_get_index_reg_mask 39 drivers/gpu/drm/ast/ast_dp501.c waitack = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd2, 0xff); ast_get_index_reg_mask 55 drivers/gpu/drm/ast/ast_dp501.c waitack = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd2, 0xff); ast_get_index_reg_mask 82 drivers/gpu/drm/ast/ast_dp501.c waitready = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd2, 0xff); ast_get_index_reg_mask 143 drivers/gpu/drm/ast/ast_dp501.c tmp = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd3, 0xff); ast_get_index_reg_mask 249 drivers/gpu/drm/ast/ast_dp501.c jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x99, 0xfc); /* D[1:0]: Reserved Video Buffer */ ast_get_index_reg_mask 322 drivers/gpu/drm/ast/ast_dp501.c jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff); ast_get_index_reg_mask 419 drivers/gpu/drm/ast/ast_dp501.c jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd1, 0xff); ast_get_index_reg_mask 186 drivers/gpu/drm/ast/ast_drv.h uint8_t ast_get_index_reg_mask(struct ast_private *ast, ast_get_index_reg_mask 96 drivers/gpu/drm/ast/ast_main.c jregd0 = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff); ast_get_index_reg_mask 97 drivers/gpu/drm/ast/ast_main.c jregd1 = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd1, 0xff); ast_get_index_reg_mask 194 drivers/gpu/drm/ast/ast_main.c jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff); ast_get_index_reg_mask 226 drivers/gpu/drm/ast/ast_main.c jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa3, 0xff); ast_get_index_reg_mask 237 drivers/gpu/drm/ast/ast_main.c jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd1, 0xff); ast_get_index_reg_mask 403 drivers/gpu/drm/ast/ast_main.c jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xaa, 0xff); ast_get_index_reg_mask 411 drivers/gpu/drm/ast/ast_main.c jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x99, 0xff); ast_get_index_reg_mask 807 drivers/gpu/drm/ast/ast_mode.c jtemp = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd1, 0xff); ast_get_index_reg_mask 966 drivers/gpu/drm/ast/ast_mode.c val = (ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x10) >> 4) & 0x01; ast_get_index_reg_mask 968 drivers/gpu/drm/ast/ast_mode.c val2 = (ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x10) >> 4) & 0x01; ast_get_index_reg_mask 973 drivers/gpu/drm/ast/ast_mode.c val = (ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x10) >> 4) & 0x01; ast_get_index_reg_mask 988 drivers/gpu/drm/ast/ast_mode.c val = (ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x20) >> 5) & 0x01; ast_get_index_reg_mask 990 drivers/gpu/drm/ast/ast_mode.c val2 = (ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x20) >> 5) & 0x01; ast_get_index_reg_mask 995 drivers/gpu/drm/ast/ast_mode.c val = (ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x20) >> 5) & 0x01; ast_get_index_reg_mask 1012 drivers/gpu/drm/ast/ast_mode.c jtemp = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x01); ast_get_index_reg_mask 1028 drivers/gpu/drm/ast/ast_mode.c jtemp = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x04); ast_get_index_reg_mask 284 drivers/gpu/drm/ast/ast_post.c j = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff); ast_get_index_reg_mask 366 drivers/gpu/drm/ast/ast_post.c j = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff); ast_get_index_reg_mask 1608 drivers/gpu/drm/ast/ast_post.c reg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff); ast_get_index_reg_mask 1680 drivers/gpu/drm/ast/ast_post.c reg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff); ast_get_index_reg_mask 2039 drivers/gpu/drm/ast/ast_post.c reg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff); ast_get_index_reg_mask 2082 drivers/gpu/drm/ast/ast_post.c reg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff);