asid_cache 51 arch/arc/include/asm/mmu_context.h DECLARE_PER_CPU(unsigned int, asid_cache); asid_cache 52 arch/arc/include/asm/mmu_context.h #define asid_cpu(cpu) per_cpu(asid_cache, cpu) asid_cache 102 arch/arc/mm/tlb.c DEFINE_PER_CPU(unsigned int, asid_cache) = MM_CTXT_FIRST_CYCLE; asid_cache 20 arch/csky/include/asm/processor.h unsigned long asid_cache; asid_cache 53 arch/mips/include/asm/cpu-info.h u64 asid_cache; asid_cache 123 arch/mips/include/asm/mmu_context.h #define asid_cache(cpu) (cpu_data[cpu].asid_cache) asid_cache 2213 arch/mips/kernel/traps.c cpu_data[cpu].asid_cache = 0; asid_cache 2214 arch/mips/kernel/traps.c else if (!cpu_data[cpu].asid_cache) asid_cache 2215 arch/mips/kernel/traps.c cpu_data[cpu].asid_cache = asid_first_version(cpu); asid_cache 34 arch/mips/mm/context.c asid = asid_cache(cpu); asid_cache 43 arch/mips/mm/context.c asid_cache(cpu) = asid; asid_cache 59 arch/mips/mm/context.c if (!asid_versions_eq(cpu, cpu_context(cpu, mm), asid_cache(cpu))) asid_cache 76 arch/mips/mm/context.c mmid = xchg_relaxed(&cpu_data[cpu].asid_cache, 0); asid_cache 210 arch/mips/mm/context.c old_active_mmid = READ_ONCE(cpu_data[cpu].asid_cache); asid_cache 213 arch/mips/mm/context.c !cmpxchg_relaxed(&cpu_data[cpu].asid_cache, old_active_mmid, ctx)) { asid_cache 220 arch/mips/mm/context.c WRITE_ONCE(cpu_data[cpu].asid_cache, ctx); asid_cache 38 arch/sh/include/asm/mmu_context.h #define asid_cache(cpu) (cpu_data[cpu].asid_cache) asid_cache 62 arch/sh/include/asm/mmu_context.h unsigned long asid = asid_cache(cpu); asid_cache 93 arch/sh/include/asm/mmu_context.h cpu_context(cpu, mm) = asid_cache(cpu) = asid; asid_cache 167 arch/sh/include/asm/mmu_context.h if (asid_cache(cpu) == NO_CONTEXT) asid_cache 168 arch/sh/include/asm/mmu_context.h asid_cache(cpu) = MMU_CONTEXT_FIRST_VERSION; asid_cache 170 arch/sh/include/asm/mmu_context.h set_asid(asid_cache(cpu) & MMU_CONTEXT_ASID_MASK); asid_cache 80 arch/sh/include/asm/processor.h unsigned long asid_cache; asid_cache 342 arch/sh/kernel/cpu/init.c current_cpu_data.asid_cache = NO_CONTEXT; asid_cache 34 arch/xtensa/include/asm/mmu_context.h DECLARE_PER_CPU(unsigned long, asid_cache); asid_cache 35 arch/xtensa/include/asm/mmu_context.h #define cpu_asid_cache(cpu) per_cpu(asid_cache, cpu) asid_cache 25 arch/xtensa/mm/fault.c DEFINE_PER_CPU(unsigned long, asid_cache) = ASID_USER_FIRST;