ar2315_rst_reg_read 49 arch/mips/ath25/ar2315.c u32 ret = ar2315_rst_reg_read(reg); ar2315_rst_reg_read 59 arch/mips/ath25/ar2315.c ar2315_rst_reg_read(AR2315_AHB_ERR1); ar2315_rst_reg_read 74 arch/mips/ath25/ar2315.c u32 pending = ar2315_rst_reg_read(AR2315_ISR) & ar2315_rst_reg_read 75 arch/mips/ath25/ar2315.c ar2315_rst_reg_read(AR2315_IMR); ar2315_rst_reg_read 212 arch/mips/ath25/ar2315.c pllc_ctrl = ar2315_rst_reg_read(AR2315_PLLC_CTL); ar2315_rst_reg_read 244 arch/mips/ath25/ar2315.c return ar2315_sys_clk(ar2315_rst_reg_read(AR2315_CPUCLK)); ar2315_rst_reg_read 249 arch/mips/ath25/ar2315.c return ar2315_sys_clk(ar2315_rst_reg_read(AR2315_AMBACLK)); ar2315_rst_reg_read 278 arch/mips/ath25/ar2315.c devid = ar2315_rst_reg_read(AR2315_SREV) & AR2315_REV_CHIP; ar2315_rst_reg_read 300 arch/mips/ath25/ar2315.c ar2315_rst_reg_read(AR2315_AHB_ERR1);