BXT_P_CR_GT_DISP_PWRON  317 drivers/gpu/drm/i915/display/intel_dpio_phy.c 	if (!(I915_READ(BXT_P_CR_GT_DISP_PWRON) & phy_info->pwron_mask))
BXT_P_CR_GT_DISP_PWRON  376 drivers/gpu/drm/i915/display/intel_dpio_phy.c 	val = I915_READ(BXT_P_CR_GT_DISP_PWRON);
BXT_P_CR_GT_DISP_PWRON  378 drivers/gpu/drm/i915/display/intel_dpio_phy.c 	I915_WRITE(BXT_P_CR_GT_DISP_PWRON, val);
BXT_P_CR_GT_DISP_PWRON  459 drivers/gpu/drm/i915/display/intel_dpio_phy.c 	val = I915_READ(BXT_P_CR_GT_DISP_PWRON);
BXT_P_CR_GT_DISP_PWRON  461 drivers/gpu/drm/i915/display/intel_dpio_phy.c 	I915_WRITE(BXT_P_CR_GT_DISP_PWRON, val);
BXT_P_CR_GT_DISP_PWRON  775 drivers/gpu/drm/i915/display/vlv_dsi.c 		val = I915_READ(BXT_P_CR_GT_DISP_PWRON);
BXT_P_CR_GT_DISP_PWRON  776 drivers/gpu/drm/i915/display/vlv_dsi.c 		I915_WRITE(BXT_P_CR_GT_DISP_PWRON,
BXT_P_CR_GT_DISP_PWRON  922 drivers/gpu/drm/i915/display/vlv_dsi.c 		val = I915_READ(BXT_P_CR_GT_DISP_PWRON);
BXT_P_CR_GT_DISP_PWRON  923 drivers/gpu/drm/i915/display/vlv_dsi.c 		I915_WRITE(BXT_P_CR_GT_DISP_PWRON,
BXT_P_CR_GT_DISP_PWRON 3142 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_DH(BXT_P_CR_GT_DISP_PWRON, D_BXT, NULL, bxt_gt_disp_pwron_write);
BXT_P_CR_GT_DISP_PWRON  249 drivers/gpu/drm/i915/gvt/mmio.c 			vgpu_vreg_t(vgpu, BXT_P_CR_GT_DISP_PWRON) &=