am33xx_prm_rmw_reg_bits   98 arch/arm/mach-omap2/prm33xx.c 	am33xx_prm_rmw_reg_bits(mask, mask, inst, rstctrl_offs);
am33xx_prm_rmw_reg_bits  134 arch/arm/mach-omap2/prm33xx.c 	am33xx_prm_rmw_reg_bits(0xffffffff, mask, inst, rstst_offs);
am33xx_prm_rmw_reg_bits  139 arch/arm/mach-omap2/prm33xx.c 	am33xx_prm_rmw_reg_bits(mask, 0, inst, rstctrl_offs);
am33xx_prm_rmw_reg_bits  151 arch/arm/mach-omap2/prm33xx.c 	am33xx_prm_rmw_reg_bits(OMAP_POWERSTATE_MASK,
am33xx_prm_rmw_reg_bits  181 arch/arm/mach-omap2/prm33xx.c 	am33xx_prm_rmw_reg_bits(AM33XX_LOWPOWERSTATECHANGE_MASK,
am33xx_prm_rmw_reg_bits  189 arch/arm/mach-omap2/prm33xx.c 	am33xx_prm_rmw_reg_bits(AM33XX_LASTPOWERSTATEENTERED_MASK,
am33xx_prm_rmw_reg_bits  203 arch/arm/mach-omap2/prm33xx.c 	am33xx_prm_rmw_reg_bits(m, (pwrst << __ffs(m)),
am33xx_prm_rmw_reg_bits  244 arch/arm/mach-omap2/prm33xx.c 	am33xx_prm_rmw_reg_bits(m, (pwrst << __ffs(m)),
am33xx_prm_rmw_reg_bits  259 arch/arm/mach-omap2/prm33xx.c 	am33xx_prm_rmw_reg_bits(m, (pwrst << __ffs(m)),
am33xx_prm_rmw_reg_bits  335 arch/arm/mach-omap2/prm33xx.c 	am33xx_prm_rmw_reg_bits(AM33XX_RST_GLOBAL_WARM_SW_MASK,