afe_write 1226 drivers/media/i2c/adv7604.c afe_write(sd, 0xc8, ctrl->val); afe_write 1763 drivers/media/i2c/adv7604.c afe_write(sd, 0x00, 0x08); /* power up ADC */ afe_write 1764 drivers/media/i2c/adv7604.c afe_write(sd, 0x01, 0x06); /* power up Analog Front End */ afe_write 1765 drivers/media/i2c/adv7604.c afe_write(sd, 0xc8, 0x00); /* phase control */ afe_write 1772 drivers/media/i2c/adv7604.c afe_write(sd, 0x00, 0xff); /* power down ADC */ afe_write 1773 drivers/media/i2c/adv7604.c afe_write(sd, 0x01, 0xfe); /* power down Analog Front End */ afe_write 1774 drivers/media/i2c/adv7604.c afe_write(sd, 0xc8, 0x40); /* phase control */ afe_write 2829 drivers/media/i2c/adv7604.c afe_write(sd, 0xb5, 0x01); /* Setting MCLK to 256Fs */ afe_write 2832 drivers/media/i2c/adv7604.c afe_write(sd, 0x02, pdata->ain_sel); /* Select analog input muxing mode */ afe_write 488 drivers/media/i2c/adv7842.c return afe_write(sd, reg, (afe_read(sd, reg) & mask) | val); afe_write 941 drivers/media/i2c/adv7842.c afe_write(sd, reg->reg & 0xff, val); afe_write 1304 drivers/media/i2c/adv7842.c afe_write(sd, 0xc8, ctrl->val); afe_write 1807 drivers/media/i2c/adv7842.c afe_write(sd, 0x00, 0x00); /* power up ADC */ afe_write 1808 drivers/media/i2c/adv7842.c afe_write(sd, 0xc8, 0x00); /* phase control */ afe_write 1816 drivers/media/i2c/adv7842.c afe_write(sd, 0x03, 0xa0); /* ADC0 to AIN10 (CVBS), ADC1 N/C*/ afe_write 1817 drivers/media/i2c/adv7842.c afe_write(sd, 0x04, 0x00); /* ADC2 N/C,ADC3 N/C*/ afe_write 1819 drivers/media/i2c/adv7842.c afe_write(sd, 0x03, 0xa0); /* ADC0 to AIN10 (CVBS), ADC1 N/C*/ afe_write 1820 drivers/media/i2c/adv7842.c afe_write(sd, 0x04, 0xc0); /* ADC2 to AIN12, ADC3 N/C*/ afe_write 1822 drivers/media/i2c/adv7842.c afe_write(sd, 0x0c, 0x1f); /* ADI recommend write */ afe_write 1823 drivers/media/i2c/adv7842.c afe_write(sd, 0x12, 0x63); /* ADI recommend write */ afe_write 1855 drivers/media/i2c/adv7842.c afe_write(sd, 0x00, 0x00); /* power up ADC */ afe_write 1856 drivers/media/i2c/adv7842.c afe_write(sd, 0xc8, 0x00); /* phase control */ afe_write 1868 drivers/media/i2c/adv7842.c afe_write(sd, 0x0c, 0x1f); /* ADC Range improvement */ afe_write 1869 drivers/media/i2c/adv7842.c afe_write(sd, 0x12, 0x63); /* ADC Range improvement */ afe_write 1920 drivers/media/i2c/adv7842.c afe_write(sd, 0x00, 0xff); /* power down ADC */ afe_write 1921 drivers/media/i2c/adv7842.c afe_write(sd, 0xc8, 0x40); /* phase control */ afe_write 1932 drivers/media/i2c/adv7842.c afe_write(sd, 0x12, 0xfb); /* ADC noise shaping filter controls */ afe_write 1933 drivers/media/i2c/adv7842.c afe_write(sd, 0x0c, 0x0d); /* CP core gain controls */ afe_write 3027 drivers/media/i2c/adv7842.c afe_write(sd, 0xb5, 0x01); /* Setting MCLK to 256Fs */ afe_write 3029 drivers/media/i2c/adv7842.c afe_write(sd, 0x02, pdata->ain_sel); /* Select analog input muxing mode */ afe_write 3105 drivers/media/i2c/adv7842.c afe_write(sd, 0x80, 0x92); /* SDP Recommended Write */ afe_write 3106 drivers/media/i2c/adv7842.c afe_write(sd, 0x9B, 0x01); /* SDP Recommended Write ADV7844ES1 */ afe_write 3107 drivers/media/i2c/adv7842.c afe_write(sd, 0x9C, 0x60); /* SDP Recommended Write ADV7844ES1 */ afe_write 3108 drivers/media/i2c/adv7842.c afe_write(sd, 0x9E, 0x02); /* SDP Recommended Write ADV7844ES1 */ afe_write 3109 drivers/media/i2c/adv7842.c afe_write(sd, 0xA0, 0x0B); /* SDP Recommended Write ADV7844ES1 */ afe_write 3110 drivers/media/i2c/adv7842.c afe_write(sd, 0xC3, 0x02); /* Memory BIST Initialisation */