advk_readl        220 drivers/pci/controller/pci-aardvark.c 	val = advk_readl(pcie, CFG_REG);
advk_readl        260 drivers/pci/controller/pci-aardvark.c 	reg = advk_readl(pcie, CTRL_CONFIG_REG);
advk_readl        266 drivers/pci/controller/pci-aardvark.c 	reg = advk_readl(pcie, PCIE_CORE_CTRL0_REG);
advk_readl        291 drivers/pci/controller/pci-aardvark.c 	reg = advk_readl(pcie, PCIE_CORE_CTRL0_REG);
advk_readl        297 drivers/pci/controller/pci-aardvark.c 	reg = advk_readl(pcie, PCIE_CORE_CTRL0_REG);
advk_readl        303 drivers/pci/controller/pci-aardvark.c 	reg = advk_readl(pcie, PCIE_CORE_CTRL0_REG);
advk_readl        308 drivers/pci/controller/pci-aardvark.c 	reg = advk_readl(pcie, PCIE_CORE_CTRL2_REG);
advk_readl        331 drivers/pci/controller/pci-aardvark.c 	reg = advk_readl(pcie, PCIE_CORE_CTRL2_REG);
advk_readl        336 drivers/pci/controller/pci-aardvark.c 	reg = advk_readl(pcie, PIO_CTRL);
advk_readl        341 drivers/pci/controller/pci-aardvark.c 	reg = advk_readl(pcie, PCIE_CORE_LINK_CTRL_STAT_REG);
advk_readl        351 drivers/pci/controller/pci-aardvark.c 	reg = advk_readl(pcie, PCIE_CORE_CMD_STATUS_REG);
advk_readl        365 drivers/pci/controller/pci-aardvark.c 	reg = advk_readl(pcie, PIO_STAT);
advk_readl        393 drivers/pci/controller/pci-aardvark.c 		str_posted, strcomp_status, reg, advk_readl(pcie, PIO_ADDR_LS));
advk_readl        406 drivers/pci/controller/pci-aardvark.c 		start = advk_readl(pcie, PIO_START);
advk_readl        407 drivers/pci/controller/pci-aardvark.c 		isr = advk_readl(pcie, PIO_ISR);
advk_readl        430 drivers/pci/controller/pci-aardvark.c 		u32 val = advk_readl(pcie, PCIE_ISR0_MASK_REG);
advk_readl        436 drivers/pci/controller/pci-aardvark.c 		u32 isr0 = advk_readl(pcie, PCIE_ISR0_REG);
advk_readl        437 drivers/pci/controller/pci-aardvark.c 		u32 msglog = advk_readl(pcie, PCIE_MSG_LOG_REG);
advk_readl        444 drivers/pci/controller/pci-aardvark.c 		u32 val = advk_readl(pcie, PCIE_CORE_PCIEXP_CAP + reg) &
advk_readl        456 drivers/pci/controller/pci-aardvark.c 		*value = advk_readl(pcie, PCIE_CORE_PCIEXP_CAP + reg);
advk_readl        483 drivers/pci/controller/pci-aardvark.c 		u32 val = advk_readl(pcie, PCIE_ISR0_MASK_REG) &
advk_readl        514 drivers/pci/controller/pci-aardvark.c 	bridge->conf.vendor = advk_readl(pcie, PCIE_CORE_DEV_ID_REG) & 0xffff;
advk_readl        515 drivers/pci/controller/pci-aardvark.c 	bridge->conf.device = advk_readl(pcie, PCIE_CORE_DEV_ID_REG) >> 16;
advk_readl        517 drivers/pci/controller/pci-aardvark.c 		advk_readl(pcie, PCIE_CORE_DEV_REV_REG) & 0xff;
advk_readl        568 drivers/pci/controller/pci-aardvark.c 	reg = advk_readl(pcie, PIO_CTRL);
advk_readl        594 drivers/pci/controller/pci-aardvark.c 	*val = advk_readl(pcie, PIO_RD_DATA);
advk_readl        627 drivers/pci/controller/pci-aardvark.c 	reg = advk_readl(pcie, PIO_CTRL);
advk_readl        734 drivers/pci/controller/pci-aardvark.c 	mask = advk_readl(pcie, PCIE_ISR1_MASK_REG);
advk_readl        745 drivers/pci/controller/pci-aardvark.c 	mask = advk_readl(pcie, PCIE_ISR1_MASK_REG);
advk_readl        874 drivers/pci/controller/pci-aardvark.c 	msi_mask = advk_readl(pcie, PCIE_MSI_MASK_REG);
advk_readl        875 drivers/pci/controller/pci-aardvark.c 	msi_val = advk_readl(pcie, PCIE_MSI_STATUS_REG);
advk_readl        883 drivers/pci/controller/pci-aardvark.c 		msi_data = advk_readl(pcie, PCIE_MSI_PAYLOAD_REG) & 0xFF;
advk_readl        897 drivers/pci/controller/pci-aardvark.c 	isr0_val = advk_readl(pcie, PCIE_ISR0_REG);
advk_readl        898 drivers/pci/controller/pci-aardvark.c 	isr0_mask = advk_readl(pcie, PCIE_ISR0_MASK_REG);
advk_readl        901 drivers/pci/controller/pci-aardvark.c 	isr1_val = advk_readl(pcie, PCIE_ISR1_REG);
advk_readl        902 drivers/pci/controller/pci-aardvark.c 	isr1_mask = advk_readl(pcie, PCIE_ISR1_MASK_REG);
advk_readl        933 drivers/pci/controller/pci-aardvark.c 	status = advk_readl(pcie, HOST_CTRL_INT_STATUS_REG);