a6xx_gpu 15 drivers/gpu/drm/msm/adreno/a6xx_gmu.c struct a6xx_gpu *a6xx_gpu = container_of(gmu, struct a6xx_gpu, gmu); a6xx_gpu 16 drivers/gpu/drm/msm/adreno/a6xx_gmu.c struct adreno_gpu *adreno_gpu = &a6xx_gpu->base; a6xx_gpu 105 drivers/gpu/drm/msm/adreno/a6xx_gmu.c struct a6xx_gpu *a6xx_gpu = container_of(gmu, struct a6xx_gpu, gmu); a6xx_gpu 106 drivers/gpu/drm/msm/adreno/a6xx_gmu.c struct adreno_gpu *adreno_gpu = &a6xx_gpu->base; a6xx_gpu 141 drivers/gpu/drm/msm/adreno/a6xx_gmu.c struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu); a6xx_gpu 142 drivers/gpu/drm/msm/adreno/a6xx_gmu.c struct a6xx_gmu *gmu = &a6xx_gpu->gmu; a6xx_gpu 158 drivers/gpu/drm/msm/adreno/a6xx_gmu.c struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu); a6xx_gpu 159 drivers/gpu/drm/msm/adreno/a6xx_gmu.c struct a6xx_gmu *gmu = &a6xx_gpu->gmu; a6xx_gpu 558 drivers/gpu/drm/msm/adreno/a6xx_gmu.c struct a6xx_gpu *a6xx_gpu = container_of(gmu, struct a6xx_gpu, gmu); a6xx_gpu 559 drivers/gpu/drm/msm/adreno/a6xx_gmu.c struct adreno_gpu *adreno_gpu = &a6xx_gpu->base; a6xx_gpu 693 drivers/gpu/drm/msm/adreno/a6xx_gmu.c int a6xx_gmu_resume(struct a6xx_gpu *a6xx_gpu) a6xx_gpu 695 drivers/gpu/drm/msm/adreno/a6xx_gmu.c struct adreno_gpu *adreno_gpu = &a6xx_gpu->base; a6xx_gpu 697 drivers/gpu/drm/msm/adreno/a6xx_gmu.c struct a6xx_gmu *gmu = &a6xx_gpu->gmu; a6xx_gpu 784 drivers/gpu/drm/msm/adreno/a6xx_gmu.c struct a6xx_gpu *a6xx_gpu = container_of(gmu, struct a6xx_gpu, gmu); a6xx_gpu 785 drivers/gpu/drm/msm/adreno/a6xx_gmu.c struct adreno_gpu *adreno_gpu = &a6xx_gpu->base; a6xx_gpu 843 drivers/gpu/drm/msm/adreno/a6xx_gmu.c int a6xx_gmu_stop(struct a6xx_gpu *a6xx_gpu) a6xx_gpu 845 drivers/gpu/drm/msm/adreno/a6xx_gmu.c struct a6xx_gmu *gmu = &a6xx_gpu->gmu; a6xx_gpu 846 drivers/gpu/drm/msm/adreno/a6xx_gmu.c struct msm_gpu *gpu = &a6xx_gpu->base.base; a6xx_gpu 1093 drivers/gpu/drm/msm/adreno/a6xx_gmu.c struct a6xx_gpu *a6xx_gpu = container_of(gmu, struct a6xx_gpu, gmu); a6xx_gpu 1094 drivers/gpu/drm/msm/adreno/a6xx_gmu.c struct adreno_gpu *adreno_gpu = &a6xx_gpu->base; a6xx_gpu 1143 drivers/gpu/drm/msm/adreno/a6xx_gmu.c struct a6xx_gpu *a6xx_gpu = container_of(gmu, struct a6xx_gpu, gmu); a6xx_gpu 1144 drivers/gpu/drm/msm/adreno/a6xx_gmu.c struct adreno_gpu *adreno_gpu = &a6xx_gpu->base; a6xx_gpu 1228 drivers/gpu/drm/msm/adreno/a6xx_gmu.c void a6xx_gmu_remove(struct a6xx_gpu *a6xx_gpu) a6xx_gpu 1230 drivers/gpu/drm/msm/adreno/a6xx_gmu.c struct a6xx_gmu *gmu = &a6xx_gpu->gmu; a6xx_gpu 1260 drivers/gpu/drm/msm/adreno/a6xx_gmu.c int a6xx_gmu_init(struct a6xx_gpu *a6xx_gpu, struct device_node *node) a6xx_gpu 1262 drivers/gpu/drm/msm/adreno/a6xx_gmu.c struct a6xx_gmu *gmu = &a6xx_gpu->gmu; a6xx_gpu 18 drivers/gpu/drm/msm/adreno/a6xx_gpu.c struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu); a6xx_gpu 21 drivers/gpu/drm/msm/adreno/a6xx_gpu.c if (!a6xx_gmu_isidle(&a6xx_gpu->gmu)) a6xx_gpu 88 drivers/gpu/drm/msm/adreno/a6xx_gpu.c struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu); a6xx_gpu 148 drivers/gpu/drm/msm/adreno/a6xx_gpu.c gmu_read64(&a6xx_gpu->gmu, REG_A6XX_GMU_ALWAYS_ON_COUNTER_L, a6xx_gpu 268 drivers/gpu/drm/msm/adreno/a6xx_gpu.c struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu); a6xx_gpu 269 drivers/gpu/drm/msm/adreno/a6xx_gpu.c struct a6xx_gmu *gmu = &a6xx_gpu->gmu; a6xx_gpu 324 drivers/gpu/drm/msm/adreno/a6xx_gpu.c struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu); a6xx_gpu 326 drivers/gpu/drm/msm/adreno/a6xx_gpu.c if (!a6xx_gpu->sqe_bo) { a6xx_gpu 327 drivers/gpu/drm/msm/adreno/a6xx_gpu.c a6xx_gpu->sqe_bo = adreno_fw_create_bo(gpu, a6xx_gpu 328 drivers/gpu/drm/msm/adreno/a6xx_gpu.c adreno_gpu->fw[ADRENO_FW_SQE], &a6xx_gpu->sqe_iova); a6xx_gpu 330 drivers/gpu/drm/msm/adreno/a6xx_gpu.c if (IS_ERR(a6xx_gpu->sqe_bo)) { a6xx_gpu 331 drivers/gpu/drm/msm/adreno/a6xx_gpu.c int ret = PTR_ERR(a6xx_gpu->sqe_bo); a6xx_gpu 333 drivers/gpu/drm/msm/adreno/a6xx_gpu.c a6xx_gpu->sqe_bo = NULL; a6xx_gpu 340 drivers/gpu/drm/msm/adreno/a6xx_gpu.c msm_gem_object_set_name(a6xx_gpu->sqe_bo, "sqefw"); a6xx_gpu 344 drivers/gpu/drm/msm/adreno/a6xx_gpu.c REG_A6XX_CP_SQE_INSTR_BASE_HI, a6xx_gpu->sqe_iova); a6xx_gpu 378 drivers/gpu/drm/msm/adreno/a6xx_gpu.c struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu); a6xx_gpu 382 drivers/gpu/drm/msm/adreno/a6xx_gpu.c a6xx_gmu_set_oob(&a6xx_gpu->gmu, GMU_OOB_GPU_SET); a6xx_gpu 516 drivers/gpu/drm/msm/adreno/a6xx_gpu.c a6xx_gpu->cur_ring = gpu->rb[0]; a6xx_gpu 560 drivers/gpu/drm/msm/adreno/a6xx_gpu.c a6xx_gmu_clear_oob(&a6xx_gpu->gmu, GMU_OOB_GPU_SET); a6xx_gpu 563 drivers/gpu/drm/msm/adreno/a6xx_gpu.c a6xx_gmu_clear_oob(&a6xx_gpu->gmu, GMU_OOB_BOOT_SLUMBER); a6xx_gpu 581 drivers/gpu/drm/msm/adreno/a6xx_gpu.c struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu); a6xx_gpu 597 drivers/gpu/drm/msm/adreno/a6xx_gpu.c gmu_write(&a6xx_gpu->gmu, REG_A6XX_GMU_GMU_PWR_COL_KEEPALIVE, 0); a6xx_gpu 664 drivers/gpu/drm/msm/adreno/a6xx_gpu.c struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu); a6xx_gpu 673 drivers/gpu/drm/msm/adreno/a6xx_gpu.c gmu_write(&a6xx_gpu->gmu, REG_A6XX_GMU_GMU_PWR_COL_KEEPALIVE, 1); a6xx_gpu 737 drivers/gpu/drm/msm/adreno/a6xx_gpu.c struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu); a6xx_gpu 742 drivers/gpu/drm/msm/adreno/a6xx_gpu.c ret = a6xx_gmu_resume(a6xx_gpu); a6xx_gpu 754 drivers/gpu/drm/msm/adreno/a6xx_gpu.c struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu); a6xx_gpu 758 drivers/gpu/drm/msm/adreno/a6xx_gpu.c return a6xx_gmu_stop(a6xx_gpu); a6xx_gpu 764 drivers/gpu/drm/msm/adreno/a6xx_gpu.c struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu); a6xx_gpu 767 drivers/gpu/drm/msm/adreno/a6xx_gpu.c a6xx_gmu_set_oob(&a6xx_gpu->gmu, GMU_OOB_GPU_SET); a6xx_gpu 772 drivers/gpu/drm/msm/adreno/a6xx_gpu.c a6xx_gmu_clear_oob(&a6xx_gpu->gmu, GMU_OOB_GPU_SET); a6xx_gpu 779 drivers/gpu/drm/msm/adreno/a6xx_gpu.c struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu); a6xx_gpu 781 drivers/gpu/drm/msm/adreno/a6xx_gpu.c return a6xx_gpu->cur_ring; a6xx_gpu 787 drivers/gpu/drm/msm/adreno/a6xx_gpu.c struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu); a6xx_gpu 789 drivers/gpu/drm/msm/adreno/a6xx_gpu.c if (a6xx_gpu->sqe_bo) { a6xx_gpu 790 drivers/gpu/drm/msm/adreno/a6xx_gpu.c msm_gem_unpin_iova(a6xx_gpu->sqe_bo, gpu->aspace); a6xx_gpu 791 drivers/gpu/drm/msm/adreno/a6xx_gpu.c drm_gem_object_put_unlocked(a6xx_gpu->sqe_bo); a6xx_gpu 794 drivers/gpu/drm/msm/adreno/a6xx_gpu.c a6xx_gmu_remove(a6xx_gpu); a6xx_gpu 797 drivers/gpu/drm/msm/adreno/a6xx_gpu.c kfree(a6xx_gpu); a6xx_gpu 803 drivers/gpu/drm/msm/adreno/a6xx_gpu.c struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu); a6xx_gpu 806 drivers/gpu/drm/msm/adreno/a6xx_gpu.c busy_cycles = gmu_read64(&a6xx_gpu->gmu, a6xx_gpu 852 drivers/gpu/drm/msm/adreno/a6xx_gpu.c struct a6xx_gpu *a6xx_gpu; a6xx_gpu 857 drivers/gpu/drm/msm/adreno/a6xx_gpu.c a6xx_gpu = kzalloc(sizeof(*a6xx_gpu), GFP_KERNEL); a6xx_gpu 858 drivers/gpu/drm/msm/adreno/a6xx_gpu.c if (!a6xx_gpu) a6xx_gpu 861 drivers/gpu/drm/msm/adreno/a6xx_gpu.c adreno_gpu = &a6xx_gpu->base; a6xx_gpu 869 drivers/gpu/drm/msm/adreno/a6xx_gpu.c a6xx_destroy(&(a6xx_gpu->base.base)); a6xx_gpu 879 drivers/gpu/drm/msm/adreno/a6xx_gpu.c ret = a6xx_gmu_init(a6xx_gpu, node); a6xx_gpu 881 drivers/gpu/drm/msm/adreno/a6xx_gpu.c a6xx_destroy(&(a6xx_gpu->base.base)); a6xx_gpu 26 drivers/gpu/drm/msm/adreno/a6xx_gpu.h #define to_a6xx_gpu(x) container_of(x, struct a6xx_gpu, base) a6xx_gpu 46 drivers/gpu/drm/msm/adreno/a6xx_gpu.h int a6xx_gmu_resume(struct a6xx_gpu *gpu); a6xx_gpu 47 drivers/gpu/drm/msm/adreno/a6xx_gpu.h int a6xx_gmu_stop(struct a6xx_gpu *gpu); a6xx_gpu 56 drivers/gpu/drm/msm/adreno/a6xx_gpu.h int a6xx_gmu_init(struct a6xx_gpu *a6xx_gpu, struct device_node *node); a6xx_gpu 57 drivers/gpu/drm/msm/adreno/a6xx_gpu.h void a6xx_gmu_remove(struct a6xx_gpu *a6xx_gpu); a6xx_gpu 129 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu); a6xx_gpu 136 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c if (!a6xx_gmu_sptprac_is_on(&a6xx_gpu->gmu)) a6xx_gpu 723 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu); a6xx_gpu 724 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c struct a6xx_gmu *gmu = &a6xx_gpu->gmu; a6xx_gpu 749 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu); a6xx_gpu 763 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c if (!a6xx_gmu_gx_is_on(&a6xx_gpu->gmu)) a6xx_gpu 869 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu); a6xx_gpu 884 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c if (!a6xx_gmu_gx_is_on(&a6xx_gpu->gmu))