a6xx_gmu           13 drivers/gpu/drm/msm/adreno/a6xx_gmu.c static void a6xx_gmu_fault(struct a6xx_gmu *gmu)
a6xx_gmu           33 drivers/gpu/drm/msm/adreno/a6xx_gmu.c 	struct a6xx_gmu *gmu = data;
a6xx_gmu           57 drivers/gpu/drm/msm/adreno/a6xx_gmu.c 	struct a6xx_gmu *gmu = data;
a6xx_gmu           72 drivers/gpu/drm/msm/adreno/a6xx_gmu.c bool a6xx_gmu_sptprac_is_on(struct a6xx_gmu *gmu)
a6xx_gmu           88 drivers/gpu/drm/msm/adreno/a6xx_gmu.c bool a6xx_gmu_gx_is_on(struct a6xx_gmu *gmu)
a6xx_gmu          103 drivers/gpu/drm/msm/adreno/a6xx_gmu.c static void __a6xx_gmu_set_freq(struct a6xx_gmu *gmu, int index)
a6xx_gmu          142 drivers/gpu/drm/msm/adreno/a6xx_gmu.c 	struct a6xx_gmu *gmu = &a6xx_gpu->gmu;
a6xx_gmu          159 drivers/gpu/drm/msm/adreno/a6xx_gmu.c 	struct a6xx_gmu *gmu = &a6xx_gpu->gmu;
a6xx_gmu          164 drivers/gpu/drm/msm/adreno/a6xx_gmu.c static bool a6xx_gmu_check_idle_level(struct a6xx_gmu *gmu)
a6xx_gmu          185 drivers/gpu/drm/msm/adreno/a6xx_gmu.c int a6xx_gmu_wait_for_idle(struct a6xx_gmu *gmu)
a6xx_gmu          190 drivers/gpu/drm/msm/adreno/a6xx_gmu.c static int a6xx_gmu_start(struct a6xx_gmu *gmu)
a6xx_gmu          207 drivers/gpu/drm/msm/adreno/a6xx_gmu.c static int a6xx_gmu_hfi_start(struct a6xx_gmu *gmu)
a6xx_gmu          223 drivers/gpu/drm/msm/adreno/a6xx_gmu.c int a6xx_gmu_set_oob(struct a6xx_gmu *gmu, enum a6xx_gmu_oob_state state)
a6xx_gmu          270 drivers/gpu/drm/msm/adreno/a6xx_gmu.c void a6xx_gmu_clear_oob(struct a6xx_gmu *gmu, enum a6xx_gmu_oob_state state)
a6xx_gmu          289 drivers/gpu/drm/msm/adreno/a6xx_gmu.c static int a6xx_sptprac_enable(struct a6xx_gmu *gmu)
a6xx_gmu          308 drivers/gpu/drm/msm/adreno/a6xx_gmu.c static void a6xx_sptprac_disable(struct a6xx_gmu *gmu)
a6xx_gmu          327 drivers/gpu/drm/msm/adreno/a6xx_gmu.c static int a6xx_gmu_gfx_rail_on(struct a6xx_gmu *gmu)
a6xx_gmu          345 drivers/gpu/drm/msm/adreno/a6xx_gmu.c static int a6xx_gmu_notify_slumber(struct a6xx_gmu *gmu)
a6xx_gmu          376 drivers/gpu/drm/msm/adreno/a6xx_gmu.c static int a6xx_rpmh_start(struct a6xx_gmu *gmu)
a6xx_gmu          411 drivers/gpu/drm/msm/adreno/a6xx_gmu.c static void a6xx_rpmh_stop(struct a6xx_gmu *gmu)
a6xx_gmu          434 drivers/gpu/drm/msm/adreno/a6xx_gmu.c static void a6xx_gmu_rpmh_init(struct a6xx_gmu *gmu)
a6xx_gmu          522 drivers/gpu/drm/msm/adreno/a6xx_gmu.c static void a6xx_gmu_power_config(struct a6xx_gmu *gmu)
a6xx_gmu          555 drivers/gpu/drm/msm/adreno/a6xx_gmu.c static int a6xx_gmu_fw_start(struct a6xx_gmu *gmu, unsigned int state)
a6xx_gmu          653 drivers/gpu/drm/msm/adreno/a6xx_gmu.c static void a6xx_gmu_irq_disable(struct a6xx_gmu *gmu)
a6xx_gmu          662 drivers/gpu/drm/msm/adreno/a6xx_gmu.c static void a6xx_gmu_rpmh_off(struct a6xx_gmu *gmu)
a6xx_gmu          678 drivers/gpu/drm/msm/adreno/a6xx_gmu.c static void a6xx_gmu_force_off(struct a6xx_gmu *gmu)
a6xx_gmu          697 drivers/gpu/drm/msm/adreno/a6xx_gmu.c 	struct a6xx_gmu *gmu = &a6xx_gpu->gmu;
a6xx_gmu          766 drivers/gpu/drm/msm/adreno/a6xx_gmu.c bool a6xx_gmu_isidle(struct a6xx_gmu *gmu)
a6xx_gmu          782 drivers/gpu/drm/msm/adreno/a6xx_gmu.c static void a6xx_gmu_shutdown(struct a6xx_gmu *gmu)
a6xx_gmu          845 drivers/gpu/drm/msm/adreno/a6xx_gmu.c 	struct a6xx_gmu *gmu = &a6xx_gpu->gmu;
a6xx_gmu          878 drivers/gpu/drm/msm/adreno/a6xx_gmu.c static void a6xx_gmu_memory_free(struct a6xx_gmu *gmu, struct a6xx_gmu_bo *bo)
a6xx_gmu          898 drivers/gpu/drm/msm/adreno/a6xx_gmu.c static struct a6xx_gmu_bo *a6xx_gmu_memory_alloc(struct a6xx_gmu *gmu,
a6xx_gmu          966 drivers/gpu/drm/msm/adreno/a6xx_gmu.c static int a6xx_gmu_memory_probe(struct a6xx_gmu *gmu)
a6xx_gmu         1091 drivers/gpu/drm/msm/adreno/a6xx_gmu.c static int a6xx_gmu_rpmh_votes_init(struct a6xx_gmu *gmu)
a6xx_gmu         1141 drivers/gpu/drm/msm/adreno/a6xx_gmu.c static int a6xx_gmu_pwrlevels_probe(struct a6xx_gmu *gmu)
a6xx_gmu         1173 drivers/gpu/drm/msm/adreno/a6xx_gmu.c static int a6xx_gmu_clocks_probe(struct a6xx_gmu *gmu)
a6xx_gmu         1209 drivers/gpu/drm/msm/adreno/a6xx_gmu.c static int a6xx_gmu_get_irq(struct a6xx_gmu *gmu, struct platform_device *pdev,
a6xx_gmu         1230 drivers/gpu/drm/msm/adreno/a6xx_gmu.c 	struct a6xx_gmu *gmu = &a6xx_gpu->gmu;
a6xx_gmu         1262 drivers/gpu/drm/msm/adreno/a6xx_gmu.c 	struct a6xx_gmu *gmu = &a6xx_gpu->gmu;
a6xx_gmu           82 drivers/gpu/drm/msm/adreno/a6xx_gmu.h static inline u32 gmu_read(struct a6xx_gmu *gmu, u32 offset)
a6xx_gmu           87 drivers/gpu/drm/msm/adreno/a6xx_gmu.h static inline void gmu_write(struct a6xx_gmu *gmu, u32 offset, u32 value)
a6xx_gmu           92 drivers/gpu/drm/msm/adreno/a6xx_gmu.h static inline void gmu_rmw(struct a6xx_gmu *gmu, u32 reg, u32 mask, u32 or)
a6xx_gmu          101 drivers/gpu/drm/msm/adreno/a6xx_gmu.h static inline u64 gmu_read64(struct a6xx_gmu *gmu, u32 lo, u32 hi)
a6xx_gmu          161 drivers/gpu/drm/msm/adreno/a6xx_gmu.h void a6xx_hfi_init(struct a6xx_gmu *gmu);
a6xx_gmu          162 drivers/gpu/drm/msm/adreno/a6xx_gmu.h int a6xx_hfi_start(struct a6xx_gmu *gmu, int boot_state);
a6xx_gmu          163 drivers/gpu/drm/msm/adreno/a6xx_gmu.h void a6xx_hfi_stop(struct a6xx_gmu *gmu);
a6xx_gmu          165 drivers/gpu/drm/msm/adreno/a6xx_gmu.h bool a6xx_gmu_gx_is_on(struct a6xx_gmu *gmu);
a6xx_gmu          166 drivers/gpu/drm/msm/adreno/a6xx_gmu.h bool a6xx_gmu_sptprac_is_on(struct a6xx_gmu *gmu);
a6xx_gmu          269 drivers/gpu/drm/msm/adreno/a6xx_gpu.c 	struct a6xx_gmu *gmu = &a6xx_gpu->gmu;
a6xx_gmu           23 drivers/gpu/drm/msm/adreno/a6xx_gpu.h 	struct a6xx_gmu gmu;
a6xx_gmu           49 drivers/gpu/drm/msm/adreno/a6xx_gpu.h int a6xx_gmu_wait_for_idle(struct a6xx_gmu *gmu);
a6xx_gmu           51 drivers/gpu/drm/msm/adreno/a6xx_gpu.h bool a6xx_gmu_isidle(struct a6xx_gmu *gmu);
a6xx_gmu           53 drivers/gpu/drm/msm/adreno/a6xx_gpu.h int a6xx_gmu_set_oob(struct a6xx_gmu *gmu, enum a6xx_gmu_oob_state state);
a6xx_gmu           54 drivers/gpu/drm/msm/adreno/a6xx_gpu.h void a6xx_gmu_clear_oob(struct a6xx_gmu *gmu, enum a6xx_gmu_oob_state state);
a6xx_gmu          724 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c 	struct a6xx_gmu *gmu = &a6xx_gpu->gmu;
a6xx_gmu           54 drivers/gpu/drm/msm/adreno/a6xx_hfi.c static int a6xx_hfi_queue_write(struct a6xx_gmu *gmu,
a6xx_gmu           82 drivers/gpu/drm/msm/adreno/a6xx_hfi.c static int a6xx_hfi_wait_for_ack(struct a6xx_gmu *gmu, u32 id, u32 seqnum,
a6xx_gmu          151 drivers/gpu/drm/msm/adreno/a6xx_hfi.c static int a6xx_hfi_send_msg(struct a6xx_gmu *gmu, int id,
a6xx_gmu          174 drivers/gpu/drm/msm/adreno/a6xx_hfi.c static int a6xx_hfi_send_gmu_init(struct a6xx_gmu *gmu, int boot_state)
a6xx_gmu          186 drivers/gpu/drm/msm/adreno/a6xx_hfi.c static int a6xx_hfi_get_fw_version(struct a6xx_gmu *gmu, u32 *version)
a6xx_gmu          197 drivers/gpu/drm/msm/adreno/a6xx_hfi.c static int a6xx_hfi_send_perf_table(struct a6xx_gmu *gmu)
a6xx_gmu          219 drivers/gpu/drm/msm/adreno/a6xx_hfi.c static int a6xx_hfi_send_bw_table(struct a6xx_gmu *gmu)
a6xx_gmu          266 drivers/gpu/drm/msm/adreno/a6xx_hfi.c static int a6xx_hfi_send_test(struct a6xx_gmu *gmu)
a6xx_gmu          274 drivers/gpu/drm/msm/adreno/a6xx_hfi.c int a6xx_hfi_start(struct a6xx_gmu *gmu, int boot_state)
a6xx_gmu          309 drivers/gpu/drm/msm/adreno/a6xx_hfi.c void a6xx_hfi_stop(struct a6xx_gmu *gmu)
a6xx_gmu          351 drivers/gpu/drm/msm/adreno/a6xx_hfi.c void a6xx_hfi_init(struct a6xx_gmu *gmu)