a5xx_gpu          106 drivers/gpu/drm/msm/adreno/a5xx_debugfs.c 	struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu);
a5xx_gpu          125 drivers/gpu/drm/msm/adreno/a5xx_debugfs.c 	if (a5xx_gpu->pm4_bo) {
a5xx_gpu          126 drivers/gpu/drm/msm/adreno/a5xx_debugfs.c 		msm_gem_unpin_iova(a5xx_gpu->pm4_bo, gpu->aspace);
a5xx_gpu          127 drivers/gpu/drm/msm/adreno/a5xx_debugfs.c 		drm_gem_object_put(a5xx_gpu->pm4_bo);
a5xx_gpu          128 drivers/gpu/drm/msm/adreno/a5xx_debugfs.c 		a5xx_gpu->pm4_bo = NULL;
a5xx_gpu          131 drivers/gpu/drm/msm/adreno/a5xx_debugfs.c 	if (a5xx_gpu->pfp_bo) {
a5xx_gpu          132 drivers/gpu/drm/msm/adreno/a5xx_debugfs.c 		msm_gem_unpin_iova(a5xx_gpu->pfp_bo, gpu->aspace);
a5xx_gpu          133 drivers/gpu/drm/msm/adreno/a5xx_debugfs.c 		drm_gem_object_put(a5xx_gpu->pfp_bo);
a5xx_gpu          134 drivers/gpu/drm/msm/adreno/a5xx_debugfs.c 		a5xx_gpu->pfp_bo = NULL;
a5xx_gpu           24 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu);
a5xx_gpu           42 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	if (a5xx_gpu->cur_ring == ring && !a5xx_in_preempt(a5xx_gpu))
a5xx_gpu          110 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu);
a5xx_gpu          130 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	OUT_RING(ring, lower_32_bits(a5xx_gpu->preempt_iova[submit->ring->id]));
a5xx_gpu          131 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	OUT_RING(ring, upper_32_bits(a5xx_gpu->preempt_iova[submit->ring->id]));
a5xx_gpu          371 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu);
a5xx_gpu          383 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	OUT_RING(ring, lower_32_bits(a5xx_gpu->preempt_iova[ring->id]));
a5xx_gpu          384 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	OUT_RING(ring, upper_32_bits(a5xx_gpu->preempt_iova[ring->id]));
a5xx_gpu          414 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu);
a5xx_gpu          417 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	if (!a5xx_gpu->pm4_bo) {
a5xx_gpu          418 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 		a5xx_gpu->pm4_bo = adreno_fw_create_bo(gpu,
a5xx_gpu          419 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 			adreno_gpu->fw[ADRENO_FW_PM4], &a5xx_gpu->pm4_iova);
a5xx_gpu          422 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 		if (IS_ERR(a5xx_gpu->pm4_bo)) {
a5xx_gpu          423 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 			ret = PTR_ERR(a5xx_gpu->pm4_bo);
a5xx_gpu          424 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 			a5xx_gpu->pm4_bo = NULL;
a5xx_gpu          430 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 		msm_gem_object_set_name(a5xx_gpu->pm4_bo, "pm4fw");
a5xx_gpu          433 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	if (!a5xx_gpu->pfp_bo) {
a5xx_gpu          434 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 		a5xx_gpu->pfp_bo = adreno_fw_create_bo(gpu,
a5xx_gpu          435 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 			adreno_gpu->fw[ADRENO_FW_PFP], &a5xx_gpu->pfp_iova);
a5xx_gpu          437 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 		if (IS_ERR(a5xx_gpu->pfp_bo)) {
a5xx_gpu          438 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 			ret = PTR_ERR(a5xx_gpu->pfp_bo);
a5xx_gpu          439 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 			a5xx_gpu->pfp_bo = NULL;
a5xx_gpu          445 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 		msm_gem_object_set_name(a5xx_gpu->pfp_bo, "pfpfw");
a5xx_gpu          449 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 		REG_A5XX_CP_ME_INSTR_BASE_HI, a5xx_gpu->pm4_iova);
a5xx_gpu          452 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 		REG_A5XX_CP_PFP_INSTR_BASE_HI, a5xx_gpu->pfp_iova);
a5xx_gpu          772 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu);
a5xx_gpu          778 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	if (a5xx_gpu->pm4_bo) {
a5xx_gpu          779 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 		msm_gem_unpin_iova(a5xx_gpu->pm4_bo, gpu->aspace);
a5xx_gpu          780 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 		drm_gem_object_put_unlocked(a5xx_gpu->pm4_bo);
a5xx_gpu          783 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	if (a5xx_gpu->pfp_bo) {
a5xx_gpu          784 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 		msm_gem_unpin_iova(a5xx_gpu->pfp_bo, gpu->aspace);
a5xx_gpu          785 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 		drm_gem_object_put_unlocked(a5xx_gpu->pfp_bo);
a5xx_gpu          788 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	if (a5xx_gpu->gpmu_bo) {
a5xx_gpu          789 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 		msm_gem_unpin_iova(a5xx_gpu->gpmu_bo, gpu->aspace);
a5xx_gpu          790 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 		drm_gem_object_put_unlocked(a5xx_gpu->gpmu_bo);
a5xx_gpu          794 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	kfree(a5xx_gpu);
a5xx_gpu          813 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu);
a5xx_gpu          815 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	if (ring != a5xx_gpu->cur_ring) {
a5xx_gpu         1353 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu);
a5xx_gpu         1355 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	return a5xx_gpu->cur_ring;
a5xx_gpu         1424 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	struct a5xx_gpu *a5xx_gpu = NULL;
a5xx_gpu         1434 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	a5xx_gpu = kzalloc(sizeof(*a5xx_gpu), GFP_KERNEL);
a5xx_gpu         1435 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	if (!a5xx_gpu)
a5xx_gpu         1438 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	adreno_gpu = &a5xx_gpu->base;
a5xx_gpu         1444 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 	a5xx_gpu->lm_leakage = 0x4E001A;
a5xx_gpu         1450 drivers/gpu/drm/msm/adreno/a5xx_gpu.c 		a5xx_destroy(&(a5xx_gpu->base.base));
a5xx_gpu           41 drivers/gpu/drm/msm/adreno/a5xx_gpu.h #define to_a5xx_gpu(x) container_of(x, struct a5xx_gpu, base)
a5xx_gpu          153 drivers/gpu/drm/msm/adreno/a5xx_gpu.h static inline bool a5xx_in_preempt(struct a5xx_gpu *a5xx_gpu)
a5xx_gpu          155 drivers/gpu/drm/msm/adreno/a5xx_gpu.h 	int preempt_state = atomic_read(&a5xx_gpu->preempt_state);
a5xx_gpu          125 drivers/gpu/drm/msm/adreno/a5xx_power.c 	struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu);
a5xx_gpu          141 drivers/gpu/drm/msm/adreno/a5xx_power.c 	gpu_write(gpu, REG_A5XX_GPMU_BASE_LEAKAGE, a5xx_gpu->lm_leakage);
a5xx_gpu          223 drivers/gpu/drm/msm/adreno/a5xx_power.c 	struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu);
a5xx_gpu          226 drivers/gpu/drm/msm/adreno/a5xx_power.c 	if (!a5xx_gpu->gpmu_dwords)
a5xx_gpu          235 drivers/gpu/drm/msm/adreno/a5xx_power.c 	OUT_RING(ring, lower_32_bits(a5xx_gpu->gpmu_iova));
a5xx_gpu          236 drivers/gpu/drm/msm/adreno/a5xx_power.c 	OUT_RING(ring, upper_32_bits(a5xx_gpu->gpmu_iova));
a5xx_gpu          237 drivers/gpu/drm/msm/adreno/a5xx_power.c 	OUT_RING(ring, a5xx_gpu->gpmu_dwords);
a5xx_gpu          323 drivers/gpu/drm/msm/adreno/a5xx_power.c 	struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu);
a5xx_gpu          329 drivers/gpu/drm/msm/adreno/a5xx_power.c 	if (a5xx_gpu->gpmu_bo)
a5xx_gpu          360 drivers/gpu/drm/msm/adreno/a5xx_power.c 		&a5xx_gpu->gpmu_bo, &a5xx_gpu->gpmu_iova);
a5xx_gpu          364 drivers/gpu/drm/msm/adreno/a5xx_power.c 	msm_gem_object_set_name(a5xx_gpu->gpmu_bo, "gpmufw");
a5xx_gpu          381 drivers/gpu/drm/msm/adreno/a5xx_power.c 	msm_gem_put_vaddr(a5xx_gpu->gpmu_bo);
a5xx_gpu          382 drivers/gpu/drm/msm/adreno/a5xx_power.c 	a5xx_gpu->gpmu_dwords = dwords;
a5xx_gpu           12 drivers/gpu/drm/msm/adreno/a5xx_preempt.c static inline bool try_preempt_state(struct a5xx_gpu *a5xx_gpu,
a5xx_gpu           15 drivers/gpu/drm/msm/adreno/a5xx_preempt.c 	enum preempt_state cur = atomic_cmpxchg(&a5xx_gpu->preempt_state,
a5xx_gpu           25 drivers/gpu/drm/msm/adreno/a5xx_preempt.c static inline void set_preempt_state(struct a5xx_gpu *gpu,
a5xx_gpu           78 drivers/gpu/drm/msm/adreno/a5xx_preempt.c 	struct a5xx_gpu *a5xx_gpu = from_timer(a5xx_gpu, t, preempt_timer);
a5xx_gpu           79 drivers/gpu/drm/msm/adreno/a5xx_preempt.c 	struct msm_gpu *gpu = &a5xx_gpu->base.base;
a5xx_gpu           83 drivers/gpu/drm/msm/adreno/a5xx_preempt.c 	if (!try_preempt_state(a5xx_gpu, PREEMPT_TRIGGERED, PREEMPT_FAULTED))
a5xx_gpu           94 drivers/gpu/drm/msm/adreno/a5xx_preempt.c 	struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu);
a5xx_gpu          105 drivers/gpu/drm/msm/adreno/a5xx_preempt.c 	if (!try_preempt_state(a5xx_gpu, PREEMPT_NONE, PREEMPT_START))
a5xx_gpu          115 drivers/gpu/drm/msm/adreno/a5xx_preempt.c 	if (!ring || (a5xx_gpu->cur_ring == ring)) {
a5xx_gpu          128 drivers/gpu/drm/msm/adreno/a5xx_preempt.c 		set_preempt_state(a5xx_gpu, PREEMPT_ABORT);
a5xx_gpu          129 drivers/gpu/drm/msm/adreno/a5xx_preempt.c 		update_wptr(gpu, a5xx_gpu->cur_ring);
a5xx_gpu          130 drivers/gpu/drm/msm/adreno/a5xx_preempt.c 		set_preempt_state(a5xx_gpu, PREEMPT_NONE);
a5xx_gpu          136 drivers/gpu/drm/msm/adreno/a5xx_preempt.c 	a5xx_gpu->preempt[ring->id]->wptr = get_wptr(ring);
a5xx_gpu          142 drivers/gpu/drm/msm/adreno/a5xx_preempt.c 		a5xx_gpu->preempt_iova[ring->id]);
a5xx_gpu          144 drivers/gpu/drm/msm/adreno/a5xx_preempt.c 	a5xx_gpu->next_ring = ring;
a5xx_gpu          147 drivers/gpu/drm/msm/adreno/a5xx_preempt.c 	mod_timer(&a5xx_gpu->preempt_timer, jiffies + msecs_to_jiffies(10000));
a5xx_gpu          150 drivers/gpu/drm/msm/adreno/a5xx_preempt.c 	set_preempt_state(a5xx_gpu, PREEMPT_TRIGGERED);
a5xx_gpu          163 drivers/gpu/drm/msm/adreno/a5xx_preempt.c 	struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu);
a5xx_gpu          167 drivers/gpu/drm/msm/adreno/a5xx_preempt.c 	if (!try_preempt_state(a5xx_gpu, PREEMPT_TRIGGERED, PREEMPT_PENDING))
a5xx_gpu          171 drivers/gpu/drm/msm/adreno/a5xx_preempt.c 	del_timer(&a5xx_gpu->preempt_timer);
a5xx_gpu          181 drivers/gpu/drm/msm/adreno/a5xx_preempt.c 		set_preempt_state(a5xx_gpu, PREEMPT_FAULTED);
a5xx_gpu          188 drivers/gpu/drm/msm/adreno/a5xx_preempt.c 	a5xx_gpu->cur_ring = a5xx_gpu->next_ring;
a5xx_gpu          189 drivers/gpu/drm/msm/adreno/a5xx_preempt.c 	a5xx_gpu->next_ring = NULL;
a5xx_gpu          191 drivers/gpu/drm/msm/adreno/a5xx_preempt.c 	update_wptr(gpu, a5xx_gpu->cur_ring);
a5xx_gpu          193 drivers/gpu/drm/msm/adreno/a5xx_preempt.c 	set_preempt_state(a5xx_gpu, PREEMPT_NONE);
a5xx_gpu          199 drivers/gpu/drm/msm/adreno/a5xx_preempt.c 	struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu);
a5xx_gpu          203 drivers/gpu/drm/msm/adreno/a5xx_preempt.c 	a5xx_gpu->cur_ring = gpu->rb[0];
a5xx_gpu          210 drivers/gpu/drm/msm/adreno/a5xx_preempt.c 		a5xx_gpu->preempt[i]->wptr = 0;
a5xx_gpu          211 drivers/gpu/drm/msm/adreno/a5xx_preempt.c 		a5xx_gpu->preempt[i]->rptr = 0;
a5xx_gpu          212 drivers/gpu/drm/msm/adreno/a5xx_preempt.c 		a5xx_gpu->preempt[i]->rbase = gpu->rb[i]->iova;
a5xx_gpu          220 drivers/gpu/drm/msm/adreno/a5xx_preempt.c 	set_preempt_state(a5xx_gpu, PREEMPT_NONE);
a5xx_gpu          223 drivers/gpu/drm/msm/adreno/a5xx_preempt.c static int preempt_init_ring(struct a5xx_gpu *a5xx_gpu,
a5xx_gpu          226 drivers/gpu/drm/msm/adreno/a5xx_preempt.c 	struct adreno_gpu *adreno_gpu = &a5xx_gpu->base;
a5xx_gpu          241 drivers/gpu/drm/msm/adreno/a5xx_preempt.c 	a5xx_gpu->preempt_bo[ring->id] = bo;
a5xx_gpu          242 drivers/gpu/drm/msm/adreno/a5xx_preempt.c 	a5xx_gpu->preempt_iova[ring->id] = iova;
a5xx_gpu          243 drivers/gpu/drm/msm/adreno/a5xx_preempt.c 	a5xx_gpu->preempt[ring->id] = ptr;
a5xx_gpu          260 drivers/gpu/drm/msm/adreno/a5xx_preempt.c 	struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu);
a5xx_gpu          264 drivers/gpu/drm/msm/adreno/a5xx_preempt.c 		msm_gem_kernel_put(a5xx_gpu->preempt_bo[i], gpu->aspace, true);
a5xx_gpu          270 drivers/gpu/drm/msm/adreno/a5xx_preempt.c 	struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu);
a5xx_gpu          278 drivers/gpu/drm/msm/adreno/a5xx_preempt.c 		if (preempt_init_ring(a5xx_gpu, gpu->rb[i])) {
a5xx_gpu          290 drivers/gpu/drm/msm/adreno/a5xx_preempt.c 	timer_setup(&a5xx_gpu->preempt_timer, a5xx_preempt_timer, 0);