_id 8 arch/arm/mach-imx/devices/platform-flexcan.c #define imx_flexcan_data_entry_single(soc, _id, _hwid, _size) \ _id 10 arch/arm/mach-imx/devices/platform-flexcan.c .id = _id, \ _id 16 arch/arm/mach-imx/devices/platform-flexcan.c #define imx_flexcan_data_entry(soc, _id, _hwid, _size) \ _id 17 arch/arm/mach-imx/devices/platform-flexcan.c [_id] = imx_flexcan_data_entry_single(soc, _id, _hwid, _size) _id 21 arch/arm/mach-imx/devices/platform-flexcan.c #define imx35_flexcan_data_entry(_id, _hwid) \ _id 22 arch/arm/mach-imx/devices/platform-flexcan.c imx_flexcan_data_entry(MX35, _id, _hwid, SZ_16K) _id 9 arch/arm/mach-imx/devices/platform-imx-i2c.c #define imx_imx_i2c_data_entry_single(soc, _devid, _id, _hwid, _size) \ _id 12 arch/arm/mach-imx/devices/platform-imx-i2c.c .id = _id, \ _id 18 arch/arm/mach-imx/devices/platform-imx-i2c.c #define imx_imx_i2c_data_entry(soc, _devid, _id, _hwid, _size) \ _id 19 arch/arm/mach-imx/devices/platform-imx-i2c.c [_id] = imx_imx_i2c_data_entry_single(soc, _devid, _id, _hwid, _size) _id 28 arch/arm/mach-imx/devices/platform-imx-i2c.c #define imx27_imx_i2c_data_entry(_id, _hwid) \ _id 29 arch/arm/mach-imx/devices/platform-imx-i2c.c imx_imx_i2c_data_entry(MX27, "imx21-i2c", _id, _hwid, SZ_4K) _id 37 arch/arm/mach-imx/devices/platform-imx-i2c.c #define imx31_imx_i2c_data_entry(_id, _hwid) \ _id 38 arch/arm/mach-imx/devices/platform-imx-i2c.c imx_imx_i2c_data_entry(MX31, "imx21-i2c", _id, _hwid, SZ_4K) _id 47 arch/arm/mach-imx/devices/platform-imx-i2c.c #define imx35_imx_i2c_data_entry(_id, _hwid) \ _id 48 arch/arm/mach-imx/devices/platform-imx-i2c.c imx_imx_i2c_data_entry(MX35, "imx21-i2c", _id, _hwid, SZ_4K) _id 9 arch/arm/mach-imx/devices/platform-imx-ssi.c #define imx_imx_ssi_data_entry(soc, _id, _hwid, _size) \ _id 10 arch/arm/mach-imx/devices/platform-imx-ssi.c [_id] = { \ _id 11 arch/arm/mach-imx/devices/platform-imx-ssi.c .id = _id, \ _id 23 arch/arm/mach-imx/devices/platform-imx-ssi.c #define imx21_imx_ssi_data_entry(_id, _hwid) \ _id 24 arch/arm/mach-imx/devices/platform-imx-ssi.c imx_imx_ssi_data_entry(MX21, _id, _hwid, SZ_4K) _id 32 arch/arm/mach-imx/devices/platform-imx-ssi.c #define imx27_imx_ssi_data_entry(_id, _hwid) \ _id 33 arch/arm/mach-imx/devices/platform-imx-ssi.c imx_imx_ssi_data_entry(MX27, _id, _hwid, SZ_4K) _id 41 arch/arm/mach-imx/devices/platform-imx-ssi.c #define imx31_imx_ssi_data_entry(_id, _hwid) \ _id 42 arch/arm/mach-imx/devices/platform-imx-ssi.c imx_imx_ssi_data_entry(MX31, _id, _hwid, SZ_4K) _id 50 arch/arm/mach-imx/devices/platform-imx-ssi.c #define imx35_imx_ssi_data_entry(_id, _hwid) \ _id 51 arch/arm/mach-imx/devices/platform-imx-ssi.c imx_imx_ssi_data_entry(MX35, _id, _hwid, SZ_4K) _id 9 arch/arm/mach-imx/devices/platform-imx-uart.c #define imx_imx_uart_3irq_data_entry(soc, _id, _hwid, _size) \ _id 10 arch/arm/mach-imx/devices/platform-imx-uart.c [_id] = { \ _id 11 arch/arm/mach-imx/devices/platform-imx-uart.c .id = _id, \ _id 19 arch/arm/mach-imx/devices/platform-imx-uart.c #define imx_imx_uart_1irq_data_entry(soc, _id, _hwid, _size) \ _id 20 arch/arm/mach-imx/devices/platform-imx-uart.c [_id] = { \ _id 21 arch/arm/mach-imx/devices/platform-imx-uart.c .id = _id, \ _id 29 arch/arm/mach-imx/devices/platform-imx-uart.c #define imx21_imx_uart_data_entry(_id, _hwid) \ _id 30 arch/arm/mach-imx/devices/platform-imx-uart.c imx_imx_uart_1irq_data_entry(MX21, _id, _hwid, SZ_4K) _id 40 arch/arm/mach-imx/devices/platform-imx-uart.c #define imx27_imx_uart_data_entry(_id, _hwid) \ _id 41 arch/arm/mach-imx/devices/platform-imx-uart.c imx_imx_uart_1irq_data_entry(MX27, _id, _hwid, SZ_4K) _id 53 arch/arm/mach-imx/devices/platform-imx-uart.c #define imx31_imx_uart_data_entry(_id, _hwid) \ _id 54 arch/arm/mach-imx/devices/platform-imx-uart.c imx_imx_uart_1irq_data_entry(MX31, _id, _hwid, SZ_4K) _id 65 arch/arm/mach-imx/devices/platform-imx-uart.c #define imx35_imx_uart_data_entry(_id, _hwid) \ _id 66 arch/arm/mach-imx/devices/platform-imx-uart.c imx_imx_uart_1irq_data_entry(MX35, _id, _hwid, SZ_16K) _id 11 arch/arm/mach-imx/devices/platform-imx2-wdt.c #define imx_imx2_wdt_data_entry_single(soc, _id, _hwid, _size) \ _id 13 arch/arm/mach-imx/devices/platform-imx2-wdt.c .id = _id, \ _id 17 arch/arm/mach-imx/devices/platform-imx2-wdt.c #define imx_imx2_wdt_data_entry(soc, _id, _hwid, _size) \ _id 18 arch/arm/mach-imx/devices/platform-imx2-wdt.c [_id] = imx_imx2_wdt_data_entry_single(soc, _id, _hwid, _size) _id 11 arch/arm/mach-imx/devices/platform-mxc-ehci.c #define imx_mxc_ehci_data_entry_single(soc, _id, hs) \ _id 13 arch/arm/mach-imx/devices/platform-mxc-ehci.c .id = _id, \ _id 11 arch/arm/mach-imx/devices/platform-mxc-mmc.c #define imx_mxc_mmc_data_entry_single(soc, _devid, _id, _hwid, _size) \ _id 14 arch/arm/mach-imx/devices/platform-mxc-mmc.c .id = _id, \ _id 20 arch/arm/mach-imx/devices/platform-mxc-mmc.c #define imx_mxc_mmc_data_entry(soc, _devid, _id, _hwid, _size) \ _id 21 arch/arm/mach-imx/devices/platform-mxc-mmc.c [_id] = imx_mxc_mmc_data_entry_single(soc, _devid, _id, _hwid, _size) _id 25 arch/arm/mach-imx/devices/platform-mxc-mmc.c #define imx21_mxc_mmc_data_entry(_id, _hwid) \ _id 26 arch/arm/mach-imx/devices/platform-mxc-mmc.c imx_mxc_mmc_data_entry(MX21, "imx21-mmc", _id, _hwid, SZ_4K) _id 34 arch/arm/mach-imx/devices/platform-mxc-mmc.c #define imx27_mxc_mmc_data_entry(_id, _hwid) \ _id 35 arch/arm/mach-imx/devices/platform-mxc-mmc.c imx_mxc_mmc_data_entry(MX27, "imx21-mmc", _id, _hwid, SZ_4K) _id 43 arch/arm/mach-imx/devices/platform-mxc-mmc.c #define imx31_mxc_mmc_data_entry(_id, _hwid) \ _id 44 arch/arm/mach-imx/devices/platform-mxc-mmc.c imx_mxc_mmc_data_entry(MX31, "imx31-mmc", _id, _hwid, SZ_16K) _id 11 arch/arm/mach-imx/devices/platform-sdhci-esdhc-imx.c #define imx_sdhci_esdhc_imx_data_entry_single(soc, _devid, _id, hwid) \ _id 14 arch/arm/mach-imx/devices/platform-sdhci-esdhc-imx.c .id = _id, \ _id 25 arch/arm/mach-imx/devices/platform-sdhci-esdhc-imx.c #define imx35_sdhci_esdhc_imx_data_entry(_id, _hwid) \ _id 26 arch/arm/mach-imx/devices/platform-sdhci-esdhc-imx.c imx_sdhci_esdhc_imx_data_entry(MX35, "sdhci-esdhc-imx35", _id, _hwid) _id 9 arch/arm/mach-imx/devices/platform-spi_imx.c #define imx_spi_imx_data_entry_single(soc, type, _devid, _id, hwid, _size) \ _id 12 arch/arm/mach-imx/devices/platform-spi_imx.c .id = _id, \ _id 23 arch/arm/mach-imx/devices/platform-spi_imx.c #define imx21_cspi_data_entry(_id, _hwid) \ _id 24 arch/arm/mach-imx/devices/platform-spi_imx.c imx_spi_imx_data_entry(MX21, CSPI, "imx21-cspi", _id, _hwid, SZ_4K) _id 32 arch/arm/mach-imx/devices/platform-spi_imx.c #define imx27_cspi_data_entry(_id, _hwid) \ _id 33 arch/arm/mach-imx/devices/platform-spi_imx.c imx_spi_imx_data_entry(MX27, CSPI, "imx27-cspi", _id, _hwid, SZ_4K) _id 42 arch/arm/mach-imx/devices/platform-spi_imx.c #define imx31_cspi_data_entry(_id, _hwid) \ _id 43 arch/arm/mach-imx/devices/platform-spi_imx.c imx_spi_imx_data_entry(MX31, CSPI, "imx31-cspi", _id, _hwid, SZ_4K) _id 52 arch/arm/mach-imx/devices/platform-spi_imx.c #define imx35_cspi_data_entry(_id, _hwid) \ _id 53 arch/arm/mach-imx/devices/platform-spi_imx.c imx_spi_imx_data_entry(MX35, CSPI, "imx35-cspi", _id, _hwid, SZ_4K) _id 20 arch/arm/mach-mmp/devices.h #define PXA168_DEVICE(_name, _drv, _id, _irq, _start, _size, _dma...) \ _id 24 arch/arm/mach-mmp/devices.h .id = _id, \ _id 31 arch/arm/mach-mmp/devices.h #define PXA910_DEVICE(_name, _drv, _id, _irq, _start, _size, _dma...) \ _id 35 arch/arm/mach-mmp/devices.h .id = _id, \ _id 42 arch/arm/mach-mmp/devices.h #define MMP2_DEVICE(_name, _drv, _id, _irq, _start, _size, _dma...) \ _id 46 arch/arm/mach-mmp/devices.h .id = _id, \ _id 1139 arch/arm/mach-pxa/em-x270.c #define DA9030_SUBDEV(_name, _id, _pdata) \ _id 1142 arch/arm/mach-pxa/em-x270.c .id = DA9030_ID_##_id, \ _id 106 arch/arm/mach-pxa/include/mach/hardware.h unsigned int _id = (id) & 0xf3f0; \ _id 107 arch/arm/mach-pxa/include/mach/hardware.h _id == 0x2120; \ _id 112 arch/arm/mach-pxa/include/mach/hardware.h unsigned int _id = (id) & 0xf3ff; \ _id 113 arch/arm/mach-pxa/include/mach/hardware.h _id <= 0x2105; \ _id 118 arch/arm/mach-pxa/include/mach/hardware.h unsigned int _id = (id) & 0xffff; \ _id 119 arch/arm/mach-pxa/include/mach/hardware.h _id == 0x2d06; \ _id 124 arch/arm/mach-pxa/include/mach/hardware.h unsigned int _id = (id) & 0xf300; \ _id 125 arch/arm/mach-pxa/include/mach/hardware.h _id == 0x2100; \ _id 137 arch/arm/mach-pxa/include/mach/hardware.h unsigned int _id = (id) >> 4 & 0xfff; \ _id 138 arch/arm/mach-pxa/include/mach/hardware.h _id == 0x411; \ _id 147 arch/arm/mach-pxa/include/mach/hardware.h unsigned int _id = (id) >> 4 & 0xfff; \ _id 148 arch/arm/mach-pxa/include/mach/hardware.h _id == 0x688; \ _id 157 arch/arm/mach-pxa/include/mach/hardware.h unsigned int _id = (id) >> 4 & 0xfff; \ _id 158 arch/arm/mach-pxa/include/mach/hardware.h _id == 0x689; \ _id 167 arch/arm/mach-pxa/include/mach/hardware.h unsigned int _id = (id) >> 4 & 0xfff; \ _id 168 arch/arm/mach-pxa/include/mach/hardware.h _id == 0x603 || _id == 0x682; \ _id 177 arch/arm/mach-pxa/include/mach/hardware.h unsigned int _id = (id) >> 4 & 0xfff; \ _id 178 arch/arm/mach-pxa/include/mach/hardware.h _id == 0x683; \ _id 187 arch/arm/mach-pxa/include/mach/hardware.h unsigned int _id = (id) >> 4 & 0xfff; \ _id 188 arch/arm/mach-pxa/include/mach/hardware.h _id == 0x693; \ _id 253 arch/arm/mach-pxa/include/mach/hardware.h unsigned int _id = (id) >> 13 & 0x7; \ _id 254 arch/arm/mach-pxa/include/mach/hardware.h _id <= 0x2; \ _id 21 arch/mips/include/asm/mips_machine.h #define MIPS_MACHINE(_type, _id, _name, _setup) \ _id 25 arch/mips/include/asm/mips_machine.h __aligned(1) = _id; \ _id 23 arch/mips/loongson32/common/platform.c #define LS1X_UART(_id) \ _id 25 arch/mips/loongson32/common/platform.c .mapbase = LS1X_UART ## _id ## _BASE, \ _id 26 arch/mips/loongson32/common/platform.c .irq = LS1X_UART ## _id ## _IRQ, \ _id 149 arch/powerpc/include/asm/perf_event_server.h #define EVENT_VAR(_id, _suffix) event_attr_##_id##_suffix _id 150 arch/powerpc/include/asm/perf_event_server.h #define EVENT_PTR(_id, _suffix) &EVENT_VAR(_id, _suffix).attr.attr _id 152 arch/powerpc/include/asm/perf_event_server.h #define EVENT_ATTR(_name, _id, _suffix) \ _id 153 arch/powerpc/include/asm/perf_event_server.h PMU_EVENT_ATTR(_name, EVENT_VAR(_id, _suffix), _id, \ _id 156 arch/powerpc/include/asm/perf_event_server.h #define GENERIC_EVENT_ATTR(_name, _id) EVENT_ATTR(_name, _id, _g) _id 157 arch/powerpc/include/asm/perf_event_server.h #define GENERIC_EVENT_PTR(_id) EVENT_PTR(_id, _g) _id 159 arch/powerpc/include/asm/perf_event_server.h #define CACHE_EVENT_ATTR(_name, _id) EVENT_ATTR(_name, _id, _c) _id 160 arch/powerpc/include/asm/perf_event_server.h #define CACHE_EVENT_PTR(_id) EVENT_PTR(_id, _c) _id 162 arch/powerpc/include/asm/perf_event_server.h #define POWER_EVENT_ATTR(_name, _id) EVENT_ATTR(_name, _id, _p) _id 163 arch/powerpc/include/asm/perf_event_server.h #define POWER_EVENT_PTR(_id) EVENT_PTR(_id, _p) _id 237 arch/s390/include/asm/debug.h #define debug_sprintf_event(_id, _level, _fmt, ...) \ _id 240 arch/s390/include/asm/debug.h debug_info_t *__id = _id; \ _id 367 arch/s390/include/asm/debug.h #define debug_sprintf_exception(_id, _level, _fmt, ...) \ _id 370 arch/s390/include/asm/debug.h debug_info_t *__id = _id; \ _id 741 arch/x86/events/perf_event.h #define EVENT_VAR(_id) event_attr_##_id _id 742 arch/x86/events/perf_event.h #define EVENT_PTR(_id) &event_attr_##_id.attr.attr _id 744 arch/x86/events/perf_event.h #define EVENT_ATTR(_name, _id) \ _id 745 arch/x86/events/perf_event.h static struct perf_pmu_events_attr EVENT_VAR(_id) = { \ _id 747 arch/x86/events/perf_event.h .id = PERF_COUNT_HW_##_id, \ _id 1092 drivers/clk/clk-stm32mp1.c #define GATE(_id, _name, _parent, _flags, _offset, _bit_idx, _gate_flags)\ _id 1094 drivers/clk/clk-stm32mp1.c .id = _id,\ _id 1106 drivers/clk/clk-stm32mp1.c #define FIXED_FACTOR(_id, _name, _parent, _flags, _mult, _div)\ _id 1108 drivers/clk/clk-stm32mp1.c .id = _id,\ _id 1119 drivers/clk/clk-stm32mp1.c #define DIV_TABLE(_id, _name, _parent, _flags, _offset, _shift, _width,\ _id 1122 drivers/clk/clk-stm32mp1.c .id = _id,\ _id 1136 drivers/clk/clk-stm32mp1.c #define DIV(_id, _name, _parent, _flags, _offset, _shift, _width, _div_flags)\ _id 1137 drivers/clk/clk-stm32mp1.c DIV_TABLE(_id, _name, _parent, _flags, _offset, _shift, _width,\ _id 1140 drivers/clk/clk-stm32mp1.c #define MUX(_id, _name, _parents, _flags, _offset, _shift, _width, _mux_flags)\ _id 1142 drivers/clk/clk-stm32mp1.c .id = _id,\ _id 1156 drivers/clk/clk-stm32mp1.c #define PLL(_id, _name, _parent, _flags, _offset)\ _id 1158 drivers/clk/clk-stm32mp1.c .id = _id,\ _id 1181 drivers/clk/clk-stm32mp1.c #define STM32_TIM(_id, _name, _parent, _offset_set, _bit_idx)\ _id 1182 drivers/clk/clk-stm32mp1.c GATE_MP1(_id, _name, _parent, CLK_SET_RATE_PARENT,\ _id 1186 drivers/clk/clk-stm32mp1.c #define STM32_GATE(_id, _name, _parent, _flags, _gate)\ _id 1188 drivers/clk/clk-stm32mp1.c .id = _id,\ _id 1221 drivers/clk/clk-stm32mp1.c #define GATE_MP1(_id, _name, _parent, _flags, _offset, _bit_idx, _gate_flags)\ _id 1222 drivers/clk/clk-stm32mp1.c STM32_GATE(_id, _name, _parent, _flags,\ _id 1225 drivers/clk/clk-stm32mp1.c #define MGATE_MP1(_id, _name, _parent, _flags, _mgate)\ _id 1226 drivers/clk/clk-stm32mp1.c STM32_GATE(_id, _name, _parent, _flags,\ _id 1270 drivers/clk/clk-stm32mp1.c #define COMPOSITE(_id, _name, _parents, _flags, _gate, _mux, _div)\ _id 1272 drivers/clk/clk-stm32mp1.c .id = _id,\ _id 1285 drivers/clk/clk-stm32mp1.c #define PCLK(_id, _name, _parent, _flags, _mgate)\ _id 1286 drivers/clk/clk-stm32mp1.c MGATE_MP1(_id, _name, _parent, _flags, _mgate) _id 1288 drivers/clk/clk-stm32mp1.c #define KCLK(_id, _name, _parents, _flags, _mgate, _mmux)\ _id 1289 drivers/clk/clk-stm32mp1.c COMPOSITE(_id, _name, _parents, CLK_OPS_PARENT_ENABLE |\ _id 1412 drivers/clk/clk-stm32mp1.c #define _K_GATE(_id, _gate_offset, _gate_bit_idx, _gate_flags,\ _id 1414 drivers/clk/clk-stm32mp1.c [_id] = {\ _id 1424 drivers/clk/clk-stm32mp1.c #define K_GATE(_id, _gate_offset, _gate_bit_idx, _gate_flags)\ _id 1425 drivers/clk/clk-stm32mp1.c _K_GATE(_id, _gate_offset, _gate_bit_idx, _gate_flags,\ _id 1428 drivers/clk/clk-stm32mp1.c #define K_MGATE(_id, _gate_offset, _gate_bit_idx, _gate_flags)\ _id 1429 drivers/clk/clk-stm32mp1.c _K_GATE(_id, _gate_offset, _gate_bit_idx, _gate_flags,\ _id 1430 drivers/clk/clk-stm32mp1.c &mp1_mgate[_id], &mp1_mgate_clk_ops) _id 1597 drivers/clk/clk-stm32mp1.c #define _K_MUX(_id, _offset, _shift, _width, _mux_flags, _mmux, _ops)\ _id 1598 drivers/clk/clk-stm32mp1.c [_id] = {\ _id 1610 drivers/clk/clk-stm32mp1.c #define K_MUX(_id, _offset, _shift, _width, _mux_flags)\ _id 1611 drivers/clk/clk-stm32mp1.c _K_MUX(_id, _offset, _shift, _width, _mux_flags,\ _id 1614 drivers/clk/clk-stm32mp1.c #define K_MMUX(_id, _offset, _shift, _width, _mux_flags)\ _id 1615 drivers/clk/clk-stm32mp1.c _K_MUX(_id, _offset, _shift, _width, _mux_flags,\ _id 1616 drivers/clk/clk-stm32mp1.c &ker_mux[_id], &clk_mmux_ops) _id 27 drivers/clk/hisilicon/clk-hi3660-stub.c #define DEFINE_CLK_STUB(_id, _cmd, _name) \ _id 29 drivers/clk/hisilicon/clk-hi3660-stub.c .id = (_id), \ _id 46 drivers/clk/mediatek/clk-gate.h #define GATE_MTK_FLAGS(_id, _name, _parent, _regs, _shift, \ _id 48 drivers/clk/mediatek/clk-gate.h .id = _id, \ _id 57 drivers/clk/mediatek/clk-gate.h #define GATE_MTK(_id, _name, _parent, _regs, _shift, _ops) \ _id 58 drivers/clk/mediatek/clk-gate.h GATE_MTK_FLAGS(_id, _name, _parent, _regs, _shift, _ops, 0) _id 18 drivers/clk/mediatek/clk-mt2701-aud.c #define GATE_AUDIO0(_id, _name, _parent, _shift) { \ _id 19 drivers/clk/mediatek/clk-mt2701-aud.c .id = _id, \ _id 27 drivers/clk/mediatek/clk-mt2701-aud.c #define GATE_AUDIO1(_id, _name, _parent, _shift) { \ _id 28 drivers/clk/mediatek/clk-mt2701-aud.c .id = _id, \ _id 36 drivers/clk/mediatek/clk-mt2701-aud.c #define GATE_AUDIO2(_id, _name, _parent, _shift) { \ _id 37 drivers/clk/mediatek/clk-mt2701-aud.c .id = _id, \ _id 45 drivers/clk/mediatek/clk-mt2701-aud.c #define GATE_AUDIO3(_id, _name, _parent, _shift) { \ _id 46 drivers/clk/mediatek/clk-mt2701-aud.c .id = _id, \ _id 27 drivers/clk/mediatek/clk-mt2701-bdp.c #define GATE_BDP0(_id, _name, _parent, _shift) { \ _id 28 drivers/clk/mediatek/clk-mt2701-bdp.c .id = _id, \ _id 36 drivers/clk/mediatek/clk-mt2701-bdp.c #define GATE_BDP1(_id, _name, _parent, _shift) { \ _id 37 drivers/clk/mediatek/clk-mt2701-bdp.c .id = _id, \ _id 19 drivers/clk/mediatek/clk-mt2701-eth.c #define GATE_ETH(_id, _name, _parent, _shift) { \ _id 20 drivers/clk/mediatek/clk-mt2701-eth.c .id = _id, \ _id 19 drivers/clk/mediatek/clk-mt2701-g3d.c #define GATE_G3D(_id, _name, _parent, _shift) { \ _id 20 drivers/clk/mediatek/clk-mt2701-g3d.c .id = _id, \ _id 19 drivers/clk/mediatek/clk-mt2701-hif.c #define GATE_HIF(_id, _name, _parent, _shift) { \ _id 20 drivers/clk/mediatek/clk-mt2701-hif.c .id = _id, \ _id 21 drivers/clk/mediatek/clk-mt2701-img.c #define GATE_IMG(_id, _name, _parent, _shift) { \ _id 22 drivers/clk/mediatek/clk-mt2701-img.c .id = _id, \ _id 27 drivers/clk/mediatek/clk-mt2701-mm.c #define GATE_DISP0(_id, _name, _parent, _shift) { \ _id 28 drivers/clk/mediatek/clk-mt2701-mm.c .id = _id, \ _id 36 drivers/clk/mediatek/clk-mt2701-mm.c #define GATE_DISP1(_id, _name, _parent, _shift) { \ _id 37 drivers/clk/mediatek/clk-mt2701-mm.c .id = _id, \ _id 27 drivers/clk/mediatek/clk-mt2701-vdec.c #define GATE_VDEC0(_id, _name, _parent, _shift) { \ _id 28 drivers/clk/mediatek/clk-mt2701-vdec.c .id = _id, \ _id 36 drivers/clk/mediatek/clk-mt2701-vdec.c #define GATE_VDEC1(_id, _name, _parent, _shift) { \ _id 37 drivers/clk/mediatek/clk-mt2701-vdec.c .id = _id, \ _id 638 drivers/clk/mediatek/clk-mt2701.c #define GATE_TOP_AUD(_id, _name, _parent, _shift) { \ _id 639 drivers/clk/mediatek/clk-mt2701.c .id = _id, \ _id 703 drivers/clk/mediatek/clk-mt2701.c #define GATE_ICG(_id, _name, _parent, _shift) { \ _id 704 drivers/clk/mediatek/clk-mt2701.c .id = _id, \ _id 804 drivers/clk/mediatek/clk-mt2701.c #define GATE_PERI0(_id, _name, _parent, _shift) { \ _id 805 drivers/clk/mediatek/clk-mt2701.c .id = _id, \ _id 813 drivers/clk/mediatek/clk-mt2701.c #define GATE_PERI1(_id, _name, _parent, _shift) { \ _id 814 drivers/clk/mediatek/clk-mt2701.c .id = _id, \ _id 918 drivers/clk/mediatek/clk-mt2701.c #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, _pd_reg, \ _id 920 drivers/clk/mediatek/clk-mt2701.c .id = _id, \ _id 21 drivers/clk/mediatek/clk-mt2712-bdp.c #define GATE_BDP(_id, _name, _parent, _shift) { \ _id 22 drivers/clk/mediatek/clk-mt2712-bdp.c .id = _id, \ _id 21 drivers/clk/mediatek/clk-mt2712-img.c #define GATE_IMG(_id, _name, _parent, _shift) { \ _id 22 drivers/clk/mediatek/clk-mt2712-img.c .id = _id, \ _id 21 drivers/clk/mediatek/clk-mt2712-jpgdec.c #define GATE_JPGDEC(_id, _name, _parent, _shift) { \ _id 22 drivers/clk/mediatek/clk-mt2712-jpgdec.c .id = _id, \ _id 21 drivers/clk/mediatek/clk-mt2712-mfg.c #define GATE_MFG(_id, _name, _parent, _shift) { \ _id 22 drivers/clk/mediatek/clk-mt2712-mfg.c .id = _id, \ _id 33 drivers/clk/mediatek/clk-mt2712-mm.c #define GATE_MM0(_id, _name, _parent, _shift) { \ _id 34 drivers/clk/mediatek/clk-mt2712-mm.c .id = _id, \ _id 42 drivers/clk/mediatek/clk-mt2712-mm.c #define GATE_MM1(_id, _name, _parent, _shift) { \ _id 43 drivers/clk/mediatek/clk-mt2712-mm.c .id = _id, \ _id 51 drivers/clk/mediatek/clk-mt2712-mm.c #define GATE_MM2(_id, _name, _parent, _shift) { \ _id 52 drivers/clk/mediatek/clk-mt2712-mm.c .id = _id, \ _id 27 drivers/clk/mediatek/clk-mt2712-vdec.c #define GATE_VDEC0(_id, _name, _parent, _shift) { \ _id 28 drivers/clk/mediatek/clk-mt2712-vdec.c .id = _id, \ _id 36 drivers/clk/mediatek/clk-mt2712-vdec.c #define GATE_VDEC1(_id, _name, _parent, _shift) { \ _id 37 drivers/clk/mediatek/clk-mt2712-vdec.c .id = _id, \ _id 21 drivers/clk/mediatek/clk-mt2712-venc.c #define GATE_VENC(_id, _name, _parent, _shift) { \ _id 22 drivers/clk/mediatek/clk-mt2712-venc.c .id = _id, \ _id 960 drivers/clk/mediatek/clk-mt2712.c #define GATE_TOP0(_id, _name, _parent, _shift) { \ _id 961 drivers/clk/mediatek/clk-mt2712.c .id = _id, \ _id 969 drivers/clk/mediatek/clk-mt2712.c #define GATE_TOP1(_id, _name, _parent, _shift) { \ _id 970 drivers/clk/mediatek/clk-mt2712.c .id = _id, \ _id 1000 drivers/clk/mediatek/clk-mt2712.c #define GATE_INFRA(_id, _name, _parent, _shift) { \ _id 1001 drivers/clk/mediatek/clk-mt2712.c .id = _id, \ _id 1037 drivers/clk/mediatek/clk-mt2712.c #define GATE_PERI0(_id, _name, _parent, _shift) { \ _id 1038 drivers/clk/mediatek/clk-mt2712.c .id = _id, \ _id 1046 drivers/clk/mediatek/clk-mt2712.c #define GATE_PERI1(_id, _name, _parent, _shift) { \ _id 1047 drivers/clk/mediatek/clk-mt2712.c .id = _id, \ _id 1055 drivers/clk/mediatek/clk-mt2712.c #define GATE_PERI2(_id, _name, _parent, _shift) { \ _id 1056 drivers/clk/mediatek/clk-mt2712.c .id = _id, \ _id 1166 drivers/clk/mediatek/clk-mt2712.c #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ _id 1170 drivers/clk/mediatek/clk-mt2712.c .id = _id, \ _id 1189 drivers/clk/mediatek/clk-mt2712.c #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ _id 1192 drivers/clk/mediatek/clk-mt2712.c PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ _id 30 drivers/clk/mediatek/clk-mt6779-aud.c #define GATE_AUDIO0(_id, _name, _parent, _shift) \ _id 31 drivers/clk/mediatek/clk-mt6779-aud.c GATE_MTK(_id, _name, _parent, &audio0_cg_regs, _shift, \ _id 33 drivers/clk/mediatek/clk-mt6779-aud.c #define GATE_AUDIO1(_id, _name, _parent, _shift) \ _id 34 drivers/clk/mediatek/clk-mt6779-aud.c GATE_MTK(_id, _name, _parent, &audio1_cg_regs, _shift, \ _id 20 drivers/clk/mediatek/clk-mt6779-cam.c #define GATE_CAM(_id, _name, _parent, _shift) \ _id 21 drivers/clk/mediatek/clk-mt6779-cam.c GATE_MTK(_id, _name, _parent, &cam_cg_regs, _shift, \ _id 20 drivers/clk/mediatek/clk-mt6779-img.c #define GATE_IMG(_id, _name, _parent, _shift) \ _id 21 drivers/clk/mediatek/clk-mt6779-img.c GATE_MTK(_id, _name, _parent, &img_cg_regs, _shift, \ _id 20 drivers/clk/mediatek/clk-mt6779-ipe.c #define GATE_IPE(_id, _name, _parent, _shift) \ _id 21 drivers/clk/mediatek/clk-mt6779-ipe.c GATE_MTK(_id, _name, _parent, &ipe_cg_regs, _shift, \ _id 21 drivers/clk/mediatek/clk-mt6779-mfg.c #define GATE_MFG(_id, _name, _parent, _shift) \ _id 22 drivers/clk/mediatek/clk-mt6779-mfg.c GATE_MTK(_id, _name, _parent, &mfg_cg_regs, _shift, \ _id 26 drivers/clk/mediatek/clk-mt6779-mm.c #define GATE_MM0(_id, _name, _parent, _shift) \ _id 27 drivers/clk/mediatek/clk-mt6779-mm.c GATE_MTK(_id, _name, _parent, &mm0_cg_regs, _shift, \ _id 29 drivers/clk/mediatek/clk-mt6779-mm.c #define GATE_MM1(_id, _name, _parent, _shift) \ _id 30 drivers/clk/mediatek/clk-mt6779-mm.c GATE_MTK(_id, _name, _parent, &mm1_cg_regs, _shift, \ _id 27 drivers/clk/mediatek/clk-mt6779-vdec.c #define GATE_VDEC0_I(_id, _name, _parent, _shift) \ _id 28 drivers/clk/mediatek/clk-mt6779-vdec.c GATE_MTK(_id, _name, _parent, &vdec0_cg_regs, _shift, \ _id 30 drivers/clk/mediatek/clk-mt6779-vdec.c #define GATE_VDEC1_I(_id, _name, _parent, _shift) \ _id 31 drivers/clk/mediatek/clk-mt6779-vdec.c GATE_MTK(_id, _name, _parent, &vdec1_cg_regs, _shift, \ _id 21 drivers/clk/mediatek/clk-mt6779-venc.c #define GATE_VENC_I(_id, _name, _parent, _shift) \ _id 22 drivers/clk/mediatek/clk-mt6779-venc.c GATE_MTK(_id, _name, _parent, &venc_cg_regs, _shift, \ _id 867 drivers/clk/mediatek/clk-mt6779.c #define GATE_INFRA0(_id, _name, _parent, _shift) \ _id 868 drivers/clk/mediatek/clk-mt6779.c GATE_MTK(_id, _name, _parent, &infra0_cg_regs, _shift, \ _id 870 drivers/clk/mediatek/clk-mt6779.c #define GATE_INFRA1(_id, _name, _parent, _shift) \ _id 871 drivers/clk/mediatek/clk-mt6779.c GATE_MTK(_id, _name, _parent, &infra1_cg_regs, _shift, \ _id 873 drivers/clk/mediatek/clk-mt6779.c #define GATE_INFRA2(_id, _name, _parent, _shift) \ _id 874 drivers/clk/mediatek/clk-mt6779.c GATE_MTK(_id, _name, _parent, &infra2_cg_regs, _shift, \ _id 876 drivers/clk/mediatek/clk-mt6779.c #define GATE_INFRA3(_id, _name, _parent, _shift) \ _id 877 drivers/clk/mediatek/clk-mt6779.c GATE_MTK(_id, _name, _parent, &infra3_cg_regs, _shift, \ _id 1103 drivers/clk/mediatek/clk-mt6779.c #define GATE_APMIXED_FLAGS(_id, _name, _parent, _shift, _flags) \ _id 1104 drivers/clk/mediatek/clk-mt6779.c GATE_MTK_FLAGS(_id, _name, _parent, &apmixed_cg_regs, \ _id 1107 drivers/clk/mediatek/clk-mt6779.c #define GATE_APMIXED(_id, _name, _parent, _shift) \ _id 1108 drivers/clk/mediatek/clk-mt6779.c GATE_APMIXED_FLAGS(_id, _name, _parent, _shift, 0) _id 1142 drivers/clk/mediatek/clk-mt6779.c #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ _id 1147 drivers/clk/mediatek/clk-mt6779.c .id = _id, \ _id 1169 drivers/clk/mediatek/clk-mt6779.c #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ _id 1174 drivers/clk/mediatek/clk-mt6779.c PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ _id 19 drivers/clk/mediatek/clk-mt6797-img.c #define GATE_IMG(_id, _name, _parent, _shift) { \ _id 20 drivers/clk/mediatek/clk-mt6797-img.c .id = _id, \ _id 26 drivers/clk/mediatek/clk-mt6797-mm.c #define GATE_MM0(_id, _name, _parent, _shift) { \ _id 27 drivers/clk/mediatek/clk-mt6797-mm.c .id = _id, \ _id 35 drivers/clk/mediatek/clk-mt6797-mm.c #define GATE_MM1(_id, _name, _parent, _shift) { \ _id 36 drivers/clk/mediatek/clk-mt6797-mm.c .id = _id, \ _id 27 drivers/clk/mediatek/clk-mt6797-vdec.c #define GATE_VDEC0(_id, _name, _parent, _shift) { \ _id 28 drivers/clk/mediatek/clk-mt6797-vdec.c .id = _id, \ _id 36 drivers/clk/mediatek/clk-mt6797-vdec.c #define GATE_VDEC1(_id, _name, _parent, _shift) { \ _id 37 drivers/clk/mediatek/clk-mt6797-vdec.c .id = _id, \ _id 21 drivers/clk/mediatek/clk-mt6797-venc.c #define GATE_VENC(_id, _name, _parent, _shift) { \ _id 22 drivers/clk/mediatek/clk-mt6797-venc.c .id = _id, \ _id 423 drivers/clk/mediatek/clk-mt6797.c #define GATE_ICG0(_id, _name, _parent, _shift) { \ _id 424 drivers/clk/mediatek/clk-mt6797.c .id = _id, \ _id 432 drivers/clk/mediatek/clk-mt6797.c #define GATE_ICG1(_id, _name, _parent, _shift) \ _id 433 drivers/clk/mediatek/clk-mt6797.c GATE_ICG1_FLAGS(_id, _name, _parent, _shift, 0) _id 435 drivers/clk/mediatek/clk-mt6797.c #define GATE_ICG1_FLAGS(_id, _name, _parent, _shift, _flags) { \ _id 436 drivers/clk/mediatek/clk-mt6797.c .id = _id, \ _id 445 drivers/clk/mediatek/clk-mt6797.c #define GATE_ICG2(_id, _name, _parent, _shift) \ _id 446 drivers/clk/mediatek/clk-mt6797.c GATE_ICG2_FLAGS(_id, _name, _parent, _shift, 0) _id 448 drivers/clk/mediatek/clk-mt6797.c #define GATE_ICG2_FLAGS(_id, _name, _parent, _shift, _flags) { \ _id 449 drivers/clk/mediatek/clk-mt6797.c .id = _id, \ _id 614 drivers/clk/mediatek/clk-mt6797.c #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ _id 617 drivers/clk/mediatek/clk-mt6797.c .id = _id, \ _id 634 drivers/clk/mediatek/clk-mt6797.c #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ _id 637 drivers/clk/mediatek/clk-mt6797.c PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ _id 19 drivers/clk/mediatek/clk-mt7622-aud.c #define GATE_AUDIO0(_id, _name, _parent, _shift) { \ _id 20 drivers/clk/mediatek/clk-mt7622-aud.c .id = _id, \ _id 28 drivers/clk/mediatek/clk-mt7622-aud.c #define GATE_AUDIO1(_id, _name, _parent, _shift) { \ _id 29 drivers/clk/mediatek/clk-mt7622-aud.c .id = _id, \ _id 37 drivers/clk/mediatek/clk-mt7622-aud.c #define GATE_AUDIO2(_id, _name, _parent, _shift) { \ _id 38 drivers/clk/mediatek/clk-mt7622-aud.c .id = _id, \ _id 46 drivers/clk/mediatek/clk-mt7622-aud.c #define GATE_AUDIO3(_id, _name, _parent, _shift) { \ _id 47 drivers/clk/mediatek/clk-mt7622-aud.c .id = _id, \ _id 19 drivers/clk/mediatek/clk-mt7622-eth.c #define GATE_ETH(_id, _name, _parent, _shift) { \ _id 20 drivers/clk/mediatek/clk-mt7622-eth.c .id = _id, \ _id 48 drivers/clk/mediatek/clk-mt7622-eth.c #define GATE_SGMII(_id, _name, _parent, _shift) { \ _id 49 drivers/clk/mediatek/clk-mt7622-eth.c .id = _id, \ _id 19 drivers/clk/mediatek/clk-mt7622-hif.c #define GATE_PCIE(_id, _name, _parent, _shift) { \ _id 20 drivers/clk/mediatek/clk-mt7622-hif.c .id = _id, \ _id 28 drivers/clk/mediatek/clk-mt7622-hif.c #define GATE_SSUSB(_id, _name, _parent, _shift) { \ _id 29 drivers/clk/mediatek/clk-mt7622-hif.c .id = _id, \ _id 24 drivers/clk/mediatek/clk-mt7622.c #define PLL_xtal(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits,\ _id 27 drivers/clk/mediatek/clk-mt7622.c .id = _id, \ _id 45 drivers/clk/mediatek/clk-mt7622.c #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ _id 48 drivers/clk/mediatek/clk-mt7622.c PLL_xtal(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits,\ _id 52 drivers/clk/mediatek/clk-mt7622.c #define GATE_APMIXED(_id, _name, _parent, _shift) { \ _id 53 drivers/clk/mediatek/clk-mt7622.c .id = _id, \ _id 61 drivers/clk/mediatek/clk-mt7622.c #define GATE_INFRA(_id, _name, _parent, _shift) { \ _id 62 drivers/clk/mediatek/clk-mt7622.c .id = _id, \ _id 70 drivers/clk/mediatek/clk-mt7622.c #define GATE_TOP0(_id, _name, _parent, _shift) { \ _id 71 drivers/clk/mediatek/clk-mt7622.c .id = _id, \ _id 79 drivers/clk/mediatek/clk-mt7622.c #define GATE_TOP1(_id, _name, _parent, _shift) { \ _id 80 drivers/clk/mediatek/clk-mt7622.c .id = _id, \ _id 88 drivers/clk/mediatek/clk-mt7622.c #define GATE_PERI0(_id, _name, _parent, _shift) { \ _id 89 drivers/clk/mediatek/clk-mt7622.c .id = _id, \ _id 97 drivers/clk/mediatek/clk-mt7622.c #define GATE_PERI1(_id, _name, _parent, _shift) { \ _id 98 drivers/clk/mediatek/clk-mt7622.c .id = _id, \ _id 19 drivers/clk/mediatek/clk-mt7629-eth.c #define GATE_ETH(_id, _name, _parent, _shift) { \ _id 20 drivers/clk/mediatek/clk-mt7629-eth.c .id = _id, \ _id 48 drivers/clk/mediatek/clk-mt7629-eth.c #define GATE_SGMII(_id, _name, _parent, _shift) { \ _id 49 drivers/clk/mediatek/clk-mt7629-eth.c .id = _id, \ _id 19 drivers/clk/mediatek/clk-mt7629-hif.c #define GATE_PCIE(_id, _name, _parent, _shift) { \ _id 20 drivers/clk/mediatek/clk-mt7629-hif.c .id = _id, \ _id 28 drivers/clk/mediatek/clk-mt7629-hif.c #define GATE_SSUSB(_id, _name, _parent, _shift) { \ _id 29 drivers/clk/mediatek/clk-mt7629-hif.c .id = _id, \ _id 24 drivers/clk/mediatek/clk-mt7629.c #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ _id 27 drivers/clk/mediatek/clk-mt7629.c .id = _id, \ _id 45 drivers/clk/mediatek/clk-mt7629.c #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ _id 48 drivers/clk/mediatek/clk-mt7629.c PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ _id 52 drivers/clk/mediatek/clk-mt7629.c #define GATE_APMIXED(_id, _name, _parent, _shift) { \ _id 53 drivers/clk/mediatek/clk-mt7629.c .id = _id, \ _id 61 drivers/clk/mediatek/clk-mt7629.c #define GATE_INFRA(_id, _name, _parent, _shift) { \ _id 62 drivers/clk/mediatek/clk-mt7629.c .id = _id, \ _id 70 drivers/clk/mediatek/clk-mt7629.c #define GATE_PERI0(_id, _name, _parent, _shift) { \ _id 71 drivers/clk/mediatek/clk-mt7629.c .id = _id, \ _id 79 drivers/clk/mediatek/clk-mt7629.c #define GATE_PERI1(_id, _name, _parent, _shift) { \ _id 80 drivers/clk/mediatek/clk-mt7629.c .id = _id, \ _id 403 drivers/clk/mediatek/clk-mt8135.c #define GATE_ICG(_id, _name, _parent, _shift) { \ _id 404 drivers/clk/mediatek/clk-mt8135.c .id = _id, \ _id 440 drivers/clk/mediatek/clk-mt8135.c #define GATE_PERI0(_id, _name, _parent, _shift) { \ _id 441 drivers/clk/mediatek/clk-mt8135.c .id = _id, \ _id 449 drivers/clk/mediatek/clk-mt8135.c #define GATE_PERI1(_id, _name, _parent, _shift) { \ _id 450 drivers/clk/mediatek/clk-mt8135.c .id = _id, \ _id 596 drivers/clk/mediatek/clk-mt8135.c #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, _pd_reg, _pd_shift, _tuner_reg, _pcw_reg, _pcw_shift) { \ _id 597 drivers/clk/mediatek/clk-mt8135.c .id = _id, \ _id 622 drivers/clk/mediatek/clk-mt8173.c #define GATE_ICG(_id, _name, _parent, _shift) { \ _id 623 drivers/clk/mediatek/clk-mt8173.c .id = _id, \ _id 661 drivers/clk/mediatek/clk-mt8173.c #define GATE_PERI0(_id, _name, _parent, _shift) { \ _id 662 drivers/clk/mediatek/clk-mt8173.c .id = _id, \ _id 670 drivers/clk/mediatek/clk-mt8173.c #define GATE_PERI1(_id, _name, _parent, _shift) { \ _id 671 drivers/clk/mediatek/clk-mt8173.c .id = _id, \ _id 737 drivers/clk/mediatek/clk-mt8173.c #define GATE_IMG(_id, _name, _parent, _shift) { \ _id 738 drivers/clk/mediatek/clk-mt8173.c .id = _id, \ _id 768 drivers/clk/mediatek/clk-mt8173.c #define GATE_MM0(_id, _name, _parent, _shift) { \ _id 769 drivers/clk/mediatek/clk-mt8173.c .id = _id, \ _id 777 drivers/clk/mediatek/clk-mt8173.c #define GATE_MM1(_id, _name, _parent, _shift) { \ _id 778 drivers/clk/mediatek/clk-mt8173.c .id = _id, \ _id 855 drivers/clk/mediatek/clk-mt8173.c #define GATE_VDEC0(_id, _name, _parent, _shift) { \ _id 856 drivers/clk/mediatek/clk-mt8173.c .id = _id, \ _id 864 drivers/clk/mediatek/clk-mt8173.c #define GATE_VDEC1(_id, _name, _parent, _shift) { \ _id 865 drivers/clk/mediatek/clk-mt8173.c .id = _id, \ _id 878 drivers/clk/mediatek/clk-mt8173.c #define GATE_VENC(_id, _name, _parent, _shift) { \ _id 879 drivers/clk/mediatek/clk-mt8173.c .id = _id, \ _id 894 drivers/clk/mediatek/clk-mt8173.c #define GATE_VENCLT(_id, _name, _parent, _shift) { \ _id 895 drivers/clk/mediatek/clk-mt8173.c .id = _id, \ _id 1010 drivers/clk/mediatek/clk-mt8173.c #define APMIXED_USB(_id, _name, _parent, _reg_ofs) { \ _id 1011 drivers/clk/mediatek/clk-mt8173.c .id = _id, \ _id 1025 drivers/clk/mediatek/clk-mt8173.c #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ _id 1028 drivers/clk/mediatek/clk-mt8173.c .id = _id, \ _id 1045 drivers/clk/mediatek/clk-mt8173.c #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ _id 1048 drivers/clk/mediatek/clk-mt8173.c PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ _id 27 drivers/clk/mediatek/clk-mt8183-audio.c #define GATE_AUDIO0(_id, _name, _parent, _shift) \ _id 28 drivers/clk/mediatek/clk-mt8183-audio.c GATE_MTK(_id, _name, _parent, &audio0_cg_regs, _shift, \ _id 31 drivers/clk/mediatek/clk-mt8183-audio.c #define GATE_AUDIO1(_id, _name, _parent, _shift) \ _id 32 drivers/clk/mediatek/clk-mt8183-audio.c GATE_MTK(_id, _name, _parent, &audio1_cg_regs, _shift, \ _id 20 drivers/clk/mediatek/clk-mt8183-cam.c #define GATE_CAM(_id, _name, _parent, _shift) \ _id 21 drivers/clk/mediatek/clk-mt8183-cam.c GATE_MTK(_id, _name, _parent, &cam_cg_regs, _shift, \ _id 20 drivers/clk/mediatek/clk-mt8183-img.c #define GATE_IMG(_id, _name, _parent, _shift) \ _id 21 drivers/clk/mediatek/clk-mt8183-img.c GATE_MTK(_id, _name, _parent, &img_cg_regs, _shift, \ _id 20 drivers/clk/mediatek/clk-mt8183-ipu0.c #define GATE_IPU_CORE0(_id, _name, _parent, _shift) \ _id 21 drivers/clk/mediatek/clk-mt8183-ipu0.c GATE_MTK(_id, _name, _parent, &ipu_core0_cg_regs, _shift, \ _id 20 drivers/clk/mediatek/clk-mt8183-ipu1.c #define GATE_IPU_CORE1(_id, _name, _parent, _shift) \ _id 21 drivers/clk/mediatek/clk-mt8183-ipu1.c GATE_MTK(_id, _name, _parent, &ipu_core1_cg_regs, _shift, \ _id 20 drivers/clk/mediatek/clk-mt8183-ipu_adl.c #define GATE_IPU_ADL_I(_id, _name, _parent, _shift) \ _id 21 drivers/clk/mediatek/clk-mt8183-ipu_adl.c GATE_MTK(_id, _name, _parent, &ipu_adl_cg_regs, _shift, \ _id 44 drivers/clk/mediatek/clk-mt8183-ipu_conn.c #define GATE_IPU_CONN(_id, _name, _parent, _shift) \ _id 45 drivers/clk/mediatek/clk-mt8183-ipu_conn.c GATE_MTK(_id, _name, _parent, &ipu_conn_cg_regs, _shift, \ _id 48 drivers/clk/mediatek/clk-mt8183-ipu_conn.c #define GATE_IPU_CONN_APB(_id, _name, _parent, _shift) \ _id 49 drivers/clk/mediatek/clk-mt8183-ipu_conn.c GATE_MTK(_id, _name, _parent, &ipu_conn_apb_cg_regs, _shift, \ _id 52 drivers/clk/mediatek/clk-mt8183-ipu_conn.c #define GATE_IPU_CONN_AXI_I(_id, _name, _parent, _shift) \ _id 53 drivers/clk/mediatek/clk-mt8183-ipu_conn.c GATE_MTK(_id, _name, _parent, &ipu_conn_axi_cg_regs, _shift, \ _id 56 drivers/clk/mediatek/clk-mt8183-ipu_conn.c #define GATE_IPU_CONN_AXI1_I(_id, _name, _parent, _shift) \ _id 57 drivers/clk/mediatek/clk-mt8183-ipu_conn.c GATE_MTK(_id, _name, _parent, &ipu_conn_axi1_cg_regs, _shift, \ _id 60 drivers/clk/mediatek/clk-mt8183-ipu_conn.c #define GATE_IPU_CONN_AXI2_I(_id, _name, _parent, _shift) \ _id 61 drivers/clk/mediatek/clk-mt8183-ipu_conn.c GATE_MTK(_id, _name, _parent, &ipu_conn_axi2_cg_regs, _shift, \ _id 21 drivers/clk/mediatek/clk-mt8183-mfgcfg.c #define GATE_MFG(_id, _name, _parent, _shift) \ _id 22 drivers/clk/mediatek/clk-mt8183-mfgcfg.c GATE_MTK(_id, _name, _parent, &mfg_cg_regs, _shift, \ _id 26 drivers/clk/mediatek/clk-mt8183-mm.c #define GATE_MM0(_id, _name, _parent, _shift) \ _id 27 drivers/clk/mediatek/clk-mt8183-mm.c GATE_MTK(_id, _name, _parent, &mm0_cg_regs, _shift, \ _id 30 drivers/clk/mediatek/clk-mt8183-mm.c #define GATE_MM1(_id, _name, _parent, _shift) \ _id 31 drivers/clk/mediatek/clk-mt8183-mm.c GATE_MTK(_id, _name, _parent, &mm1_cg_regs, _shift, \ _id 26 drivers/clk/mediatek/clk-mt8183-vdec.c #define GATE_VDEC0_I(_id, _name, _parent, _shift) \ _id 27 drivers/clk/mediatek/clk-mt8183-vdec.c GATE_MTK(_id, _name, _parent, &vdec0_cg_regs, _shift, \ _id 30 drivers/clk/mediatek/clk-mt8183-vdec.c #define GATE_VDEC1_I(_id, _name, _parent, _shift) \ _id 31 drivers/clk/mediatek/clk-mt8183-vdec.c GATE_MTK(_id, _name, _parent, &vdec1_cg_regs, _shift, \ _id 20 drivers/clk/mediatek/clk-mt8183-venc.c #define GATE_VENC_I(_id, _name, _parent, _shift) \ _id 21 drivers/clk/mediatek/clk-mt8183-venc.c GATE_MTK(_id, _name, _parent, &venc_cg_regs, _shift, \ _id 756 drivers/clk/mediatek/clk-mt8183.c #define GATE_TOP(_id, _name, _parent, _shift) \ _id 757 drivers/clk/mediatek/clk-mt8183.c GATE_MTK(_id, _name, _parent, &top_cg_regs, _shift, \ _id 790 drivers/clk/mediatek/clk-mt8183.c #define GATE_INFRA0(_id, _name, _parent, _shift) \ _id 791 drivers/clk/mediatek/clk-mt8183.c GATE_MTK(_id, _name, _parent, &infra0_cg_regs, _shift, \ _id 794 drivers/clk/mediatek/clk-mt8183.c #define GATE_INFRA1(_id, _name, _parent, _shift) \ _id 795 drivers/clk/mediatek/clk-mt8183.c GATE_MTK(_id, _name, _parent, &infra1_cg_regs, _shift, \ _id 798 drivers/clk/mediatek/clk-mt8183.c #define GATE_INFRA2(_id, _name, _parent, _shift) \ _id 799 drivers/clk/mediatek/clk-mt8183.c GATE_MTK(_id, _name, _parent, &infra2_cg_regs, _shift, \ _id 802 drivers/clk/mediatek/clk-mt8183.c #define GATE_INFRA3(_id, _name, _parent, _shift) \ _id 803 drivers/clk/mediatek/clk-mt8183.c GATE_MTK(_id, _name, _parent, &infra3_cg_regs, _shift, \ _id 1013 drivers/clk/mediatek/clk-mt8183.c #define GATE_PERI(_id, _name, _parent, _shift) \ _id 1014 drivers/clk/mediatek/clk-mt8183.c GATE_MTK(_id, _name, _parent, &peri_cg_regs, _shift, \ _id 1027 drivers/clk/mediatek/clk-mt8183.c #define GATE_APMIXED_FLAGS(_id, _name, _parent, _shift, _flags) \ _id 1028 drivers/clk/mediatek/clk-mt8183.c GATE_MTK_FLAGS(_id, _name, _parent, &apmixed_cg_regs, \ _id 1031 drivers/clk/mediatek/clk-mt8183.c #define GATE_APMIXED(_id, _name, _parent, _shift) \ _id 1032 drivers/clk/mediatek/clk-mt8183.c GATE_APMIXED_FLAGS(_id, _name, _parent, _shift, 0) _id 1067 drivers/clk/mediatek/clk-mt8183.c #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ _id 1072 drivers/clk/mediatek/clk-mt8183.c .id = _id, \ _id 1094 drivers/clk/mediatek/clk-mt8183.c #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ _id 1099 drivers/clk/mediatek/clk-mt8183.c PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ _id 25 drivers/clk/mediatek/clk-mt8516-aud.c #define GATE_AUD(_id, _name, _parent, _shift) { \ _id 26 drivers/clk/mediatek/clk-mt8516-aud.c .id = _id, \ _id 467 drivers/clk/mediatek/clk-mt8516.c #define DIV_ADJ(_id, _name, _parent, _reg, _shift, _width) { \ _id 468 drivers/clk/mediatek/clk-mt8516.c .id = _id, \ _id 527 drivers/clk/mediatek/clk-mt8516.c #define GATE_TOP1(_id, _name, _parent, _shift) { \ _id 528 drivers/clk/mediatek/clk-mt8516.c .id = _id, \ _id 536 drivers/clk/mediatek/clk-mt8516.c #define GATE_TOP2(_id, _name, _parent, _shift) { \ _id 537 drivers/clk/mediatek/clk-mt8516.c .id = _id, \ _id 545 drivers/clk/mediatek/clk-mt8516.c #define GATE_TOP2_I(_id, _name, _parent, _shift) { \ _id 546 drivers/clk/mediatek/clk-mt8516.c .id = _id, \ _id 554 drivers/clk/mediatek/clk-mt8516.c #define GATE_TOP3(_id, _name, _parent, _shift) { \ _id 555 drivers/clk/mediatek/clk-mt8516.c .id = _id, \ _id 563 drivers/clk/mediatek/clk-mt8516.c #define GATE_TOP4_I(_id, _name, _parent, _shift) { \ _id 564 drivers/clk/mediatek/clk-mt8516.c .id = _id, \ _id 572 drivers/clk/mediatek/clk-mt8516.c #define GATE_TOP5(_id, _name, _parent, _shift) { \ _id 573 drivers/clk/mediatek/clk-mt8516.c .id = _id, \ _id 736 drivers/clk/mediatek/clk-mt8516.c #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ _id 739 drivers/clk/mediatek/clk-mt8516.c .id = _id, \ _id 756 drivers/clk/mediatek/clk-mt8516.c #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ _id 759 drivers/clk/mediatek/clk-mt8516.c PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ _id 29 drivers/clk/mediatek/clk-mtk.h #define FIXED_CLK(_id, _name, _parent, _rate) { \ _id 30 drivers/clk/mediatek/clk-mtk.h .id = _id, \ _id 47 drivers/clk/mediatek/clk-mtk.h #define FACTOR(_id, _name, _parent, _mult, _div) { \ _id 48 drivers/clk/mediatek/clk-mtk.h .id = _id, \ _id 81 drivers/clk/mediatek/clk-mtk.h #define MUX_GATE_FLAGS_2(_id, _name, _parents, _reg, _shift, \ _id 83 drivers/clk/mediatek/clk-mtk.h .id = _id, \ _id 101 drivers/clk/mediatek/clk-mtk.h #define MUX_GATE_FLAGS(_id, _name, _parents, _reg, _shift, _width, \ _id 103 drivers/clk/mediatek/clk-mtk.h MUX_GATE_FLAGS_2(_id, _name, _parents, _reg, \ _id 110 drivers/clk/mediatek/clk-mtk.h #define MUX_GATE(_id, _name, _parents, _reg, _shift, _width, _gate) \ _id 111 drivers/clk/mediatek/clk-mtk.h MUX_GATE_FLAGS(_id, _name, _parents, _reg, _shift, _width, \ _id 114 drivers/clk/mediatek/clk-mtk.h #define MUX(_id, _name, _parents, _reg, _shift, _width) \ _id 115 drivers/clk/mediatek/clk-mtk.h MUX_FLAGS(_id, _name, _parents, _reg, \ _id 118 drivers/clk/mediatek/clk-mtk.h #define MUX_FLAGS(_id, _name, _parents, _reg, _shift, _width, _flags) { \ _id 119 drivers/clk/mediatek/clk-mtk.h .id = _id, \ _id 131 drivers/clk/mediatek/clk-mtk.h #define DIV_GATE(_id, _name, _parent, _gate_reg, _gate_shift, _div_reg, \ _id 133 drivers/clk/mediatek/clk-mtk.h .id = _id, \ _id 190 drivers/clk/mediatek/clk-mtk.h #define DIV_ADJ(_id, _name, _parent, _reg, _shift, _width) { \ _id 191 drivers/clk/mediatek/clk-mtk.h .id = _id, \ _id 45 drivers/clk/mediatek/clk-mux.h #define GATE_CLR_SET_UPD_FLAGS(_id, _name, _parents, _mux_ofs, \ _id 48 drivers/clk/mediatek/clk-mux.h .id = _id, \ _id 64 drivers/clk/mediatek/clk-mux.h #define MUX_GATE_CLR_SET_UPD_FLAGS(_id, _name, _parents, _mux_ofs, \ _id 67 drivers/clk/mediatek/clk-mux.h GATE_CLR_SET_UPD_FLAGS(_id, _name, _parents, _mux_ofs, \ _id 72 drivers/clk/mediatek/clk-mux.h #define MUX_GATE_CLR_SET_UPD(_id, _name, _parents, _mux_ofs, \ _id 75 drivers/clk/mediatek/clk-mux.h MUX_GATE_CLR_SET_UPD_FLAGS(_id, _name, _parents, \ _id 172 drivers/clk/nxp/clk-lpc18xx-cgu.c #define LPC1XX_CGU_SRC_CLK_DIV(_id, _width, _table) \ _id 174 drivers/clk/nxp/clk-lpc18xx-cgu.c .clk_id = CLK_SRC_ ##_id, \ _id 206 drivers/clk/nxp/clk-lpc18xx-cgu.c #define LPC1XX_CGU_BASE_CLK(_id, _table, _flags) \ _id 208 drivers/clk/nxp/clk-lpc18xx-cgu.c .clk_id = BASE_ ##_id ##_CLK, \ _id 272 drivers/clk/nxp/clk-lpc18xx-cgu.c #define LPC1XX_CGU_CLK_PLL(_id, _table, _pll_ops) \ _id 274 drivers/clk/nxp/clk-lpc18xx-cgu.c .clk_id = CLK_SRC_ ##_id, \ _id 276 drivers/clk/nxp/clk-lpc18xx-cgu.c .reg_offset = LPC18XX_CGU_ ##_id ##_STAT, \ _id 19 drivers/clk/pistachio/clk.h #define GATE(_id, _name, _pname, _reg, _shift) \ _id 21 drivers/clk/pistachio/clk.h .id = _id, \ _id 39 drivers/clk/pistachio/clk.h #define MUX(_id, _name, _pnames, _reg, _shift) \ _id 41 drivers/clk/pistachio/clk.h .id = _id, \ _id 59 drivers/clk/pistachio/clk.h #define DIV(_id, _name, _pname, _reg, _width) \ _id 61 drivers/clk/pistachio/clk.h .id = _id, \ _id 69 drivers/clk/pistachio/clk.h #define DIV_F(_id, _name, _pname, _reg, _width, _div_flags) \ _id 71 drivers/clk/pistachio/clk.h .id = _id, \ _id 86 drivers/clk/pistachio/clk.h #define FIXED_FACTOR(_id, _name, _pname, _div) \ _id 88 drivers/clk/pistachio/clk.h .id = _id, \ _id 119 drivers/clk/pistachio/clk.h #define PLL(_id, _name, _pname, _type, _reg, _rates) \ _id 121 drivers/clk/pistachio/clk.h .id = _id, \ _id 130 drivers/clk/pistachio/clk.h #define PLL_FIXED(_id, _name, _pname, _type, _reg) \ _id 132 drivers/clk/pistachio/clk.h .id = _id, \ _id 34 drivers/clk/renesas/rcar-gen3-cpg.h #define DEF_GEN3_SD(_name, _id, _parent, _offset) \ _id 35 drivers/clk/renesas/rcar-gen3-cpg.h DEF_BASE(_name, _id, CLK_TYPE_GEN3_SD, _parent, .offset = _offset) _id 37 drivers/clk/renesas/rcar-gen3-cpg.h #define DEF_GEN3_MDSEL(_name, _id, _md, _parent0, _div0, _parent1, _div1) \ _id 38 drivers/clk/renesas/rcar-gen3-cpg.h DEF_BASE(_name, _id, CLK_TYPE_GEN3_MDSEL, \ _id 42 drivers/clk/renesas/rcar-gen3-cpg.h #define DEF_GEN3_PE(_name, _id, _parent_sscg, _div_sscg, _parent_clean, \ _id 44 drivers/clk/renesas/rcar-gen3-cpg.h DEF_GEN3_MDSEL(_name, _id, 12, _parent_sscg, _div_sscg, \ _id 47 drivers/clk/renesas/rcar-gen3-cpg.h #define DEF_GEN3_OSC(_name, _id, _parent, _div) \ _id 48 drivers/clk/renesas/rcar-gen3-cpg.h DEF_BASE(_name, _id, CLK_TYPE_GEN3_OSC, _parent, .div = _div) _id 50 drivers/clk/renesas/rcar-gen3-cpg.h #define DEF_GEN3_RCKSEL(_name, _id, _parent0, _div0, _parent1, _div1) \ _id 51 drivers/clk/renesas/rcar-gen3-cpg.h DEF_BASE(_name, _id, CLK_TYPE_GEN3_RCKSEL, \ _id 54 drivers/clk/renesas/rcar-gen3-cpg.h #define DEF_GEN3_Z(_name, _id, _type, _parent, _div, _offset) \ _id 55 drivers/clk/renesas/rcar-gen3-cpg.h DEF_BASE(_name, _id, _type, _parent, .div = _div, .offset = _offset) _id 44 drivers/clk/renesas/renesas-cpg-mssr.h #define DEF_TYPE(_name, _id, _type...) \ _id 45 drivers/clk/renesas/renesas-cpg-mssr.h { .name = _name, .id = _id, .type = _type } _id 46 drivers/clk/renesas/renesas-cpg-mssr.h #define DEF_BASE(_name, _id, _type, _parent...) \ _id 47 drivers/clk/renesas/renesas-cpg-mssr.h DEF_TYPE(_name, _id, _type, .parent = _parent) _id 49 drivers/clk/renesas/renesas-cpg-mssr.h #define DEF_INPUT(_name, _id) \ _id 50 drivers/clk/renesas/renesas-cpg-mssr.h DEF_TYPE(_name, _id, CLK_TYPE_IN) _id 51 drivers/clk/renesas/renesas-cpg-mssr.h #define DEF_FIXED(_name, _id, _parent, _div, _mult) \ _id 52 drivers/clk/renesas/renesas-cpg-mssr.h DEF_BASE(_name, _id, CLK_TYPE_FF, _parent, .div = _div, .mult = _mult) _id 53 drivers/clk/renesas/renesas-cpg-mssr.h #define DEF_DIV6P1(_name, _id, _parent, _offset) \ _id 54 drivers/clk/renesas/renesas-cpg-mssr.h DEF_BASE(_name, _id, CLK_TYPE_DIV6P1, _parent, .offset = _offset) _id 55 drivers/clk/renesas/renesas-cpg-mssr.h #define DEF_DIV6_RO(_name, _id, _parent, _offset, _div) \ _id 56 drivers/clk/renesas/renesas-cpg-mssr.h DEF_BASE(_name, _id, CLK_TYPE_DIV6_RO, _parent, .offset = _offset, .div = _div, .mult = 1) _id 57 drivers/clk/renesas/renesas-cpg-mssr.h #define DEF_RATE(_name, _id, _rate) \ _id 58 drivers/clk/renesas/renesas-cpg-mssr.h DEF_TYPE(_name, _id, CLK_TYPE_FR, .mult = _rate) _id 295 drivers/clk/rockchip/clk.h #define PLL(_type, _id, _name, _pnames, _flags, _con, _mode, _mshift, \ _id 298 drivers/clk/rockchip/clk.h .id = _id, \ _id 425 drivers/clk/rockchip/clk.h #define COMPOSITE(_id, cname, pnames, f, mo, ms, mw, mf, ds, dw,\ _id 428 drivers/clk/rockchip/clk.h .id = _id, \ _id 446 drivers/clk/rockchip/clk.h #define COMPOSITE_DIV_OFFSET(_id, cname, pnames, f, mo, ms, mw, \ _id 449 drivers/clk/rockchip/clk.h .id = _id, \ _id 468 drivers/clk/rockchip/clk.h #define COMPOSITE_NOMUX(_id, cname, pname, f, mo, ds, dw, df, \ _id 471 drivers/clk/rockchip/clk.h .id = _id, \ _id 486 drivers/clk/rockchip/clk.h #define COMPOSITE_NOMUX_DIVTBL(_id, cname, pname, f, mo, ds, dw,\ _id 489 drivers/clk/rockchip/clk.h .id = _id, \ _id 505 drivers/clk/rockchip/clk.h #define COMPOSITE_NODIV(_id, cname, pnames, f, mo, ms, mw, mf, \ _id 508 drivers/clk/rockchip/clk.h .id = _id, \ _id 523 drivers/clk/rockchip/clk.h #define COMPOSITE_NOGATE(_id, cname, pnames, f, mo, ms, mw, mf, \ _id 526 drivers/clk/rockchip/clk.h .id = _id, \ _id 542 drivers/clk/rockchip/clk.h #define COMPOSITE_NOGATE_DIVTBL(_id, cname, pnames, f, mo, ms, \ _id 545 drivers/clk/rockchip/clk.h .id = _id, \ _id 562 drivers/clk/rockchip/clk.h #define COMPOSITE_FRAC(_id, cname, pname, f, mo, df, go, gs, gf)\ _id 564 drivers/clk/rockchip/clk.h .id = _id, \ _id 579 drivers/clk/rockchip/clk.h #define COMPOSITE_FRACMUX(_id, cname, pname, f, mo, df, go, gs, gf, ch) \ _id 581 drivers/clk/rockchip/clk.h .id = _id, \ _id 597 drivers/clk/rockchip/clk.h #define COMPOSITE_FRACMUX_NOGATE(_id, cname, pname, f, mo, df, ch) \ _id 599 drivers/clk/rockchip/clk.h .id = _id, \ _id 613 drivers/clk/rockchip/clk.h #define COMPOSITE_DDRCLK(_id, cname, pnames, f, mo, ms, mw, \ _id 616 drivers/clk/rockchip/clk.h .id = _id, \ _id 631 drivers/clk/rockchip/clk.h #define MUX(_id, cname, pnames, f, o, s, w, mf) \ _id 633 drivers/clk/rockchip/clk.h .id = _id, \ _id 646 drivers/clk/rockchip/clk.h #define MUXGRF(_id, cname, pnames, f, o, s, w, mf) \ _id 648 drivers/clk/rockchip/clk.h .id = _id, \ _id 661 drivers/clk/rockchip/clk.h #define DIV(_id, cname, pname, f, o, s, w, df) \ _id 663 drivers/clk/rockchip/clk.h .id = _id, \ _id 676 drivers/clk/rockchip/clk.h #define DIVTBL(_id, cname, pname, f, o, s, w, df, dt) \ _id 678 drivers/clk/rockchip/clk.h .id = _id, \ _id 691 drivers/clk/rockchip/clk.h #define GATE(_id, cname, pname, f, o, b, gf) \ _id 693 drivers/clk/rockchip/clk.h .id = _id, \ _id 704 drivers/clk/rockchip/clk.h #define MMC(_id, cname, pname, offset, shift) \ _id 706 drivers/clk/rockchip/clk.h .id = _id, \ _id 715 drivers/clk/rockchip/clk.h #define INVERTER(_id, cname, pname, io, is, if) \ _id 717 drivers/clk/rockchip/clk.h .id = _id, \ _id 727 drivers/clk/rockchip/clk.h #define FACTOR(_id, cname, pname, f, fm, fd) \ _id 729 drivers/clk/rockchip/clk.h .id = _id, \ _id 739 drivers/clk/rockchip/clk.h #define FACTOR_GATE(_id, cname, pname, f, fm, fd, go, gb, gf) \ _id 741 drivers/clk/rockchip/clk.h .id = _id, \ _id 754 drivers/clk/rockchip/clk.h #define COMPOSITE_HALFDIV(_id, cname, pnames, f, mo, ms, mw, mf, ds, dw,\ _id 757 drivers/clk/rockchip/clk.h .id = _id, \ _id 775 drivers/clk/rockchip/clk.h #define COMPOSITE_NOGATE_HALFDIV(_id, cname, pnames, f, mo, ms, mw, mf, \ _id 778 drivers/clk/rockchip/clk.h .id = _id, \ _id 794 drivers/clk/rockchip/clk.h #define COMPOSITE_NOMUX_HALFDIV(_id, cname, pname, f, mo, ds, dw, df, \ _id 797 drivers/clk/rockchip/clk.h .id = _id, \ _id 812 drivers/clk/rockchip/clk.h #define DIV_HALF(_id, cname, pname, f, o, s, w, df) \ _id 814 drivers/clk/rockchip/clk.h .id = _id, \ _id 828 drivers/clk/rockchip/clk.h #define SGRF_GATE(_id, cname, pname) \ _id 829 drivers/clk/rockchip/clk.h FACTOR(_id, cname, pname, 0, 1, 1) _id 48 drivers/clk/samsung/clk-s3c64xx.c #define GATE_BUS(_id, cname, pname, o, b) \ _id 49 drivers/clk/samsung/clk-s3c64xx.c GATE(_id, cname, pname, o, b, 0, 0) _id 50 drivers/clk/samsung/clk-s3c64xx.c #define GATE_SCLK(_id, cname, pname, o, b) \ _id 51 drivers/clk/samsung/clk-s3c64xx.c GATE(_id, cname, pname, o, b, CLK_SET_RATE_PARENT, 0) _id 52 drivers/clk/samsung/clk-s3c64xx.c #define GATE_ON(_id, cname, pname, o, b) \ _id 53 drivers/clk/samsung/clk-s3c64xx.c GATE(_id, cname, pname, o, b, CLK_IGNORE_UNUSED, 0) _id 42 drivers/clk/samsung/clk.h #define ALIAS(_id, dname, a) \ _id 44 drivers/clk/samsung/clk.h .id = _id, \ _id 67 drivers/clk/samsung/clk.h #define FRATE(_id, cname, pname, f, frate) \ _id 69 drivers/clk/samsung/clk.h .id = _id, \ _id 94 drivers/clk/samsung/clk.h #define FFACTOR(_id, cname, pname, m, d, f) \ _id 96 drivers/clk/samsung/clk.h .id = _id, \ _id 128 drivers/clk/samsung/clk.h #define __MUX(_id, cname, pnames, o, s, w, f, mf) \ _id 130 drivers/clk/samsung/clk.h .id = _id, \ _id 141 drivers/clk/samsung/clk.h #define MUX(_id, cname, pnames, o, s, w) \ _id 142 drivers/clk/samsung/clk.h __MUX(_id, cname, pnames, o, s, w, 0, 0) _id 144 drivers/clk/samsung/clk.h #define MUX_F(_id, cname, pnames, o, s, w, f, mf) \ _id 145 drivers/clk/samsung/clk.h __MUX(_id, cname, pnames, o, s, w, f, mf) _id 169 drivers/clk/samsung/clk.h #define __DIV(_id, cname, pname, o, s, w, f, df, t) \ _id 171 drivers/clk/samsung/clk.h .id = _id, \ _id 182 drivers/clk/samsung/clk.h #define DIV(_id, cname, pname, o, s, w) \ _id 183 drivers/clk/samsung/clk.h __DIV(_id, cname, pname, o, s, w, 0, 0, NULL) _id 185 drivers/clk/samsung/clk.h #define DIV_F(_id, cname, pname, o, s, w, f, df) \ _id 186 drivers/clk/samsung/clk.h __DIV(_id, cname, pname, o, s, w, f, df, NULL) _id 188 drivers/clk/samsung/clk.h #define DIV_T(_id, cname, pname, o, s, w, t) \ _id 189 drivers/clk/samsung/clk.h __DIV(_id, cname, pname, o, s, w, 0, 0, t) _id 211 drivers/clk/samsung/clk.h #define __GATE(_id, cname, pname, o, b, f, gf) \ _id 213 drivers/clk/samsung/clk.h .id = _id, \ _id 222 drivers/clk/samsung/clk.h #define GATE(_id, cname, pname, o, b, f, gf) \ _id 223 drivers/clk/samsung/clk.h __GATE(_id, cname, pname, o, b, f, gf) _id 258 drivers/clk/samsung/clk.h #define __PLL(_typ, _id, _name, _pname, _flags, _lock, _con, _rtable) \ _id 260 drivers/clk/samsung/clk.h .id = _id, \ _id 270 drivers/clk/samsung/clk.h #define PLL(_typ, _id, _name, _pname, _lock, _con, _rtable) \ _id 271 drivers/clk/samsung/clk.h __PLL(_typ, _id, _name, _pname, CLK_GET_RATE_NOCACHE, _lock, \ _id 267 drivers/clk/tegra/clk-tegra-periph.c #define MUX_I2S_SPDIF(_id) \ _id 268 drivers/clk/tegra/clk-tegra-periph.c static const char *mux_pllaout0_##_id##_2x_pllp_clkm[] = { "pll_a_out0", \ _id 269 drivers/clk/tegra/clk-tegra-periph.c #_id, "pll_p",\ _id 850 drivers/clk/tegra/clk-tegra-periph.c #define PLL_OUT(_num, _offset, _div_shift, _div_flags, _rst_shift, _id) \ _id 859 drivers/clk/tegra/clk-tegra-periph.c .clk_id = tegra_clk_ ## _id,\ _id 60 drivers/clk/zte/clk.h #define GATE(_id, _name, _parent, _reg, _bit, _flag, _gflags) \ _id 72 drivers/clk/zte/clk.h .id = _id, \ _id 80 drivers/clk/zte/clk.h #define FFACTOR(_id, _name, _parent, _mult, _div, _flag) \ _id 90 drivers/clk/zte/clk.h .id = _id, \ _id 98 drivers/clk/zte/clk.h #define MUX_F(_id, _name, _parent, _reg, _shift, _width, _flag, _mflag) \ _id 111 drivers/clk/zte/clk.h .id = _id, \ _id 114 drivers/clk/zte/clk.h #define MUX(_id, _name, _parent, _reg, _shift, _width) \ _id 115 drivers/clk/zte/clk.h MUX_F(_id, _name, _parent, _reg, _shift, _width, 0, 0) _id 122 drivers/clk/zte/clk.h #define DIV_T(_id, _name, _parent, _reg, _shift, _width, _flag, _table) \ _id 136 drivers/clk/zte/clk.h .id = _id, \ _id 147 drivers/clk/zte/clk.h #define AUDIO_DIV(_id, _name, _parent, _reg) \ _id 155 drivers/clk/zte/clk.h .id = _id, \ _id 1286 drivers/counter/104-quad-8.c #define QUAD8_QUAD_SIGNAL(_id, _name) { \ _id 1287 drivers/counter/104-quad-8.c .id = (_id), \ _id 1291 drivers/counter/104-quad-8.c #define QUAD8_INDEX_SIGNAL(_id, _name) { \ _id 1292 drivers/counter/104-quad-8.c .id = (_id), \ _id 1325 drivers/counter/104-quad-8.c #define QUAD8_COUNT_SYNAPSES(_id) { \ _id 1329 drivers/counter/104-quad-8.c .signal = quad8_signals + 2 * (_id) \ _id 1334 drivers/counter/104-quad-8.c .signal = quad8_signals + 2 * (_id) + 1 \ _id 1339 drivers/counter/104-quad-8.c .signal = quad8_signals + 2 * (_id) + 16 \ _id 1385 drivers/counter/104-quad-8.c #define QUAD8_COUNT(_id, _cntname) { \ _id 1386 drivers/counter/104-quad-8.c .id = (_id), \ _id 1390 drivers/counter/104-quad-8.c .synapses = quad8_count_synapses[(_id)], \ _id 489 drivers/dax/bus.c struct dax_id *dax_id, *_id; _id 493 drivers/dax/bus.c list_for_each_entry_safe(dax_id, _id, &dax_drv->ids, list) { _id 109 drivers/dio/dio.c #define dio_getname(_id) (dio_no_name) _id 50 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h #define CLUSTER(_id, _reg, _sel_reg, _sel_val) \ _id 51 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h { .id = _id, .name = #_id,\ _id 123 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h #define CLUSTER_DBGAHB(_id, _base, _type, _reg) \ _id 124 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h { .name = #_id, .statetype = _type, .base = _base, \ _id 377 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h #define DEBUGBUS(_id, _count) { .id = _id, .name = #_id, .count = _count } _id 175 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c #define SSPP_BLK(_name, _id, _base, _features, \ _id 178 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c .name = _name, .id = _id, \ _id 218 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c #define LM_BLK(_name, _id, _base, _pp, _lmpair) \ _id 220 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c .name = _name, .id = _id, \ _id 252 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c #define PP_BLK_TE(_name, _id, _base) \ _id 254 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c .name = _name, .id = _id, \ _id 259 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c #define PP_BLK(_name, _id, _base) \ _id 261 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c .name = _name, .id = _id, \ _id 277 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c #define INTF_BLK(_name, _id, _base, _type, _ctrl_id) \ _id 279 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c .name = _name, .id = _id, \ _id 154 drivers/gpu/drm/panfrost/panfrost_gpu.c #define GPU_MODEL(_name, _id, ...) \ _id 157 drivers/gpu/drm/panfrost/panfrost_gpu.c .id = _id, \ _id 122 drivers/hwmon/max1111.c #define MAX1111_ADC_ATTR(_id) \ _id 123 drivers/hwmon/max1111.c SENSOR_DEVICE_ATTR(in##_id##_input, S_IRUGO, show_adc, NULL, _id) _id 432 drivers/hwmon/pmbus/pmbus.h #define PMBUS_REGULATOR(_name, _id) \ _id 433 drivers/hwmon/pmbus/pmbus.h [_id] = { \ _id 434 drivers/hwmon/pmbus/pmbus.h .name = (_name # _id), \ _id 435 drivers/hwmon/pmbus/pmbus.h .id = (_id), \ _id 436 drivers/hwmon/pmbus/pmbus.h .of_match = of_match_ptr(_name # _id), \ _id 486 drivers/iio/adc/bcm_iproc_adc.c #define IPROC_ADC_CHANNEL(_index, _id) { \ _id 492 drivers/iio/adc/bcm_iproc_adc.c .datasheet_name = _id, \ _id 250 drivers/iio/adc/da9150-gpadc.c #define DA9150_GPADC_CHANNEL(_id, _hw_id, _type, chan_info, \ _id 254 drivers/iio/adc/da9150-gpadc.c .channel = DA9150_GPADC_CHAN_##_id, \ _id 258 drivers/iio/adc/da9150-gpadc.c .datasheet_name = #_id, \ _id 261 drivers/iio/adc/da9150-gpadc.c #define DA9150_GPADC_CHANNEL_RAW(_id, _hw_id, _type, _ext_name) \ _id 262 drivers/iio/adc/da9150-gpadc.c DA9150_GPADC_CHANNEL(_id, _hw_id, _type, \ _id 265 drivers/iio/adc/da9150-gpadc.c #define DA9150_GPADC_CHANNEL_SCALED(_id, _hw_id, _type, _ext_name) \ _id 266 drivers/iio/adc/da9150-gpadc.c DA9150_GPADC_CHANNEL(_id, _hw_id, _type, \ _id 272 drivers/iio/adc/da9150-gpadc.c #define DA9150_GPADC_CHANNEL_PROCESSED(_id, _hw_id, _type, _ext_name) \ _id 273 drivers/iio/adc/da9150-gpadc.c DA9150_GPADC_CHANNEL(_id, _hw_id, _type, \ _id 680 drivers/iio/adc/exynos_adc.c #define ADC_CHANNEL(_index, _id) { \ _id 686 drivers/iio/adc/exynos_adc.c .datasheet_name = _id, \ _id 127 drivers/iio/adc/lp8788_adc.c #define LP8788_CHAN(_id, _type) { \ _id 130 drivers/iio/adc/lp8788_adc.c .channel = LPADC_##_id, \ _id 133 drivers/iio/adc/lp8788_adc.c .datasheet_name = #_id, \ _id 121 drivers/iio/adc/rockchip_saradc.c #define ADC_CHANNEL(_index, _id) { \ _id 127 drivers/iio/adc/rockchip_saradc.c .datasheet_name = _id, \ _id 147 drivers/interconnect/qcom/qcs404.c #define DEFINE_QNODE(_name, _id, _buswidth, _mas_rpm_id, _slv_rpm_id, \ _id 151 drivers/interconnect/qcom/qcs404.c .id = _id, \ _id 136 drivers/interconnect/qcom/sdm845.c #define DEFINE_QNODE(_name, _id, _channels, _buswidth, \ _id 139 drivers/interconnect/qcom/sdm845.c .id = _id, \ _id 316 drivers/mfd/lm3533-core.c #define LM3533_OUTPUT_ATTR(_name, _mode, _show, _store, _type, _id) \ _id 320 drivers/mfd/lm3533-core.c .u.output = { .id = _id }, } _id 322 drivers/mfd/lm3533-core.c #define LM3533_OUTPUT_ATTR_RW(_name, _type, _id) \ _id 324 drivers/mfd/lm3533-core.c show_output, store_output, _type, _id) _id 24 drivers/mfd/lp8788.c #define MFD_DEV_WITH_ID(_name, _id) \ _id 27 drivers/mfd/lp8788.c .id = _id, \ _id 30 drivers/mfd/rc5t583.c #define DEEPSLEEP_INIT(_id, _reg, _pos) \ _id 54 drivers/mfd/ti-lmu.c #define LM363X_REGULATOR(_id) \ _id 57 drivers/mfd/ti-lmu.c .id = _id, \ _id 23 drivers/net/ethernet/brocade/bna/bna.h #define bna_is_small_rxq(_id) ((_id) & 0x1) _id 14 drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c #define MVPP2_DEF_FLOW(_type, _id, _opts, _ri, _ri_mask) \ _id 17 drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c .flow_id = _id, \ _id 293 drivers/net/ethernet/marvell/octeontx2/af/mbox.c #define M(_name, _id, _1, _2, _3) case _id: return # _name; _id 217 drivers/net/ethernet/marvell/octeontx2/af/mbox.h #define M(_name, _id, _1, _2, _3) MBOX_MSG_ ## _name = _id, _id 1376 drivers/net/ethernet/marvell/octeontx2/af/rvu.c #define M(_name, _id, _fn_name, _req_type, _rsp_type) \ _id 1377 drivers/net/ethernet/marvell/octeontx2/af/rvu.c case _id: { \ _id 1387 drivers/net/ethernet/marvell/octeontx2/af/rvu.c _id != MBOX_MSG_DETACH_RESOURCES && \ _id 1388 drivers/net/ethernet/marvell/octeontx2/af/rvu.c _id != MBOX_MSG_NIX_TXSCH_FREE && \ _id 1389 drivers/net/ethernet/marvell/octeontx2/af/rvu.c _id != MBOX_MSG_VF_FLR) \ _id 1392 drivers/net/ethernet/marvell/octeontx2/af/rvu.c rsp->hdr.id = _id; \ _id 23 drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c #define M(_name, _id, _fn_name, _req_type, _rsp_type) \ _id 35 drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c req->hdr.id = _id; \ _id 2782 drivers/net/ethernet/mediatek/mtk_eth_soc.c const __be32 *_id = of_get_property(np, "reg", NULL); _id 2787 drivers/net/ethernet/mediatek/mtk_eth_soc.c if (!_id) { _id 2792 drivers/net/ethernet/mediatek/mtk_eth_soc.c id = be32_to_cpup(_id); _id 21 drivers/net/ethernet/mellanox/mlxsw/reg.h #define MLXSW_REG_DEFINE(_name, _id, _len) \ _id 23 drivers/net/ethernet/mellanox/mlxsw/reg.h .id = _id, \ _id 17 drivers/net/ethernet/mellanox/mlxsw/spectrum_trap.c #define MLXSW_SP_TRAP_DROP(_id, _group_id) \ _id 18 drivers/net/ethernet/mellanox/mlxsw/spectrum_trap.c DEVLINK_TRAP_GENERIC(DROP, DROP, _id, \ _id 22 drivers/net/ethernet/mellanox/mlxsw/spectrum_trap.c #define MLXSW_SP_RXL_DISCARD(_id, _group_id) \ _id 23 drivers/net/ethernet/mellanox/mlxsw/spectrum_trap.c MLXSW_RXL(mlxsw_sp_rx_drop_listener, DISCARD_##_id, SET_FW_DEFAULT, \ _id 335 drivers/net/netdevsim/dev.c #define NSIM_TRAP_DROP(_id, _group_id) \ _id 336 drivers/net/netdevsim/dev.c DEVLINK_TRAP_GENERIC(DROP, DROP, _id, \ _id 339 drivers/net/netdevsim/dev.c #define NSIM_TRAP_EXCEPTION(_id, _group_id) \ _id 340 drivers/net/netdevsim/dev.c DEVLINK_TRAP_GENERIC(EXCEPTION, TRAP, _id, \ _id 343 drivers/net/netdevsim/dev.c #define NSIM_TRAP_DRIVER_EXCEPTION(_id, _group_id) \ _id 344 drivers/net/netdevsim/dev.c DEVLINK_TRAP_DRIVER(EXCEPTION, TRAP, NSIM_TRAP_ID_##_id, \ _id 345 drivers/net/netdevsim/dev.c NSIM_TRAP_NAME_##_id, \ _id 304 drivers/net/phy/dp83822.c #define DP83822_PHY_DRIVER(_id, _name) \ _id 306 drivers/net/phy/dp83822.c PHY_ID_MATCH_MODEL(_id), \ _id 92 drivers/net/phy/dp83848.c #define DP83848_PHY_DRIVER(_id, _name, _config_init) \ _id 94 drivers/net/phy/dp83848.c .phy_id = _id, \ _id 82 drivers/net/wireless/intel/iwlwifi/fw/api/context.h #define FW_CMD_ID_AND_COLOR(_id, _color) (((_id) << FW_CTXT_ID_POS) |\ _id 597 drivers/net/wireless/mediatek/mt76/mt76x02_regs.h #define MT_TX_AGG_CNT(_id) ((_id) < 8 ? \ _id 598 drivers/net/wireless/mediatek/mt76/mt76x02_regs.h MT_TX_AGG_CNT_BASE0 + ((_id) << 2) : \ _id 599 drivers/net/wireless/mediatek/mt76/mt76x02_regs.h MT_TX_AGG_CNT_BASE1 + (((_id) - 8) << 2)) _id 51 drivers/net/wireless/mediatek/mt76/mt76x2/eeprom.c #define GROUP_5G(_id) \ _id 52 drivers/net/wireless/mediatek/mt76/mt76x2/eeprom.c MT_EE_TX_POWER_0_START_5G + MT_TX_POWER_GROUP_SIZE_5G * (_id), \ _id 53 drivers/net/wireless/mediatek/mt76/mt76x2/eeprom.c MT_EE_TX_POWER_0_START_5G + MT_TX_POWER_GROUP_SIZE_5G * (_id) + 1, \ _id 54 drivers/net/wireless/mediatek/mt76/mt76x2/eeprom.c MT_EE_TX_POWER_1_START_5G + MT_TX_POWER_GROUP_SIZE_5G * (_id), \ _id 55 drivers/net/wireless/mediatek/mt76/mt76x2/eeprom.c MT_EE_TX_POWER_1_START_5G + MT_TX_POWER_GROUP_SIZE_5G * (_id) + 1 _id 527 drivers/net/wireless/mediatek/mt7601u/regs.h #define MT_TX_AGG_CNT(_id) ((_id) < 8 ? \ _id 528 drivers/net/wireless/mediatek/mt7601u/regs.h MT_TX_AGG_CNT_BASE0 + ((_id) << 2) : \ _id 529 drivers/net/wireless/mediatek/mt7601u/regs.h MT_TX_AGG_CNT_BASE1 + ((_id - 8) << 2)) _id 772 drivers/net/wireless/realtek/rtlwifi/base.c ({typeof(rate_id) _id = rate_id; \ _id 774 drivers/net/wireless/realtek/rtlwifi/base.c rtl_mrate_idx_to_arfr_id(hw, _id, \ _id 777 drivers/net/wireless/realtek/rtlwifi/base.c _id); }) _id 1228 drivers/net/wireless/realtek/rtlwifi/base.c ({typeof(rate_id) _id = rate_id; \ _id 1230 drivers/net/wireless/realtek/rtlwifi/base.c rtl_mrate_idx_to_arfr_id(hw, _id, \ _id 1233 drivers/net/wireless/realtek/rtlwifi/base.c _id); }) _id 112 drivers/perf/fsl_imx8_ddr_perf.c #define IMX8_DDR_PMU_EVENT_ATTR(_name, _id) \ _id 115 drivers/perf/fsl_imx8_ddr_perf.c .id = _id, } \ _id 724 drivers/perf/qcom_l2_pmu.c #define L2CACHE_EVENT_ATTR(_name, _id) \ _id 727 drivers/perf/qcom_l2_pmu.c .id = _id, } \ _id 649 drivers/perf/qcom_l3_pmu.c #define L3CACHE_EVENT_ATTR(_name, _id) \ _id 652 drivers/perf/qcom_l3_pmu.c .id = _id, } \ _id 177 drivers/pinctrl/mvebu/pinctrl-mvebu.h #define MPP_MODE(_id, ...) \ _id 179 drivers/pinctrl/mvebu/pinctrl-mvebu.h .pid = _id, \ _id 184 drivers/pinctrl/mvebu/pinctrl-mvebu.h #define MPP_GPIO_RANGE(_id, _pinbase, _gpiobase, _npins) \ _id 187 drivers/pinctrl/mvebu/pinctrl-mvebu.h .id = _id, \ _id 447 drivers/pinctrl/pinctrl-palmas.c #define PIN_INFO(_name, _id, _pud_info, _od_info) \ _id 449 drivers/pinctrl/pinctrl-palmas.c .mux_opt = PALMAS_PINMUX_##_id, \ _id 270 drivers/regulator/88pm8607.c #define PM8607_LDO(_id, vreg, shift, ereg, ebit) \ _id 273 drivers/regulator/88pm8607.c .name = "LDO" #_id, \ _id 274 drivers/regulator/88pm8607.c .of_match = of_match_ptr("LDO" #_id), \ _id 278 drivers/regulator/88pm8607.c .id = PM8607_ID_LDO##_id, \ _id 280 drivers/regulator/88pm8607.c .volt_table = LDO##_id##_table, \ _id 281 drivers/regulator/88pm8607.c .n_voltages = ARRAY_SIZE(LDO##_id##_table), \ _id 283 drivers/regulator/88pm8607.c .vsel_mask = (ARRAY_SIZE(LDO##_id##_table) - 1) << (shift), \ _id 288 drivers/regulator/88pm8607.c .vol_suspend = (unsigned int *)&LDO##_id##_suspend_table, \ _id 1071 drivers/regulator/ab8500.c #define REG_INIT(_id, _bank, _addr, _mask) \ _id 1072 drivers/regulator/ab8500.c [_id] = { \ _id 437 drivers/regulator/act8865-regulator.c #define ACT88xx_REG_(_name, _family, _id, _vsel_reg, _supply, _ops) \ _id 438 drivers/regulator/act8865-regulator.c [_family##_ID_##_id] = { \ _id 444 drivers/regulator/act8865-regulator.c .id = _family##_ID_##_id, \ _id 450 drivers/regulator/act8865-regulator.c .vsel_reg = _family##_##_id##_##_vsel_reg, \ _id 452 drivers/regulator/act8865-regulator.c .enable_reg = _family##_##_id##_CTRL, \ _id 454 drivers/regulator/act8865-regulator.c .pull_down_reg = _family##_##_id##_CTRL, \ _id 459 drivers/regulator/act8865-regulator.c #define ACT88xx_REG(_name, _family, _id, _vsel_reg, _supply) \ _id 460 drivers/regulator/act8865-regulator.c ACT88xx_REG_(_name, _family, _id, _vsel_reg, _supply, &act8865_ops) _id 462 drivers/regulator/act8865-regulator.c #define ACT88xx_LDO(_name, _family, _id, _vsel_reg, _supply) \ _id 463 drivers/regulator/act8865-regulator.c ACT88xx_REG_(_name, _family, _id, _vsel_reg, _supply, &act8865_ldo_ops) _id 234 drivers/regulator/act8945a-regulator.c #define ACT89xx_REG(_name, _family, _id, _vsel_reg, _supply) \ _id 235 drivers/regulator/act8945a-regulator.c [_family##_ID_##_id] = { \ _id 238 drivers/regulator/act8945a-regulator.c .of_match = of_match_ptr("REG_"#_id), \ _id 241 drivers/regulator/act8945a-regulator.c .id = _family##_ID_##_id, \ _id 247 drivers/regulator/act8945a-regulator.c .vsel_reg = _family##_##_id##_##_vsel_reg, \ _id 249 drivers/regulator/act8945a-regulator.c .enable_reg = _family##_##_id##_CTRL, \ _id 122 drivers/regulator/as3711-regulator.c #define AS3711_REG(_id, _en_reg, _en_bit, _vmask, _sfx) \ _id 123 drivers/regulator/as3711-regulator.c [AS3711_REGULATOR_ ## _id] = { \ _id 124 drivers/regulator/as3711-regulator.c .name = "as3711-regulator-" # _id, \ _id 125 drivers/regulator/as3711-regulator.c .id = AS3711_REGULATOR_ ## _id, \ _id 130 drivers/regulator/as3711-regulator.c .vsel_reg = AS3711_ ## _id ## _VOLTAGE, \ _id 272 drivers/regulator/axp20x-regulator.c #define AXP_DESC_IO(_family, _id, _match, _supply, _min, _max, _step, _vreg, \ _id 274 drivers/regulator/axp20x-regulator.c [_family##_##_id] = { \ _id 280 drivers/regulator/axp20x-regulator.c .id = _family##_##_id, \ _id 294 drivers/regulator/axp20x-regulator.c #define AXP_DESC(_family, _id, _match, _supply, _min, _max, _step, _vreg, \ _id 296 drivers/regulator/axp20x-regulator.c [_family##_##_id] = { \ _id 302 drivers/regulator/axp20x-regulator.c .id = _family##_##_id, \ _id 314 drivers/regulator/axp20x-regulator.c #define AXP_DESC_SW(_family, _id, _match, _supply, _ereg, _emask) \ _id 315 drivers/regulator/axp20x-regulator.c [_family##_##_id] = { \ _id 321 drivers/regulator/axp20x-regulator.c .id = _family##_##_id, \ _id 328 drivers/regulator/axp20x-regulator.c #define AXP_DESC_FIXED(_family, _id, _match, _supply, _volt) \ _id 329 drivers/regulator/axp20x-regulator.c [_family##_##_id] = { \ _id 335 drivers/regulator/axp20x-regulator.c .id = _family##_##_id, \ _id 342 drivers/regulator/axp20x-regulator.c #define AXP_DESC_RANGES(_family, _id, _match, _supply, _ranges, _n_voltages, \ _id 344 drivers/regulator/axp20x-regulator.c [_family##_##_id] = { \ _id 350 drivers/regulator/axp20x-regulator.c .id = _family##_##_id, \ _id 34 drivers/regulator/bd9571mwv-regulator.c #define BD9571MWV_REG(_name, _of, _id, _ops, _vr, _vm, _nv, _min, _step, _lmin)\ _id 39 drivers/regulator/bd9571mwv-regulator.c .id = _id, \ _id 309 drivers/regulator/da903x.c #define DA903x_LDO(_pmic, _id, min, max, step, vreg, shift, nbits, ereg, ebit) \ _id 312 drivers/regulator/da903x.c .name = "LDO" #_id, \ _id 315 drivers/regulator/da903x.c .id = _pmic##_ID_LDO##_id, \ _id 329 drivers/regulator/da903x.c #define DA903x_DVC(_pmic, _id, min, max, step, vreg, nbits, ureg, ubit, ereg, ebit) \ _id 332 drivers/regulator/da903x.c .name = #_id, \ _id 335 drivers/regulator/da903x.c .id = _pmic##_ID_##_id, \ _id 351 drivers/regulator/da903x.c #define DA9034_LDO(_id, min, max, step, vreg, shift, nbits, ereg, ebit) \ _id 352 drivers/regulator/da903x.c DA903x_LDO(DA9034, _id, min, max, step, vreg, shift, nbits, ereg, ebit) _id 354 drivers/regulator/da903x.c #define DA9030_LDO(_id, min, max, step, vreg, shift, nbits, ereg, ebit) \ _id 355 drivers/regulator/da903x.c DA903x_LDO(DA9030, _id, min, max, step, vreg, shift, nbits, ereg, ebit) _id 357 drivers/regulator/da903x.c #define DA9030_DVC(_id, min, max, step, vreg, nbits, ureg, ubit, ereg, ebit) \ _id 358 drivers/regulator/da903x.c DA903x_DVC(DA9030, _id, min, max, step, vreg, nbits, ureg, ubit, \ _id 361 drivers/regulator/da903x.c #define DA9034_DVC(_id, min, max, step, vreg, nbits, ureg, ubit, ereg, ebit) \ _id 362 drivers/regulator/da903x.c DA903x_DVC(DA9034, _id, min, max, step, vreg, nbits, ureg, ubit, \ _id 365 drivers/regulator/da903x.c #define DA9035_DVC(_id, min, max, step, vreg, nbits, ureg, ubit, ereg, ebit) \ _id 366 drivers/regulator/da903x.c DA903x_DVC(DA9035, _id, min, max, step, vreg, nbits, ureg, ubit, \ _id 285 drivers/regulator/da9052-regulator.c #define DA9052_LDO(_id, _name, step, min, max, sbits, ebits, abits) \ _id 293 drivers/regulator/da9052-regulator.c .id = DA9052_ID_##_id,\ _id 296 drivers/regulator/da9052-regulator.c .vsel_reg = DA9052_BUCKCORE_REG + DA9052_ID_##_id, \ _id 298 drivers/regulator/da9052-regulator.c .enable_reg = DA9052_BUCKCORE_REG + DA9052_ID_##_id, \ _id 307 drivers/regulator/da9052-regulator.c #define DA9052_DCDC(_id, _name, step, min, max, sbits, ebits, abits) \ _id 315 drivers/regulator/da9052-regulator.c .id = DA9052_ID_##_id,\ _id 318 drivers/regulator/da9052-regulator.c .vsel_reg = DA9052_BUCKCORE_REG + DA9052_ID_##_id, \ _id 320 drivers/regulator/da9052-regulator.c .enable_reg = DA9052_BUCKCORE_REG + DA9052_ID_##_id, \ _id 331 drivers/regulator/da9055-regulator.c #define DA9055_LDO(_id, step, min, max, vbits, voffset) \ _id 334 drivers/regulator/da9055-regulator.c .name = #_id,\ _id 335 drivers/regulator/da9055-regulator.c .of_match = of_match_ptr(#_id),\ _id 339 drivers/regulator/da9055-regulator.c .id = DA9055_ID_##_id,\ _id 341 drivers/regulator/da9055-regulator.c .enable_reg = DA9055_REG_BCORE_CONT + DA9055_ID_##_id, \ _id 349 drivers/regulator/da9055-regulator.c .reg = DA9055_REG_BCORE_CONT + DA9055_ID_##_id, \ _id 354 drivers/regulator/da9055-regulator.c .reg_a = DA9055_REG_VBCORE_A + DA9055_ID_##_id, \ _id 355 drivers/regulator/da9055-regulator.c .reg_b = DA9055_REG_VBCORE_B + DA9055_ID_##_id, \ _id 361 drivers/regulator/da9055-regulator.c #define DA9055_BUCK(_id, step, min, max, vbits, voffset, mbits, sbits) \ _id 364 drivers/regulator/da9055-regulator.c .name = #_id,\ _id 365 drivers/regulator/da9055-regulator.c .of_match = of_match_ptr(#_id),\ _id 369 drivers/regulator/da9055-regulator.c .id = DA9055_ID_##_id,\ _id 371 drivers/regulator/da9055-regulator.c .enable_reg = DA9055_REG_BCORE_CONT + DA9055_ID_##_id, \ _id 383 drivers/regulator/da9055-regulator.c .reg = DA9055_REG_BCORE_CONT + DA9055_ID_##_id, \ _id 388 drivers/regulator/da9055-regulator.c .reg_a = DA9055_REG_VBCORE_A + DA9055_ID_##_id, \ _id 389 drivers/regulator/da9055-regulator.c .reg_b = DA9055_REG_VBCORE_B + DA9055_ID_##_id, \ _id 225 drivers/regulator/da9211-regulator.c #define DA9211_BUCK(_id) \ _id 227 drivers/regulator/da9211-regulator.c .name = #_id,\ _id 230 drivers/regulator/da9211-regulator.c .id = DA9211_ID_##_id,\ _id 234 drivers/regulator/da9211-regulator.c .enable_reg = DA9211_REG_BUCKA_CONT + DA9211_ID_##_id,\ _id 236 drivers/regulator/da9211-regulator.c .vsel_reg = DA9211_REG_VBUCKA_A + DA9211_ID_##_id * 2,\ _id 129 drivers/regulator/hi6421-regulator.c #define HI6421_LDO(_id, _match, v_table, vreg, vmask, ereg, emask, \ _id 131 drivers/regulator/hi6421-regulator.c [HI6421_##_id] = { \ _id 133 drivers/regulator/hi6421-regulator.c .name = #_id, \ _id 138 drivers/regulator/hi6421-regulator.c .id = HI6421_##_id, \ _id 168 drivers/regulator/hi6421-regulator.c #define HI6421_LDO_LINEAR(_id, _match, _min_uV, n_volt, vstep, vreg, vmask,\ _id 170 drivers/regulator/hi6421-regulator.c [HI6421_##_id] = { \ _id 172 drivers/regulator/hi6421-regulator.c .name = #_id, \ _id 177 drivers/regulator/hi6421-regulator.c .id = HI6421_##_id, \ _id 208 drivers/regulator/hi6421-regulator.c #define HI6421_LDO_LINEAR_RANGE(_id, _match, n_volt, volt_ranges, vreg, vmask,\ _id 210 drivers/regulator/hi6421-regulator.c [HI6421_##_id] = { \ _id 212 drivers/regulator/hi6421-regulator.c .name = #_id, \ _id 217 drivers/regulator/hi6421-regulator.c .id = HI6421_##_id, \ _id 245 drivers/regulator/hi6421-regulator.c #define HI6421_BUCK012(_id, _match, vreg, vmask, ereg, emask, sleepmask,\ _id 247 drivers/regulator/hi6421-regulator.c [HI6421_##_id] = { \ _id 249 drivers/regulator/hi6421-regulator.c .name = #_id, \ _id 254 drivers/regulator/hi6421-regulator.c .id = HI6421_##_id, \ _id 282 drivers/regulator/hi6421-regulator.c #define HI6421_BUCK345(_id, _match, v_table, vreg, vmask, ereg, emask, \ _id 284 drivers/regulator/hi6421-regulator.c [HI6421_##_id] = { \ _id 286 drivers/regulator/hi6421-regulator.c .name = #_id, \ _id 291 drivers/regulator/hi6421-regulator.c .id = HI6421_##_id, \ _id 22 drivers/regulator/lp873x-regulator.c #define LP873X_REGULATOR(_name, _id, _of, _ops, _n, _vr, _vm, _er, _em, \ _id 24 drivers/regulator/lp873x-regulator.c [_id] = { \ _id 28 drivers/regulator/lp873x-regulator.c .id = _id, \ _id 240 drivers/regulator/lp8755.c #define lp8755_rail(_id) "lp8755_buck"#_id _id 241 drivers/regulator/lp8755.c #define lp8755_buck_init(_id)\ _id 244 drivers/regulator/lp8755.c .name = lp8755_rail(_id),\ _id 298 drivers/regulator/lp8755.c #define lp8755_buck_desc(_id)\ _id 300 drivers/regulator/lp8755.c .name = lp8755_rail(_id),\ _id 301 drivers/regulator/lp8755.c .id = LP8755_BUCK##_id,\ _id 308 drivers/regulator/lp8755.c .enable_reg = LP8755_REG_BUCK##_id,\ _id 310 drivers/regulator/lp8755.c .vsel_reg = LP8755_REG_BUCK##_id,\ _id 14 drivers/regulator/lp87565-regulator.c #define LP87565_REGULATOR(_name, _id, _of, _ops, _n, _vr, _vm, _er, _em, \ _id 16 drivers/regulator/lp87565-regulator.c [_id] = { \ _id 20 drivers/regulator/lp87565-regulator.c .id = _id, \ _id 195 drivers/regulator/ltc3676.c #define LTC3676_REG(_id, _name, _ops, en_reg, en_bit, dvba_reg, dvb_mask) \ _id 196 drivers/regulator/ltc3676.c [LTC3676_ ## _id] = { \ _id 208 drivers/regulator/ltc3676.c .id = LTC3676_ ## _id, \ _id 216 drivers/regulator/ltc3676.c #define LTC3676_LINEAR_REG(_id, _name, _en, _dvba) \ _id 217 drivers/regulator/ltc3676.c LTC3676_REG(_id, _name, linear, \ _id 221 drivers/regulator/ltc3676.c #define LTC3676_FIXED_REG(_id, _name, _en_reg, _en_bit) \ _id 222 drivers/regulator/ltc3676.c LTC3676_REG(_id, _name, fixed, LTC3676_ ## _en_reg, _en_bit, 0, 0) _id 660 drivers/regulator/max77620-regulator.c #define RAIL_SD(_id, _name, _sname, _volt_mask, _min_uV, _max_uV, \ _id 662 drivers/regulator/max77620-regulator.c [MAX77620_REGULATOR_ID_##_id] = { \ _id 664 drivers/regulator/max77620-regulator.c .volt_addr = MAX77620_REG_##_id, \ _id 665 drivers/regulator/max77620-regulator.c .cfg_addr = MAX77620_REG_##_id##_CFG, \ _id 666 drivers/regulator/max77620-regulator.c .fps_addr = MAX77620_REG_FPS_##_id, \ _id 677 drivers/regulator/max77620-regulator.c .id = MAX77620_REGULATOR_ID_##_id, \ _id 684 drivers/regulator/max77620-regulator.c .vsel_reg = MAX77620_REG_##_id, \ _id 688 drivers/regulator/max77620-regulator.c .active_discharge_reg = MAX77620_REG_##_id##_CFG, \ _id 694 drivers/regulator/max77620-regulator.c #define RAIL_LDO(_id, _name, _sname, _type, _min_uV, _max_uV, _step_uV) \ _id 695 drivers/regulator/max77620-regulator.c [MAX77620_REGULATOR_ID_##_id] = { \ _id 697 drivers/regulator/max77620-regulator.c .volt_addr = MAX77620_REG_##_id##_CFG, \ _id 698 drivers/regulator/max77620-regulator.c .cfg_addr = MAX77620_REG_##_id##_CFG2, \ _id 699 drivers/regulator/max77620-regulator.c .fps_addr = MAX77620_REG_FPS_##_id, \ _id 709 drivers/regulator/max77620-regulator.c .id = MAX77620_REGULATOR_ID_##_id, \ _id 716 drivers/regulator/max77620-regulator.c .vsel_reg = MAX77620_REG_##_id##_CFG, \ _id 720 drivers/regulator/max77620-regulator.c .active_discharge_reg = MAX77620_REG_##_id##_CFG2, \ _id 183 drivers/regulator/max8907-regulator.c #define MATCH(_name, _id) \ _id 184 drivers/regulator/max8907-regulator.c [MAX8907_##_id] = { \ _id 186 drivers/regulator/max8907-regulator.c .driver_data = (void *)&max8907_regulators[MAX8907_##_id], \ _id 155 drivers/regulator/max8925-regulator.c #define MAX8925_SDV(_id, min, max, step) \ _id 158 drivers/regulator/max8925-regulator.c .name = "SDV" #_id, \ _id 159 drivers/regulator/max8925-regulator.c .of_match = of_match_ptr("SDV" #_id), \ _id 163 drivers/regulator/max8925-regulator.c .id = MAX8925_ID_SD##_id, \ _id 169 drivers/regulator/max8925-regulator.c .vol_reg = MAX8925_SDV##_id, \ _id 170 drivers/regulator/max8925-regulator.c .enable_reg = MAX8925_SDCTL##_id, \ _id 173 drivers/regulator/max8925-regulator.c #define MAX8925_LDO(_id, min, max, step) \ _id 176 drivers/regulator/max8925-regulator.c .name = "LDO" #_id, \ _id 177 drivers/regulator/max8925-regulator.c .of_match = of_match_ptr("LDO" #_id), \ _id 181 drivers/regulator/max8925-regulator.c .id = MAX8925_ID_LDO##_id, \ _id 187 drivers/regulator/max8925-regulator.c .vol_reg = MAX8925_LDOVOUT##_id, \ _id 188 drivers/regulator/max8925-regulator.c .enable_reg = MAX8925_LDOCTL##_id, \ _id 400 drivers/regulator/max8998.c #define MAX8998_OTHERS_REG(_name, _id) \ _id 403 drivers/regulator/max8998.c .id = _id, \ _id 86 drivers/regulator/mcp16502.c #define MCP16502_REGULATOR(_name, _id, _ranges, _ops) \ _id 87 drivers/regulator/mcp16502.c [_id] = { \ _id 90 drivers/regulator/mcp16502.c .id = _id, \ _id 99 drivers/regulator/mcp16502.c .vsel_reg = (((_id) + 1) << 4), \ _id 101 drivers/regulator/mcp16502.c .enable_reg = (((_id) + 1) << 4), \ _id 49 drivers/regulator/mt6311-regulator.c #define MT6311_BUCK(_id) \ _id 51 drivers/regulator/mt6311-regulator.c .name = #_id,\ _id 53 drivers/regulator/mt6311-regulator.c .of_match = of_match_ptr(#_id),\ _id 56 drivers/regulator/mt6311-regulator.c .id = MT6311_ID_##_id,\ _id 67 drivers/regulator/mt6311-regulator.c #define MT6311_LDO(_id) \ _id 69 drivers/regulator/mt6311-regulator.c .name = #_id,\ _id 71 drivers/regulator/mt6311-regulator.c .of_match = of_match_ptr(#_id),\ _id 74 drivers/regulator/mt6311-regulator.c .id = MT6311_ID_##_id,\ _id 320 drivers/regulator/palmas-regulator.c #define EXTERNAL_REQUESTOR(_id, _offset, _pos) \ _id 321 drivers/regulator/palmas-regulator.c [PALMAS_EXTERNAL_REQSTR_ID_##_id] = { \ _id 322 drivers/regulator/palmas-regulator.c .id = PALMAS_EXTERNAL_REQSTR_ID_##_id, \ _id 356 drivers/regulator/palmas-regulator.c #define EXTERNAL_REQUESTOR_TPS65917(_id, _offset, _pos) \ _id 357 drivers/regulator/palmas-regulator.c [TPS65917_EXTERNAL_REQSTR_ID_##_id] = { \ _id 358 drivers/regulator/palmas-regulator.c .id = TPS65917_EXTERNAL_REQSTR_ID_##_id, \ _id 22 drivers/regulator/pcf50633-regulator.c #define PCF50633_REGULATOR(_name, _id, _min_uV, _uV_step, _min_sel, _n) \ _id 25 drivers/regulator/pcf50633-regulator.c .id = PCF50633_REGULATOR_##_id, \ _id 33 drivers/regulator/pcf50633-regulator.c .vsel_reg = PCF50633_REG_##_id##OUT, \ _id 35 drivers/regulator/pcf50633-regulator.c .enable_reg = PCF50633_REG_##_id##OUT + 1, \ _id 58 drivers/regulator/rc5t583-regulator.c #define RC5T583_REG(_id, _en_reg, _en_bit, _disc_reg, _disc_bit, \ _id 63 drivers/regulator/rc5t583-regulator.c .deepsleep_reg = RC5T583_REG_##_id##DAC_DS, \ _id 65 drivers/regulator/rc5t583-regulator.c .deepsleep_id = RC5T583_DS_##_id, \ _id 67 drivers/regulator/rc5t583-regulator.c .name = "rc5t583-regulator-"#_id, \ _id 68 drivers/regulator/rc5t583-regulator.c .id = RC5T583_REGULATOR_##_id, \ _id 73 drivers/regulator/rc5t583-regulator.c .vsel_reg = RC5T583_REG_##_id##DAC, \ _id 69 drivers/regulator/rk808-regulator.c #define RK817_BOOST_DESC(_id, _match, _supply, _min, _max, _step, _vreg,\ _id 77 drivers/regulator/rk808-regulator.c .id = (_id), \ _id 93 drivers/regulator/rk808-regulator.c #define RK8XX_DESC_COM(_id, _match, _supply, _min, _max, _step, _vreg, \ _id 101 drivers/regulator/rk808-regulator.c .id = (_id), \ _id 116 drivers/regulator/rk808-regulator.c #define RK805_DESC(_id, _match, _supply, _min, _max, _step, _vreg, \ _id 118 drivers/regulator/rk808-regulator.c RK8XX_DESC_COM(_id, _match, _supply, _min, _max, _step, _vreg, \ _id 121 drivers/regulator/rk808-regulator.c #define RK8XX_DESC(_id, _match, _supply, _min, _max, _step, _vreg, \ _id 123 drivers/regulator/rk808-regulator.c RK8XX_DESC_COM(_id, _match, _supply, _min, _max, _step, _vreg, \ _id 126 drivers/regulator/rk808-regulator.c #define RK817_DESC(_id, _match, _supply, _min, _max, _step, _vreg, \ _id 128 drivers/regulator/rk808-regulator.c RK8XX_DESC_COM(_id, _match, _supply, _min, _max, _step, _vreg, \ _id 131 drivers/regulator/rk808-regulator.c #define RKXX_DESC_SWITCH_COM(_id, _match, _supply, _ereg, _emask, \ _id 139 drivers/regulator/rk808-regulator.c .id = (_id), \ _id 148 drivers/regulator/rk808-regulator.c #define RK817_DESC_SWITCH(_id, _match, _supply, _ereg, _emask, \ _id 150 drivers/regulator/rk808-regulator.c RKXX_DESC_SWITCH_COM(_id, _match, _supply, _ereg, _emask, \ _id 153 drivers/regulator/rk808-regulator.c #define RK8XX_DESC_SWITCH(_id, _match, _supply, _ereg, _emask) \ _id 154 drivers/regulator/rk808-regulator.c RKXX_DESC_SWITCH_COM(_id, _match, _supply, _ereg, _emask, \ _id 130 drivers/regulator/sc2731-regulator.c #define SC2731_REGU_LINEAR(_id, en_reg, en_mask, vreg, vmask, \ _id 132 drivers/regulator/sc2731-regulator.c .name = #_id, \ _id 133 drivers/regulator/sc2731-regulator.c .of_match = of_match_ptr(#_id), \ _id 136 drivers/regulator/sc2731-regulator.c .id = SC2731_##_id, \ _id 216 drivers/regulator/slg51000-regulator.c #define SLG51000_REGL_DESC(_id, _name, _s_name, _min, _step) \ _id 217 drivers/regulator/slg51000-regulator.c [SLG51000_REGULATOR_##_id] = { \ _id 220 drivers/regulator/slg51000-regulator.c .id = SLG51000_REGULATOR_##_id, \ _id 230 drivers/regulator/slg51000-regulator.c .vsel_reg = SLG51000_##_id##_VSEL, \ _id 232 drivers/regulator/slg51000-regulator.c .enable_mask = BIT(SLG51000_REGULATOR_##_id), \ _id 110 drivers/regulator/stm32-pwr.c #define PWR_REG(_id, _name, _volt, _en, _supply) \ _id 111 drivers/regulator/stm32-pwr.c [_id] = { \ _id 112 drivers/regulator/stm32-pwr.c .id = _id, \ _id 514 drivers/regulator/stpmic1_regulator.c #define MATCH(_name, _id) \ _id 515 drivers/regulator/stpmic1_regulator.c [STPMIC1_##_id] = { \ _id 517 drivers/regulator/stpmic1_regulator.c .desc = &stpmic1_regulator_cfgs[STPMIC1_##_id].desc, \ _id 28 drivers/regulator/tps65086-regulator.c #define TPS65086_REGULATOR(_name, _of, _id, _nv, _vr, _vm, _er, _em, _lr, _dr, _dm) \ _id 29 drivers/regulator/tps65086-regulator.c [_id] = { \ _id 35 drivers/regulator/tps65086-regulator.c .id = _id, \ _id 52 drivers/regulator/tps65086-regulator.c #define TPS65086_SWITCH(_name, _of, _id, _er, _em) \ _id 53 drivers/regulator/tps65086-regulator.c [_id] = { \ _id 59 drivers/regulator/tps65086-regulator.c .id = _id, \ _id 185 drivers/regulator/tps65090-regulator.c #define tps65090_REG_DESC(_id, _sname, _en_reg, _en_bits, _nvolt, _volt, _ops) \ _id 187 drivers/regulator/tps65090-regulator.c .name = "TPS65090_RAILS"#_id, \ _id 189 drivers/regulator/tps65090-regulator.c .id = TPS65090_REGULATOR_##_id, \ _id 200 drivers/regulator/tps65090-regulator.c #define tps65090_REG_FIXEDV(_id, _sname, en_reg, _en_bits, _volt, _ops) \ _id 201 drivers/regulator/tps65090-regulator.c tps65090_REG_DESC(_id, _sname, en_reg, _en_bits, 1, _volt, _ops) _id 203 drivers/regulator/tps65090-regulator.c #define tps65090_REG_SWITCH(_id, _sname, en_reg, _en_bits, _ops) \ _id 204 drivers/regulator/tps65090-regulator.c tps65090_REG_DESC(_id, _sname, en_reg, _en_bits, 0, 0, _ops) _id 174 drivers/regulator/tps65132-regulator.c #define TPS65132_REGULATOR_DESC(_id, _name) \ _id 175 drivers/regulator/tps65132-regulator.c [TPS65132_REGULATOR_ID_##_id] = { \ _id 178 drivers/regulator/tps65132-regulator.c .id = TPS65132_REGULATOR_ID_##_id, \ _id 187 drivers/regulator/tps65132-regulator.c .vsel_reg = TPS65132_REG_##_id, \ _id 189 drivers/regulator/tps65132-regulator.c .active_discharge_on = TPS65132_REG_APPS_DIS_##_id, \ _id 190 drivers/regulator/tps65132-regulator.c .active_discharge_mask = TPS65132_REG_APPS_DIS_##_id, \ _id 30 drivers/regulator/tps65217-regulator.c #define TPS65217_REGULATOR(_name, _id, _of_match, _ops, _n, _vr, _vm, _em, \ _id 34 drivers/regulator/tps65217-regulator.c .id = _id, \ _id 31 drivers/regulator/tps65218-regulator.c #define TPS65218_REGULATOR(_name, _of, _id, _type, _ops, _n, _vr, _vm, _er, \ _id 37 drivers/regulator/tps65218-regulator.c .id = _id, \ _id 109 drivers/regulator/tps6586x-regulator.c #define TPS6586X_REGULATOR(_id, _ops, _pin_name, vdata, vreg, shift, nbits, \ _id 113 drivers/regulator/tps6586x-regulator.c .name = "REG-" #_id, \ _id 116 drivers/regulator/tps6586x-regulator.c .id = TPS6586X_ID_##_id, \ _id 132 drivers/regulator/tps6586x-regulator.c #define TPS6586X_REGULATOR_LINEAR(_id, _ops, _pin_name, n_volt, min_uv, \ _id 137 drivers/regulator/tps6586x-regulator.c .name = "REG-" #_id, \ _id 140 drivers/regulator/tps6586x-regulator.c .id = TPS6586X_ID_##_id, \ _id 157 drivers/regulator/tps6586x-regulator.c #define TPS6586X_LDO(_id, _pname, vdata, vreg, shift, nbits, \ _id 160 drivers/regulator/tps6586x-regulator.c TPS6586X_REGULATOR(_id, rw, _pname, vdata, vreg, shift, nbits, \ _id 164 drivers/regulator/tps6586x-regulator.c #define TPS6586X_LDO_LINEAR(_id, _pname, n_volt, min_uv, uv_step, vreg, \ _id 167 drivers/regulator/tps6586x-regulator.c TPS6586X_REGULATOR_LINEAR(_id, rw_linear, _pname, n_volt, \ _id 172 drivers/regulator/tps6586x-regulator.c #define TPS6586X_FIXED_LDO(_id, _pname, vdata, vreg, shift, nbits, \ _id 175 drivers/regulator/tps6586x-regulator.c TPS6586X_REGULATOR(_id, ro, _pname, vdata, vreg, shift, nbits, \ _id 179 drivers/regulator/tps6586x-regulator.c #define TPS6586X_DVM(_id, _pname, n_volt, min_uv, uv_step, vreg, shift, \ _id 182 drivers/regulator/tps6586x-regulator.c TPS6586X_REGULATOR_LINEAR(_id, rw_linear, _pname, n_volt, \ _id 30 drivers/regulator/tps65912-regulator.c #define TPS65912_REGULATOR(_name, _id, _of_match, _ops, _vr, _er, _lr) \ _id 31 drivers/regulator/tps65912-regulator.c [_id] = { \ _id 35 drivers/regulator/tps65912-regulator.c .id = _id, \ _id 410 drivers/regulator/tps80031-regulator.c #define TPS80031_REG_SMPS(_id, _volt_id, _pbit) \ _id 412 drivers/regulator/tps80031-regulator.c .trans_reg = TPS80031_##_id##_CFG_TRANS, \ _id 413 drivers/regulator/tps80031-regulator.c .state_reg = TPS80031_##_id##_CFG_STATE, \ _id 414 drivers/regulator/tps80031-regulator.c .force_reg = TPS80031_##_id##_CFG_FORCE, \ _id 415 drivers/regulator/tps80031-regulator.c .volt_reg = TPS80031_##_id##_CFG_VOLTAGE, \ _id 419 drivers/regulator/tps80031-regulator.c .name = "tps80031_"#_id, \ _id 420 drivers/regulator/tps80031-regulator.c .id = TPS80031_REGULATOR_##_id, \ _id 429 drivers/regulator/tps80031-regulator.c #define TPS80031_REG_LDO(_id, _preq_bit) \ _id 431 drivers/regulator/tps80031-regulator.c .trans_reg = TPS80031_##_id##_CFG_TRANS, \ _id 432 drivers/regulator/tps80031-regulator.c .state_reg = TPS80031_##_id##_CFG_STATE, \ _id 433 drivers/regulator/tps80031-regulator.c .volt_reg = TPS80031_##_id##_CFG_VOLTAGE, \ _id 438 drivers/regulator/tps80031-regulator.c .name = "tps80031_"#_id, \ _id 439 drivers/regulator/tps80031-regulator.c .id = TPS80031_REGULATOR_##_id, \ _id 446 drivers/regulator/tps80031-regulator.c .vsel_reg = TPS80031_##_id##_CFG_VOLTAGE, \ _id 452 drivers/regulator/tps80031-regulator.c #define TPS80031_REG_FIXED(_id, max_mV, _ops, _delay, _pbit) \ _id 454 drivers/regulator/tps80031-regulator.c .trans_reg = TPS80031_##_id##_CFG_TRANS, \ _id 455 drivers/regulator/tps80031-regulator.c .state_reg = TPS80031_##_id##_CFG_STATE, \ _id 459 drivers/regulator/tps80031-regulator.c .name = "tps80031_"#_id, \ _id 460 drivers/regulator/tps80031-regulator.c .id = TPS80031_REGULATOR_##_id, \ _id 28 drivers/reset/reset-uniphier.c #define UNIPHIER_RESET(_id, _reg, _bit) \ _id 30 drivers/reset/reset-uniphier.c .id = (_id), \ _id 35 drivers/reset/reset-uniphier.c #define UNIPHIER_RESETX(_id, _reg, _bit) \ _id 37 drivers/reset/reset-uniphier.c .id = (_id), \ _id 16 drivers/s390/net/qeth_l3_sys.c #define QETH_DEVICE_ATTR(_id, _name, _mode, _show, _store) \ _id 17 drivers/s390/net/qeth_l3_sys.c struct device_attribute dev_attr_##_id = __ATTR(_name, _mode, _show, _store) _id 82 drivers/scsi/cxlflash/superpipe.h #define ENCODE_CTXID(_ctx, _id) (((((u64)_ctx) & 0xFFFFFFFF0ULL) << 28) | _id) _id 184 drivers/soc/tegra/pmc.c #define TEGRA_WAKE_IRQ(_name, _id, _irq) \ _id 187 drivers/soc/tegra/pmc.c .id = _id, \ _id 195 drivers/soc/tegra/pmc.c #define TEGRA_WAKE_GPIO(_name, _id, _instance, _pin) \ _id 198 drivers/soc/tegra/pmc.c .id = _id, \ _id 2406 drivers/soc/tegra/pmc.c #define TEGRA_IO_PAD(_id, _dpd, _voltage, _name) \ _id 2408 drivers/soc/tegra/pmc.c .id = (_id), \ _id 2414 drivers/soc/tegra/pmc.c #define TEGRA_IO_PIN_DESC(_id, _dpd, _voltage, _name) \ _id 2416 drivers/soc/tegra/pmc.c .number = (_id), \ _id 27 drivers/usb/phy/phy-ulpi.c #define ULPI_INFO(_id, _name) \ _id 29 drivers/usb/phy/phy-ulpi.c .id = (_id), \ _id 607 fs/binfmt_elf_fdpic.c struct { unsigned long _id, _val; } __user *ent; \ _id 610 fs/binfmt_elf_fdpic.c __put_user((id), &ent[nr]._id); \ _id 137 fs/ext4/sysfs.c #define EXT4_ATTR(_name,_mode,_id) \ _id 140 fs/ext4/sysfs.c .attr_id = attr_##_id, \ _id 147 fs/ext4/sysfs.c #define EXT4_ATTR_OFFSET(_name,_mode,_id,_struct,_elname) \ _id 150 fs/ext4/sysfs.c .attr_id = attr_##_id, \ _id 163 fs/ext4/sysfs.c #define EXT4_ATTR_PTR(_name,_mode,_id,_ptr) \ _id 166 fs/ext4/sysfs.c .attr_id = attr_##_id, \ _id 431 fs/f2fs/sysfs.c #define F2FS_FEATURE_RO_ATTR(_name, _id) \ _id 435 fs/f2fs/sysfs.c .id = _id, \ _id 623 include/linux/bpf.h #define BPF_PROG_TYPE(_id, _name) \ _id 626 include/linux/bpf.h #define BPF_MAP_TYPE(_id, _ops) \ _id 3386 include/linux/ieee80211.h #define for_each_element_id(element, _id, data, datalen) \ _id 3388 include/linux/ieee80211.h if (element->id == (_id)) _id 419 include/linux/mod_devicetable.h #define BCMA_CORE(_manuf, _id, _rev, _class) \ _id 420 include/linux/mod_devicetable.h { .manuf = _manuf, .id = _id, .rev = _rev, .class = _class, } _id 591 include/linux/mod_devicetable.h #define MDIO_ID_ARGS(_id) \ _id 592 include/linux/mod_devicetable.h ((_id)>>31) & 1, ((_id)>>30) & 1, ((_id)>>29) & 1, ((_id)>>28) & 1, \ _id 593 include/linux/mod_devicetable.h ((_id)>>27) & 1, ((_id)>>26) & 1, ((_id)>>25) & 1, ((_id)>>24) & 1, \ _id 594 include/linux/mod_devicetable.h ((_id)>>23) & 1, ((_id)>>22) & 1, ((_id)>>21) & 1, ((_id)>>20) & 1, \ _id 595 include/linux/mod_devicetable.h ((_id)>>19) & 1, ((_id)>>18) & 1, ((_id)>>17) & 1, ((_id)>>16) & 1, \ _id 596 include/linux/mod_devicetable.h ((_id)>>15) & 1, ((_id)>>14) & 1, ((_id)>>13) & 1, ((_id)>>12) & 1, \ _id 597 include/linux/mod_devicetable.h ((_id)>>11) & 1, ((_id)>>10) & 1, ((_id)>>9) & 1, ((_id)>>8) & 1, \ _id 598 include/linux/mod_devicetable.h ((_id)>>7) & 1, ((_id)>>6) & 1, ((_id)>>5) & 1, ((_id)>>4) & 1, \ _id 599 include/linux/mod_devicetable.h ((_id)>>3) & 1, ((_id)>>2) & 1, ((_id)>>1) & 1, (_id) & 1 _id 1449 include/linux/perf_event.h #define PMU_EVENT_ATTR(_name, _var, _id, _show) \ _id 1452 include/linux/perf_event.h .id = _id, \ _id 1145 include/linux/regmap.h #define REGMAP_IRQ_REG_LINE(_id, _reg_bits) \ _id 1146 include/linux/regmap.h [_id] = { \ _id 1147 include/linux/regmap.h .mask = BIT((_id) % (_reg_bits)), \ _id 1148 include/linux/regmap.h .reg_offset = (_id) / (_reg_bits), \ _id 55 include/linux/regulator/ab8500.h #define INIT_REGULATOR_REGISTER(_id, _mask, _value) \ _id 57 include/linux/regulator/ab8500.h .id = _id, \ _id 200 include/linux/sh_clk.h #define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk } _id 201 include/linux/sh_clk.h #define CLKDEV_DEV_ID(_id, _clk) { .dev_id = _id, .clk = _clk } _id 438 include/net/devlink.h #define DEVLINK_PARAM_GENERIC(_id, _cmodes, _get, _set, _validate) \ _id 440 include/net/devlink.h .id = DEVLINK_PARAM_GENERIC_ID_##_id, \ _id 441 include/net/devlink.h .name = DEVLINK_PARAM_GENERIC_##_id##_NAME, \ _id 442 include/net/devlink.h .type = DEVLINK_PARAM_GENERIC_##_id##_TYPE, \ _id 450 include/net/devlink.h #define DEVLINK_PARAM_DRIVER(_id, _name, _type, _cmodes, _get, _set, _validate) \ _id 452 include/net/devlink.h .id = _id, \ _id 616 include/net/devlink.h #define DEVLINK_TRAP_GENERIC(_type, _init_action, _id, _group, _metadata_cap) \ _id 621 include/net/devlink.h .id = DEVLINK_TRAP_GENERIC_ID_##_id, \ _id 622 include/net/devlink.h .name = DEVLINK_TRAP_GENERIC_NAME_##_id, \ _id 627 include/net/devlink.h #define DEVLINK_TRAP_DRIVER(_type, _init_action, _id, _name, _group, \ _id 633 include/net/devlink.h .id = _id, \ _id 639 include/net/devlink.h #define DEVLINK_TRAP_GROUP_GENERIC(_id) \ _id 641 include/net/devlink.h .name = DEVLINK_TRAP_GROUP_GENERIC_NAME_##_id, \ _id 642 include/net/devlink.h .id = DEVLINK_TRAP_GROUP_GENERIC_ID_##_id, \ _id 46 include/rdma/uverbs_std_types.h #define _uobj_check_id(_id) ((_id) * typecheck(u32, _id)) _id 51 include/rdma/uverbs_std_types.h #define uobj_get_read(_type, _id, _attrs) \ _id 53 include/rdma/uverbs_std_types.h _uobj_check_id(_id), UVERBS_LOOKUP_READ, \ _id 67 include/rdma/uverbs_std_types.h #define uobj_get_obj_read(_object, _type, _id, _attrs) \ _id 69 include/rdma/uverbs_std_types.h uobj_get_read(_type, _id, _attrs))) _id 71 include/rdma/uverbs_std_types.h #define uobj_get_write(_type, _id, _attrs) \ _id 73 include/rdma/uverbs_std_types.h _uobj_check_id(_id), UVERBS_LOOKUP_WRITE, \ _id 78 include/rdma/uverbs_std_types.h #define uobj_perform_destroy(_type, _id, _attrs) \ _id 80 include/rdma/uverbs_std_types.h _uobj_check_id(_id), _attrs) _id 85 include/rdma/uverbs_std_types.h #define uobj_get_destroy(_type, _id, _attrs) \ _id 86 include/rdma/uverbs_std_types.h __uobj_get_destroy(uobj_get_type(_attrs, _type), _uobj_check_id(_id), \ _id 45 kernel/bpf/syscall.c #define BPF_PROG_TYPE(_id, _ops) _id 46 kernel/bpf/syscall.c #define BPF_MAP_TYPE(_id, _ops) \ _id 47 kernel/bpf/syscall.c [_id] = &_ops, _id 1196 kernel/bpf/syscall.c #define BPF_PROG_TYPE(_id, _name) \ _id 1197 kernel/bpf/syscall.c [_id] = & _name ## _prog_ops, _id 1198 kernel/bpf/syscall.c #define BPF_MAP_TYPE(_id, _ops) _id 26 kernel/bpf/verifier.c #define BPF_PROG_TYPE(_id, _name) \ _id 27 kernel/bpf/verifier.c [_id] = & _name ## _verifier_ops, _id 28 kernel/bpf/verifier.c #define BPF_MAP_TYPE(_id, _ops) _id 7539 net/core/devlink.c #define DEVLINK_TRAP(_id, _type) \ _id 7542 net/core/devlink.c .id = DEVLINK_TRAP_GENERIC_ID_##_id, \ _id 7543 net/core/devlink.c .name = DEVLINK_TRAP_GENERIC_NAME_##_id, \ _id 7558 net/core/devlink.c #define DEVLINK_TRAP_GROUP(_id) \ _id 7560 net/core/devlink.c .id = DEVLINK_TRAP_GROUP_GENERIC_ID_##_id, \ _id 7561 net/core/devlink.c .name = DEVLINK_TRAP_GROUP_GENERIC_NAME_##_id, \ _id 957 sound/core/control.c struct snd_ctl_elem_id __user *_id) _id 965 sound/core/control.c if (copy_from_user(&id, _id, sizeof(id))) _id 985 sound/core/control.c struct snd_ctl_elem_id __user *_id) _id 993 sound/core/control.c if (copy_from_user(&id, _id, sizeof(id))) _id 1376 sound/core/control.c struct snd_ctl_elem_id __user *_id) _id 1380 sound/core/control.c if (copy_from_user(&id, _id, sizeof(id))) _id 717 sound/pci/emu10k1/emufx.c struct snd_ctl_elem_id __user *_id; _id 722 sound/pci/emu10k1/emufx.c for (i = 0, _id = icode->gpr_del_controls; _id 723 sound/pci/emu10k1/emufx.c i < icode->gpr_del_control_count; i++, _id++) { _id 725 sound/pci/emu10k1/emufx.c id = *(__force struct snd_ctl_elem_id *)_id; _id 726 sound/pci/emu10k1/emufx.c else if (copy_from_user(&id, _id, sizeof(id))) _id 880 sound/pci/emu10k1/emufx.c struct snd_ctl_elem_id __user *_id; _id 884 sound/pci/emu10k1/emufx.c for (i = 0, _id = icode->gpr_del_controls; _id 885 sound/pci/emu10k1/emufx.c i < icode->gpr_del_control_count; i++, _id++) { _id 887 sound/pci/emu10k1/emufx.c id = *(__force struct snd_ctl_elem_id *)_id; _id 888 sound/pci/emu10k1/emufx.c else if (copy_from_user(&id, _id, sizeof(id)))