__vcpu_sys_reg 109 arch/arm64/kvm/sys_regs.c return __vcpu_sys_reg(vcpu, reg); __vcpu_sys_reg 152 arch/arm64/kvm/sys_regs.c __vcpu_sys_reg(vcpu, reg) = val; __vcpu_sys_reg 637 arch/arm64/kvm/sys_regs.c __vcpu_sys_reg(vcpu, r->reg) = val; __vcpu_sys_reg 642 arch/arm64/kvm/sys_regs.c u64 reg = __vcpu_sys_reg(vcpu, PMUSERENR_EL0); __vcpu_sys_reg 684 arch/arm64/kvm/sys_regs.c val = __vcpu_sys_reg(vcpu, PMCR_EL0); __vcpu_sys_reg 689 arch/arm64/kvm/sys_regs.c __vcpu_sys_reg(vcpu, PMCR_EL0) = val; __vcpu_sys_reg 694 arch/arm64/kvm/sys_regs.c val = __vcpu_sys_reg(vcpu, PMCR_EL0) __vcpu_sys_reg 712 arch/arm64/kvm/sys_regs.c __vcpu_sys_reg(vcpu, PMSELR_EL0) = p->regval; __vcpu_sys_reg 715 arch/arm64/kvm/sys_regs.c p->regval = __vcpu_sys_reg(vcpu, PMSELR_EL0) __vcpu_sys_reg 748 arch/arm64/kvm/sys_regs.c pmcr = __vcpu_sys_reg(vcpu, PMCR_EL0); __vcpu_sys_reg 773 arch/arm64/kvm/sys_regs.c idx = __vcpu_sys_reg(vcpu, PMSELR_EL0) __vcpu_sys_reg 828 arch/arm64/kvm/sys_regs.c idx = __vcpu_sys_reg(vcpu, PMSELR_EL0) & ARMV8_PMU_COUNTER_MASK; __vcpu_sys_reg 846 arch/arm64/kvm/sys_regs.c __vcpu_sys_reg(vcpu, reg) = p->regval & ARMV8_PMU_EVTYPE_MASK; __vcpu_sys_reg 849 arch/arm64/kvm/sys_regs.c p->regval = __vcpu_sys_reg(vcpu, reg) & ARMV8_PMU_EVTYPE_MASK; __vcpu_sys_reg 871 arch/arm64/kvm/sys_regs.c __vcpu_sys_reg(vcpu, PMCNTENSET_EL0) |= val; __vcpu_sys_reg 876 arch/arm64/kvm/sys_regs.c __vcpu_sys_reg(vcpu, PMCNTENSET_EL0) &= ~val; __vcpu_sys_reg 880 arch/arm64/kvm/sys_regs.c p->regval = __vcpu_sys_reg(vcpu, PMCNTENSET_EL0) & mask; __vcpu_sys_reg 904 arch/arm64/kvm/sys_regs.c __vcpu_sys_reg(vcpu, PMINTENSET_EL1) |= val; __vcpu_sys_reg 907 arch/arm64/kvm/sys_regs.c __vcpu_sys_reg(vcpu, PMINTENSET_EL1) &= ~val; __vcpu_sys_reg 909 arch/arm64/kvm/sys_regs.c p->regval = __vcpu_sys_reg(vcpu, PMINTENSET_EL1) & mask; __vcpu_sys_reg 929 arch/arm64/kvm/sys_regs.c __vcpu_sys_reg(vcpu, PMOVSSET_EL0) |= (p->regval & mask); __vcpu_sys_reg 932 arch/arm64/kvm/sys_regs.c __vcpu_sys_reg(vcpu, PMOVSSET_EL0) &= ~(p->regval & mask); __vcpu_sys_reg 934 arch/arm64/kvm/sys_regs.c p->regval = __vcpu_sys_reg(vcpu, PMOVSSET_EL0) & mask; __vcpu_sys_reg 971 arch/arm64/kvm/sys_regs.c __vcpu_sys_reg(vcpu, PMUSERENR_EL0) = __vcpu_sys_reg 974 arch/arm64/kvm/sys_regs.c p->regval = __vcpu_sys_reg(vcpu, PMUSERENR_EL0) __vcpu_sys_reg 2572 arch/arm64/kvm/sys_regs.c return reg_to_user(uaddr, &__vcpu_sys_reg(vcpu, r->reg), reg->id); __vcpu_sys_reg 2597 arch/arm64/kvm/sys_regs.c return reg_from_user(&__vcpu_sys_reg(vcpu, r->reg), uaddr, reg->id); __vcpu_sys_reg 91 arch/arm64/kvm/sys_regs.h __vcpu_sys_reg(vcpu, r->reg) = 0x1de7ec7edbadc0deULL; __vcpu_sys_reg 98 arch/arm64/kvm/sys_regs.h __vcpu_sys_reg(vcpu, r->reg) = r->val; __vcpu_sys_reg 36 arch/arm64/kvm/sys_regs_generic_v8.c __vcpu_sys_reg(vcpu, ACTLR_EL1) = read_sysreg(actlr_el1); __vcpu_sys_reg 29 virt/kvm/arm/pmu.c __vcpu_sys_reg(vcpu, PMCR_EL0) & ARMV8_PMU_PMCR_LC); __vcpu_sys_reg 94 virt/kvm/arm/pmu.c eventsel = __vcpu_sys_reg(vcpu, reg) & ARMV8_PMU_EVTYPE_EVENT; __vcpu_sys_reg 113 virt/kvm/arm/pmu.c counter = __vcpu_sys_reg(vcpu, reg); __vcpu_sys_reg 114 virt/kvm/arm/pmu.c counter_high = __vcpu_sys_reg(vcpu, reg + 1); __vcpu_sys_reg 120 virt/kvm/arm/pmu.c counter = __vcpu_sys_reg(vcpu, reg); __vcpu_sys_reg 168 virt/kvm/arm/pmu.c __vcpu_sys_reg(vcpu, reg) += (s64)val - kvm_pmu_get_counter_value(vcpu, select_idx); __vcpu_sys_reg 212 virt/kvm/arm/pmu.c __vcpu_sys_reg(vcpu, reg) = val; __vcpu_sys_reg 215 virt/kvm/arm/pmu.c __vcpu_sys_reg(vcpu, reg + 1) = upper_32_bits(counter); __vcpu_sys_reg 266 virt/kvm/arm/pmu.c u64 val = __vcpu_sys_reg(vcpu, PMCR_EL0) >> ARMV8_PMU_PMCR_N_SHIFT; __vcpu_sys_reg 288 virt/kvm/arm/pmu.c if (!(__vcpu_sys_reg(vcpu, PMCR_EL0) & ARMV8_PMU_PMCR_E) || !val) __vcpu_sys_reg 358 virt/kvm/arm/pmu.c if ((__vcpu_sys_reg(vcpu, PMCR_EL0) & ARMV8_PMU_PMCR_E)) { __vcpu_sys_reg 359 virt/kvm/arm/pmu.c reg = __vcpu_sys_reg(vcpu, PMOVSSET_EL0); __vcpu_sys_reg 360 virt/kvm/arm/pmu.c reg &= __vcpu_sys_reg(vcpu, PMCNTENSET_EL0); __vcpu_sys_reg 361 virt/kvm/arm/pmu.c reg &= __vcpu_sys_reg(vcpu, PMINTENSET_EL1); __vcpu_sys_reg 466 virt/kvm/arm/pmu.c __vcpu_sys_reg(vcpu, PMOVSSET_EL0) |= BIT(idx); __vcpu_sys_reg 486 virt/kvm/arm/pmu.c if (!(__vcpu_sys_reg(vcpu, PMCR_EL0) & ARMV8_PMU_PMCR_E)) __vcpu_sys_reg 490 virt/kvm/arm/pmu.c val &= __vcpu_sys_reg(vcpu, PMCNTENSET_EL0); __vcpu_sys_reg 499 virt/kvm/arm/pmu.c type = __vcpu_sys_reg(vcpu, PMEVTYPER0_EL0 + i); __vcpu_sys_reg 505 virt/kvm/arm/pmu.c reg = __vcpu_sys_reg(vcpu, PMEVCNTR0_EL0 + i) + 1; __vcpu_sys_reg 507 virt/kvm/arm/pmu.c __vcpu_sys_reg(vcpu, PMEVCNTR0_EL0 + i) = reg; __vcpu_sys_reg 514 virt/kvm/arm/pmu.c reg = __vcpu_sys_reg(vcpu, PMEVCNTR0_EL0 + i + 1) + 1; __vcpu_sys_reg 516 virt/kvm/arm/pmu.c __vcpu_sys_reg(vcpu, PMEVCNTR0_EL0 + i + 1) = reg; __vcpu_sys_reg 518 virt/kvm/arm/pmu.c __vcpu_sys_reg(vcpu, PMOVSSET_EL0) |= BIT(i + 1); __vcpu_sys_reg 521 virt/kvm/arm/pmu.c __vcpu_sys_reg(vcpu, PMOVSSET_EL0) |= BIT(i); __vcpu_sys_reg 539 virt/kvm/arm/pmu.c __vcpu_sys_reg(vcpu, PMCNTENSET_EL0) & mask); __vcpu_sys_reg 555 virt/kvm/arm/pmu.c return (__vcpu_sys_reg(vcpu, PMCR_EL0) & ARMV8_PMU_PMCR_E) && __vcpu_sys_reg 556 virt/kvm/arm/pmu.c (__vcpu_sys_reg(vcpu, PMCNTENSET_EL0) & BIT(select_idx)); __vcpu_sys_reg 581 virt/kvm/arm/pmu.c data = __vcpu_sys_reg(vcpu, reg); __vcpu_sys_reg 683 virt/kvm/arm/pmu.c __vcpu_sys_reg(vcpu, reg) = event_type;