__read_32bit_c0_register   20 arch/mips/include/asm/mipsmtregs.h #define read_c0_mvpcontrol()		__read_32bit_c0_register($0, 1)
__read_32bit_c0_register   23 arch/mips/include/asm/mipsmtregs.h #define read_c0_mvpconf0()		__read_32bit_c0_register($0, 2)
__read_32bit_c0_register   24 arch/mips/include/asm/mipsmtregs.h #define read_c0_mvpconf1()		__read_32bit_c0_register($0, 3)
__read_32bit_c0_register   26 arch/mips/include/asm/mipsmtregs.h #define read_c0_vpecontrol()		__read_32bit_c0_register($1, 1)
__read_32bit_c0_register   29 arch/mips/include/asm/mipsmtregs.h #define read_c0_vpeconf0()		__read_32bit_c0_register($1, 2)
__read_32bit_c0_register   32 arch/mips/include/asm/mipsmtregs.h #define read_c0_vpeconf1()		__read_32bit_c0_register($1, 3)
__read_32bit_c0_register   35 arch/mips/include/asm/mipsmtregs.h #define read_c0_tcstatus()		__read_32bit_c0_register($2, 1)
__read_32bit_c0_register   38 arch/mips/include/asm/mipsmtregs.h #define read_c0_tcbind()		__read_32bit_c0_register($2, 2)
__read_32bit_c0_register   42 arch/mips/include/asm/mipsmtregs.h #define read_c0_tccontext()		__read_32bit_c0_register($2, 5)
__read_32bit_c0_register 1437 arch/mips/include/asm/mipsregs.h 	(unsigned long) __read_32bit_c0_register(reg, sel) :		\
__read_32bit_c0_register 1582 arch/mips/include/asm/mipsregs.h #define read_c0_index()		__read_32bit_c0_register($0, 0)
__read_32bit_c0_register 1585 arch/mips/include/asm/mipsregs.h #define read_c0_random()	__read_32bit_c0_register($1, 0)
__read_32bit_c0_register 1600 arch/mips/include/asm/mipsregs.h #define read_c0_conf()		__read_32bit_c0_register($3, 0)
__read_32bit_c0_register 1603 arch/mips/include/asm/mipsregs.h #define read_c0_globalnumber()	__read_32bit_c0_register($3, 1)
__read_32bit_c0_register 1608 arch/mips/include/asm/mipsregs.h #define read_c0_contextconfig()		__read_32bit_c0_register($4, 1)
__read_32bit_c0_register 1617 arch/mips/include/asm/mipsregs.h #define read_c0_memorymapid()		__read_32bit_c0_register($4, 5)
__read_32bit_c0_register 1620 arch/mips/include/asm/mipsregs.h #define read_c0_pagemask()	__read_32bit_c0_register($5, 0)
__read_32bit_c0_register 1623 arch/mips/include/asm/mipsregs.h #define read_c0_pagegrain()	__read_32bit_c0_register($5, 1)
__read_32bit_c0_register 1626 arch/mips/include/asm/mipsregs.h #define read_c0_wired()		__read_32bit_c0_register($6, 0)
__read_32bit_c0_register 1629 arch/mips/include/asm/mipsregs.h #define read_c0_info()		__read_32bit_c0_register($7, 0)
__read_32bit_c0_register 1631 arch/mips/include/asm/mipsregs.h #define read_c0_cache()		__read_32bit_c0_register($7, 0) /* TX39xx */
__read_32bit_c0_register 1637 arch/mips/include/asm/mipsregs.h #define read_c0_badinstr()	__read_32bit_c0_register($8, 1)
__read_32bit_c0_register 1638 arch/mips/include/asm/mipsregs.h #define read_c0_badinstrp()	__read_32bit_c0_register($8, 2)
__read_32bit_c0_register 1640 arch/mips/include/asm/mipsregs.h #define read_c0_count()		__read_32bit_c0_register($9, 0)
__read_32bit_c0_register 1643 arch/mips/include/asm/mipsregs.h #define read_c0_count2()	__read_32bit_c0_register($9, 6) /* pnx8550 */
__read_32bit_c0_register 1646 arch/mips/include/asm/mipsregs.h #define read_c0_count3()	__read_32bit_c0_register($9, 7) /* pnx8550 */
__read_32bit_c0_register 1652 arch/mips/include/asm/mipsregs.h #define read_c0_guestctl1()	__read_32bit_c0_register($10, 4)
__read_32bit_c0_register 1655 arch/mips/include/asm/mipsregs.h #define read_c0_guestctl2()	__read_32bit_c0_register($10, 5)
__read_32bit_c0_register 1658 arch/mips/include/asm/mipsregs.h #define read_c0_guestctl3()	__read_32bit_c0_register($10, 6)
__read_32bit_c0_register 1661 arch/mips/include/asm/mipsregs.h #define read_c0_compare()	__read_32bit_c0_register($11, 0)
__read_32bit_c0_register 1664 arch/mips/include/asm/mipsregs.h #define read_c0_guestctl0ext()	__read_32bit_c0_register($11, 4)
__read_32bit_c0_register 1667 arch/mips/include/asm/mipsregs.h #define read_c0_compare2()	__read_32bit_c0_register($11, 6) /* pnx8550 */
__read_32bit_c0_register 1670 arch/mips/include/asm/mipsregs.h #define read_c0_compare3()	__read_32bit_c0_register($11, 7) /* pnx8550 */
__read_32bit_c0_register 1673 arch/mips/include/asm/mipsregs.h #define read_c0_status()	__read_32bit_c0_register($12, 0)
__read_32bit_c0_register 1677 arch/mips/include/asm/mipsregs.h #define read_c0_guestctl0()	__read_32bit_c0_register($12, 6)
__read_32bit_c0_register 1680 arch/mips/include/asm/mipsregs.h #define read_c0_gtoffset()	__read_32bit_c0_register($12, 7)
__read_32bit_c0_register 1683 arch/mips/include/asm/mipsregs.h #define read_c0_cause()		__read_32bit_c0_register($13, 0)
__read_32bit_c0_register 1693 arch/mips/include/asm/mipsregs.h #define read_c0_config()	__read_32bit_c0_register($16, 0)
__read_32bit_c0_register 1694 arch/mips/include/asm/mipsregs.h #define read_c0_config1()	__read_32bit_c0_register($16, 1)
__read_32bit_c0_register 1695 arch/mips/include/asm/mipsregs.h #define read_c0_config2()	__read_32bit_c0_register($16, 2)
__read_32bit_c0_register 1696 arch/mips/include/asm/mipsregs.h #define read_c0_config3()	__read_32bit_c0_register($16, 3)
__read_32bit_c0_register 1697 arch/mips/include/asm/mipsregs.h #define read_c0_config4()	__read_32bit_c0_register($16, 4)
__read_32bit_c0_register 1698 arch/mips/include/asm/mipsregs.h #define read_c0_config5()	__read_32bit_c0_register($16, 5)
__read_32bit_c0_register 1699 arch/mips/include/asm/mipsregs.h #define read_c0_config6()	__read_32bit_c0_register($16, 6)
__read_32bit_c0_register 1700 arch/mips/include/asm/mipsregs.h #define read_c0_config7()	__read_32bit_c0_register($16, 7)
__read_32bit_c0_register 1714 arch/mips/include/asm/mipsregs.h #define read_c0_maari()		__read_32bit_c0_register($17, 2)
__read_32bit_c0_register 1740 arch/mips/include/asm/mipsregs.h #define read_c0_watchhi0()	__read_32bit_c0_register($19, 0)
__read_32bit_c0_register 1741 arch/mips/include/asm/mipsregs.h #define read_c0_watchhi1()	__read_32bit_c0_register($19, 1)
__read_32bit_c0_register 1742 arch/mips/include/asm/mipsregs.h #define read_c0_watchhi2()	__read_32bit_c0_register($19, 2)
__read_32bit_c0_register 1743 arch/mips/include/asm/mipsregs.h #define read_c0_watchhi3()	__read_32bit_c0_register($19, 3)
__read_32bit_c0_register 1744 arch/mips/include/asm/mipsregs.h #define read_c0_watchhi4()	__read_32bit_c0_register($19, 4)
__read_32bit_c0_register 1745 arch/mips/include/asm/mipsregs.h #define read_c0_watchhi5()	__read_32bit_c0_register($19, 5)
__read_32bit_c0_register 1746 arch/mips/include/asm/mipsregs.h #define read_c0_watchhi6()	__read_32bit_c0_register($19, 6)
__read_32bit_c0_register 1747 arch/mips/include/asm/mipsregs.h #define read_c0_watchhi7()	__read_32bit_c0_register($19, 7)
__read_32bit_c0_register 1764 arch/mips/include/asm/mipsregs.h #define read_c0_framemask()	__read_32bit_c0_register($21, 0)
__read_32bit_c0_register 1767 arch/mips/include/asm/mipsregs.h #define read_c0_diag()		__read_32bit_c0_register($22, 0)
__read_32bit_c0_register 1774 arch/mips/include/asm/mipsregs.h #define read_c0_diag1()		__read_32bit_c0_register($22, 1)
__read_32bit_c0_register 1777 arch/mips/include/asm/mipsregs.h #define read_c0_diag2()		__read_32bit_c0_register($22, 2)
__read_32bit_c0_register 1780 arch/mips/include/asm/mipsregs.h #define read_c0_diag3()		__read_32bit_c0_register($22, 3)
__read_32bit_c0_register 1783 arch/mips/include/asm/mipsregs.h #define read_c0_diag4()		__read_32bit_c0_register($22, 4)
__read_32bit_c0_register 1786 arch/mips/include/asm/mipsregs.h #define read_c0_diag5()		__read_32bit_c0_register($22, 5)
__read_32bit_c0_register 1789 arch/mips/include/asm/mipsregs.h #define read_c0_debug()		__read_32bit_c0_register($23, 0)
__read_32bit_c0_register 1798 arch/mips/include/asm/mipsregs.h #define read_c0_perfctrl0()	__read_32bit_c0_register($25, 0)
__read_32bit_c0_register 1800 arch/mips/include/asm/mipsregs.h #define read_c0_perfcntr0()	__read_32bit_c0_register($25, 1)
__read_32bit_c0_register 1804 arch/mips/include/asm/mipsregs.h #define read_c0_perfctrl1()	__read_32bit_c0_register($25, 2)
__read_32bit_c0_register 1806 arch/mips/include/asm/mipsregs.h #define read_c0_perfcntr1()	__read_32bit_c0_register($25, 3)
__read_32bit_c0_register 1810 arch/mips/include/asm/mipsregs.h #define read_c0_perfctrl2()	__read_32bit_c0_register($25, 4)
__read_32bit_c0_register 1812 arch/mips/include/asm/mipsregs.h #define read_c0_perfcntr2()	__read_32bit_c0_register($25, 5)
__read_32bit_c0_register 1816 arch/mips/include/asm/mipsregs.h #define read_c0_perfctrl3()	__read_32bit_c0_register($25, 6)
__read_32bit_c0_register 1818 arch/mips/include/asm/mipsregs.h #define read_c0_perfcntr3()	__read_32bit_c0_register($25, 7)
__read_32bit_c0_register 1823 arch/mips/include/asm/mipsregs.h #define read_c0_ecc()		__read_32bit_c0_register($26, 0)
__read_32bit_c0_register 1829 arch/mips/include/asm/mipsregs.h #define read_c0_cacheerr()	__read_32bit_c0_register($27, 0)
__read_32bit_c0_register 1834 arch/mips/include/asm/mipsregs.h #define read_c0_taglo()		__read_32bit_c0_register($28, 0)
__read_32bit_c0_register 1837 arch/mips/include/asm/mipsregs.h #define read_c0_dtaglo()	__read_32bit_c0_register($28, 2)
__read_32bit_c0_register 1840 arch/mips/include/asm/mipsregs.h #define read_c0_ddatalo()	__read_32bit_c0_register($28, 3)
__read_32bit_c0_register 1843 arch/mips/include/asm/mipsregs.h #define read_c0_staglo()	__read_32bit_c0_register($28, 4)
__read_32bit_c0_register 1846 arch/mips/include/asm/mipsregs.h #define read_c0_taghi()		__read_32bit_c0_register($29, 0)
__read_32bit_c0_register 1853 arch/mips/include/asm/mipsregs.h #define read_c0_hwrena()	__read_32bit_c0_register($7, 0)
__read_32bit_c0_register 1856 arch/mips/include/asm/mipsregs.h #define read_c0_intctl()	__read_32bit_c0_register($12, 1)
__read_32bit_c0_register 1859 arch/mips/include/asm/mipsregs.h #define read_c0_srsctl()	__read_32bit_c0_register($12, 2)
__read_32bit_c0_register 1862 arch/mips/include/asm/mipsregs.h #define read_c0_srsmap()	__read_32bit_c0_register($12, 3)
__read_32bit_c0_register 1865 arch/mips/include/asm/mipsregs.h #define read_c0_ebase()		__read_32bit_c0_register($15, 1)
__read_32bit_c0_register 1875 arch/mips/include/asm/mipsregs.h #define read_c0_segctl0()	__read_32bit_c0_register($5, 2)
__read_32bit_c0_register 1878 arch/mips/include/asm/mipsregs.h #define read_c0_segctl1()	__read_32bit_c0_register($5, 3)
__read_32bit_c0_register 1881 arch/mips/include/asm/mipsregs.h #define read_c0_segctl2()	__read_32bit_c0_register($5, 4)
__read_32bit_c0_register 1894 arch/mips/include/asm/mipsregs.h #define read_c0_pwctl()		__read_32bit_c0_register($6, 6)
__read_32bit_c0_register 1930 arch/mips/include/asm/mipsregs.h #define read_c0_brcm_config_0()		__read_32bit_c0_register($22, 0)
__read_32bit_c0_register 1933 arch/mips/include/asm/mipsregs.h #define read_c0_brcm_bus_pll()		__read_32bit_c0_register($22, 4)
__read_32bit_c0_register 1936 arch/mips/include/asm/mipsregs.h #define read_c0_brcm_reset()		__read_32bit_c0_register($22, 5)
__read_32bit_c0_register 1940 arch/mips/include/asm/mipsregs.h #define read_c0_brcm_cmt_intr()		__read_32bit_c0_register($22, 1)
__read_32bit_c0_register 1943 arch/mips/include/asm/mipsregs.h #define read_c0_brcm_cmt_ctrl()		__read_32bit_c0_register($22, 2)
__read_32bit_c0_register 1946 arch/mips/include/asm/mipsregs.h #define read_c0_brcm_cmt_local()	__read_32bit_c0_register($22, 3)
__read_32bit_c0_register 1949 arch/mips/include/asm/mipsregs.h #define read_c0_brcm_config_1()		__read_32bit_c0_register($22, 5)
__read_32bit_c0_register 1952 arch/mips/include/asm/mipsregs.h #define read_c0_brcm_cbr()		__read_32bit_c0_register($22, 6)
__read_32bit_c0_register 1956 arch/mips/include/asm/mipsregs.h #define read_c0_brcm_config()		__read_32bit_c0_register($22, 0)
__read_32bit_c0_register 1959 arch/mips/include/asm/mipsregs.h #define read_c0_brcm_mode()		__read_32bit_c0_register($22, 1)
__read_32bit_c0_register 1962 arch/mips/include/asm/mipsregs.h #define read_c0_brcm_action()		__read_32bit_c0_register($22, 2)
__read_32bit_c0_register 1965 arch/mips/include/asm/mipsregs.h #define read_c0_brcm_edsp()		__read_32bit_c0_register($22, 3)
__read_32bit_c0_register 1968 arch/mips/include/asm/mipsregs.h #define read_c0_brcm_bootvec()		__read_32bit_c0_register($22, 4)
__read_32bit_c0_register 1971 arch/mips/include/asm/mipsregs.h #define read_c0_brcm_sleepcount()	__read_32bit_c0_register($22, 7)
__read_32bit_c0_register  144 arch/mips/include/asm/netlogic/mips-extns.h 	return __read_32bit_c0_register($15, 1) & 0x3ff;
__read_32bit_c0_register  153 arch/mips/include/asm/netlogic/mips-extns.h 		return (__read_32bit_c0_register($15, 1) >> 7) & 0x7;
__read_32bit_c0_register  155 arch/mips/include/asm/netlogic/mips-extns.h 		return (__read_32bit_c0_register($15, 1) >> 5) & 0x3;
__read_32bit_c0_register   39 arch/mips/loongson64/loongson-3/numa.c 	value = __read_32bit_c0_register($16, 3);
__read_32bit_c0_register   42 arch/mips/loongson64/loongson-3/numa.c 	value = __read_32bit_c0_register($16, 3);
__read_32bit_c0_register   45 arch/mips/loongson64/loongson-3/numa.c 	value = __read_32bit_c0_register($5, 1);
__read_32bit_c0_register   48 arch/mips/loongson64/loongson-3/numa.c 	value = __read_32bit_c0_register($5, 1);