__raw_writew 261 arch/alpha/include/asm/io.h extern void __raw_writew(u16 b, volatile void __iomem *addr); __raw_writew 439 arch/alpha/include/asm/io.h __raw_writew(b, addr); __raw_writew 507 arch/alpha/include/asm/io.h #define writew_relaxed(b, addr) __raw_writew(b, addr) __raw_writew 20 arch/alpha/include/asm/vga.h __raw_writew(val, (volatile u16 __iomem *) addr); __raw_writew 145 arch/alpha/kernel/io.c EXPORT_SYMBOL(__raw_writew); __raw_writew 186 arch/alpha/kernel/io.c __raw_writew(b, addr); __raw_writew 506 arch/alpha/kernel/io.c __raw_writew(*(const u16 *)from, to); __raw_writew 540 arch/alpha/kernel/io.c __raw_writew(c, to); __raw_writew 573 arch/alpha/kernel/io.c __raw_writew(c, to); __raw_writew 606 arch/alpha/kernel/io.c __raw_writew(tmp, iod++); __raw_writew 47 arch/arc/include/asm/io.h #define iowrite16be(v,p) ({ __iowmb(); __raw_writew((__force u16)cpu_to_be16(v), p); }) __raw_writew 141 arch/arc/include/asm/io.h #define __raw_writew __raw_writew __raw_writew 234 arch/arc/include/asm/io.h #define writew_relaxed(v,c) __raw_writew((__force u16) cpu_to_le16(v),c) __raw_writew 67 arch/arm/include/asm/io.h #define __raw_writew __raw_writew __raw_writew 253 arch/arm/include/asm/io.h #define outw(v,p) ({ __iowmb(); __raw_writew((__force __u16) \ __raw_writew 298 arch/arm/include/asm/io.h #define writew_relaxed(v,c) __raw_writew((__force u16) cpu_to_le16(v),c) __raw_writew 425 arch/arm/include/asm/io.h #define iowrite16be(v,p) ({ __iowmb(); __raw_writew((__force __u16)cpu_to_be16(v), p); }) __raw_writew 143 arch/arm/mach-ebsa110/io.c __raw_writew(val, a); __raw_writew 153 arch/arm/mach-ebsa110/io.c __raw_writew(val, a); __raw_writew 154 arch/arm/mach-ebsa110/io.c __raw_writew(val >> 16, a + 4); __raw_writew 336 arch/arm/mach-ebsa110/io.c __raw_writew(val, (void __iomem *)ISAIO_BASE + offset); __raw_writew 62 arch/arm/mach-ep93xx/snappercl15.c __raw_writew(nand_state, NAND_CTRL_ADDR(chip)); __raw_writew 66 arch/arm/mach-ep93xx/snappercl15.c __raw_writew((cmd & 0xff) | nand_state, __raw_writew 371 arch/arm/mach-ixp4xx/goramo_mlr.c __raw_writew(FLASH_CMD_READ_ID, flash); __raw_writew 378 arch/arm/mach-ixp4xx/goramo_mlr.c __raw_writew(FLASH_CMD_READ_ARRAY, flash); __raw_writew 109 arch/arm/mach-ixp4xx/include/mach/io.h __raw_writew(value, p); __raw_writew 484 arch/arm/mach-ixp4xx/include/mach/io.h __raw_writew(cpu_to_le16(value), addr); __raw_writew 681 arch/arm/mach-omap1/board-ams-delta.c __raw_writew(latch2, LATCH2_VIRT); __raw_writew 240 arch/arm/mach-omap1/clock.c __raw_writew(regval, DSP_CKCTL); __raw_writew 358 arch/arm/mach-omap1/clock.c __raw_writew(ratio_bits, clk->enable_reg); __raw_writew 398 arch/arm/mach-omap1/clock.c __raw_writew(ratio_bits, clk->enable_reg); __raw_writew 467 arch/arm/mach-omap1/clock.c __raw_writew(regval16, clk->enable_reg); __raw_writew 488 arch/arm/mach-omap1/clock.c __raw_writew(regval16, clk->enable_reg); __raw_writew 182 arch/arm/mach-omap1/dma.c __raw_writew(val, addr); __raw_writew 184 arch/arm/mach-omap1/dma.c __raw_writew(val >> 16, addr + 2); __raw_writew 171 arch/arm/mach-omap1/io.c __raw_writew(v, OMAP1_IO_ADDRESS(pa)); __raw_writew 54 arch/arm/mach-omap1/mcbsp.c __raw_writew(__raw_readw(DSP_RSTCT2) | DPS_RSTCT2_PER_EN | __raw_writew 301 arch/arm/mach-omap1/pm.c __raw_writew(0, DSP_IDLECT2); __raw_writew 152 arch/arm/mach-omap1/pm.h #define DSP_RESTORE(x) __raw_writew((dsp_sleep_save[DSP_SLEEP_SAVE_##x]), (x)) __raw_writew 310 arch/arm/mach-orion5x/pci.c __raw_writew(val, PCI_CONF_DATA + (where & 0x3)); __raw_writew 602 arch/arm/mach-pxa/balloon3.c __raw_writew( __raw_writew 608 arch/arm/mach-pxa/balloon3.c __raw_writew(BALLOON3_NAND_CONTROL_FLCE0 << chip, __raw_writew 622 arch/arm/mach-pxa/balloon3.c __raw_writew(BALLOON3_NAND_CONTROL2_16BIT, __raw_writew 100 arch/arm/mach-pxa/lpd270.c __raw_writew(~(1 << lpd270_irq), LPD270_INT_STATUS); __raw_writew 103 arch/arm/mach-pxa/lpd270.c __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK); __raw_writew 111 arch/arm/mach-pxa/lpd270.c __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK); __raw_writew 146 arch/arm/mach-pxa/lpd270.c __raw_writew(0, LPD270_INT_MASK); __raw_writew 147 arch/arm/mach-pxa/lpd270.c __raw_writew(0, LPD270_INT_STATUS); __raw_writew 163 arch/arm/mach-pxa/lpd270.c __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK); __raw_writew 90 arch/arm/mach-pxa/zeus.c __raw_writew(zeus_irq_to_bitmask(d->irq), ZEUS_CPLD_ISA_IRQ); __raw_writew 491 arch/arm/mach-pxa/zeus.c __raw_writew(cpld_state, ZEUS_CPLD_CONTROL); __raw_writew 30 arch/arm64/include/asm/io.h #define __raw_writew __raw_writew __raw_writew 125 arch/arm64/include/asm/io.h #define writew_relaxed(v,c) ((void)__raw_writew((__force u16)cpu_to_le16(v),(c))) __raw_writew 191 arch/arm64/include/asm/io.h #define iowrite16be(v,p) ({ __iowmb(); __raw_writew((__force __u16)cpu_to_be16(v), p); }) __raw_writew 35 arch/h8300/include/asm/io.h #define __raw_writew __raw_writew __raw_writew 171 arch/hexagon/include/asm/io.h #define writew_relaxed __raw_writew __raw_writew 62 arch/m68k/coldfire/dma_timer.c __raw_writew(DMA_DTMR_CLK_DIV_16 | DMA_DTMR_ENABLE, DTMR0); __raw_writew 172 arch/m68k/coldfire/intc-2.c __raw_writew(pa, MCFEPORT_EPPAR); __raw_writew 156 arch/m68k/coldfire/intc-simr.c __raw_writew(pa, MCFEPORT_EPPAR); __raw_writew 49 arch/m68k/coldfire/intc.c __raw_writew(imr | (0x1 << index), MCFSIM_IMR); __raw_writew 56 arch/m68k/coldfire/intc.c __raw_writew(imr & ~(0x1 << index), MCFSIM_IMR); __raw_writew 64 arch/m68k/coldfire/intc.c __raw_writew(imr, MCFSIM_IMR); __raw_writew 82 arch/m68k/coldfire/m5272.c __raw_writew(0, MCFSIM_WIRR); __raw_writew 83 arch/m68k/coldfire/m5272.c __raw_writew(1, MCFSIM_WRRR); __raw_writew 84 arch/m68k/coldfire/m5272.c __raw_writew(0, MCFSIM_WCR); __raw_writew 112 arch/m68k/coldfire/pci.c __raw_writew(cpu_to_le16(value), addr); __raw_writew 189 arch/m68k/coldfire/pci.c __raw_writew(0x3ff, MCFGPIO_PAR_PCIBG); __raw_writew 190 arch/m68k/coldfire/pci.c __raw_writew(0x3ff, MCFGPIO_PAR_PCIBR); __raw_writew 48 arch/m68k/coldfire/pit.c __raw_writew(MCFPIT_PCSR_DISABLE, TA(MCFPIT_PCSR)); __raw_writew 49 arch/m68k/coldfire/pit.c __raw_writew(PIT_CYCLES_PER_JIFFY, TA(MCFPIT_PMR)); __raw_writew 50 arch/m68k/coldfire/pit.c __raw_writew(MCFPIT_PCSR_EN | MCFPIT_PCSR_PIE | __raw_writew 58 arch/m68k/coldfire/pit.c __raw_writew(MCFPIT_PCSR_DISABLE, TA(MCFPIT_PCSR)); __raw_writew 59 arch/m68k/coldfire/pit.c __raw_writew(MCFPIT_PCSR_EN | MCFPIT_PCSR_PIE | __raw_writew 66 arch/m68k/coldfire/pit.c __raw_writew(MCFPIT_PCSR_DISABLE, TA(MCFPIT_PCSR)); __raw_writew 78 arch/m68k/coldfire/pit.c __raw_writew(delta, TA(MCFPIT_PMR)); __raw_writew 105 arch/m68k/coldfire/pit.c __raw_writew(pcsr | MCFPIT_PCSR_PIF, TA(MCFPIT_PCSR)); __raw_writew 45 arch/m68k/coldfire/timers.c #define __raw_writetrr __raw_writew __raw_writew 121 arch/m68k/coldfire/timers.c __raw_writew(MCFTIMER_TMR_DISABLE, TA(MCFTIMER_TMR)); __raw_writew 130 arch/m68k/coldfire/timers.c __raw_writew(MCFTIMER_TMR_ENORI | MCFTIMER_TMR_CLK16 | __raw_writew 185 arch/m68k/coldfire/timers.c __raw_writew(MCFTIMER_TMR_DISABLE, PA(MCFTIMER_TMR)); __raw_writew 188 arch/m68k/coldfire/timers.c __raw_writew(MCFTIMER_TMR_ENORI | MCFTIMER_TMR_CLK16 | __raw_writew 85 arch/m68k/include/asm/io_no.h __raw_writew(value, addr); __raw_writew 87 arch/m68k/include/asm/io_no.h __raw_writew(__cpu_to_le16(value), addr); __raw_writew 105 arch/m68k/include/asm/io_no.h #define writew __raw_writew __raw_writew 116 arch/m68k/include/asm/mcfgpio.h #define mcfgpio_write(data, port) __raw_writew(data, port) __raw_writew 50 arch/microblaze/include/asm/io.h #define out_be16(a, v) __raw_writew((v), (a)) __raw_writew 60 arch/microblaze/include/asm/io.h #define out_le16(a, v) __raw_writew(__cpu_to_le16(v), (a)) __raw_writew 67 arch/mips/alchemy/devboards/bcsr.c __raw_writew(val, bcsr_regs[reg].raddr); __raw_writew 82 arch/mips/alchemy/devboards/bcsr.c __raw_writew(r, bcsr_regs[reg].raddr); __raw_writew 104 arch/mips/alchemy/devboards/bcsr.c __raw_writew(v, bcsr_virt + BCSR_REG_MASKCLR); __raw_writew 111 arch/mips/alchemy/devboards/bcsr.c __raw_writew(v, bcsr_virt + BCSR_REG_MASKCLR); __raw_writew 112 arch/mips/alchemy/devboards/bcsr.c __raw_writew(v, bcsr_virt + BCSR_REG_INTSTAT); /* ack */ __raw_writew 119 arch/mips/alchemy/devboards/bcsr.c __raw_writew(v, bcsr_virt + BCSR_REG_MASKSET); __raw_writew 135 arch/mips/alchemy/devboards/bcsr.c __raw_writew(0xffff, bcsr_virt + BCSR_REG_MASKCLR); __raw_writew 136 arch/mips/alchemy/devboards/bcsr.c __raw_writew(0xffff, bcsr_virt + BCSR_REG_INTSET); __raw_writew 137 arch/mips/alchemy/devboards/bcsr.c __raw_writew(0xffff, bcsr_virt + BCSR_REG_INTSTAT); __raw_writew 506 arch/mips/include/asm/io.h __raw_writew(cpu_to_be16((val)), (__force unsigned *)(addr)) __raw_writew 126 arch/mips/pci/ops-tx4927.c __raw_writew(val, (void __iomem *)&pcicptr->g2pcfgdata + offset); __raw_writew 322 arch/mips/txx9/rbtx4939/setup.c __raw_writew(datum.x[0], map->virt + ofs); __raw_writew 16 arch/nds32/include/asm/io.h #define __raw_writew __raw_writew __raw_writew 68 arch/nds32/include/asm/io.h #define writew_relaxed(v,c) ((void)__raw_writew((__force u16)cpu_to_le16(v),(c))) __raw_writew 43 arch/parisc/include/asm/ide.h __raw_writew(*(u16 *)addr, port); __raw_writew 203 arch/parisc/include/asm/io.h __raw_writew((__u16 __force) cpu_to_le16(w), addr); __raw_writew 200 arch/parisc/lib/iomap.c __raw_writew(datum, addr); __raw_writew 258 arch/parisc/lib/iomap.c __raw_writew(*(u16 *)s, addr); __raw_writew 38 arch/riscv/include/asm/io.h #define __raw_writew __raw_writew __raw_writew 106 arch/riscv/include/asm/io.h #define writew_cpu(v,c) ((void)__raw_writew((__force u16)cpu_to_le16(v),(c))) __raw_writew 100 arch/sh/boards/board-magicpanelr2.c __raw_writew(0x5555, PORT_PACR); /* 01 01 01 01 01 01 01 01 */ __raw_writew 105 arch/sh/boards/board-magicpanelr2.c __raw_writew(0x5555, PORT_PBCR); /* 01 01 01 01 01 01 01 01 */ __raw_writew 110 arch/sh/boards/board-magicpanelr2.c __raw_writew(0x5500, PORT_PCCR); /* 01 01 01 01 00 00 00 00 */ __raw_writew 115 arch/sh/boards/board-magicpanelr2.c __raw_writew(0x5555, PORT_PDCR); /* 01 01 01 01 01 01 01 01 */ __raw_writew 120 arch/sh/boards/board-magicpanelr2.c __raw_writew(0x3C00, PORT_PECR); /* 00 11 11 00 00 00 00 00 */ __raw_writew 125 arch/sh/boards/board-magicpanelr2.c __raw_writew(0x0002, PORT_PFCR); /* 00 00 00 00 00 00 00 10 */ __raw_writew 130 arch/sh/boards/board-magicpanelr2.c __raw_writew(0x03D5, PORT_PGCR); /* 00 00 00 11 11 01 01 01 */ __raw_writew 135 arch/sh/boards/board-magicpanelr2.c __raw_writew(0x0050, PORT_PHCR); /* 00 00 00 00 01 01 00 00 */ __raw_writew 140 arch/sh/boards/board-magicpanelr2.c __raw_writew(0x0000, PORT_PJCR); /* 00 00 00 00 00 00 00 00 */ __raw_writew 145 arch/sh/boards/board-magicpanelr2.c __raw_writew(0x00FF, PORT_PKCR); /* 00 00 00 00 11 11 11 11 */ __raw_writew 150 arch/sh/boards/board-magicpanelr2.c __raw_writew(0x0000, PORT_PLCR); /* 00 00 00 00 00 00 00 00 */ __raw_writew 156 arch/sh/boards/board-magicpanelr2.c __raw_writew(0x5552, PORT_PMCR); /* 01 01 01 01 01 01 00 10 */ __raw_writew 173 arch/sh/boards/board-magicpanelr2.c __raw_writew(0x0100, PORT_PPCR); /* 00 00 00 01 00 00 00 00 */ __raw_writew 191 arch/sh/boards/board-magicpanelr2.c __raw_writew(0x0140, PORT_PSCR); /* 00 00 00 01 01 00 00 00 */ __raw_writew 196 arch/sh/boards/board-magicpanelr2.c __raw_writew(0x0001, PORT_PTCR); /* 00 00 00 00 00 00 00 01 */ __raw_writew 201 arch/sh/boards/board-magicpanelr2.c __raw_writew(0x0240, PORT_PUCR); /* 00 00 00 10 01 00 00 00 */ __raw_writew 206 arch/sh/boards/board-magicpanelr2.c __raw_writew(0x0142, PORT_PVCR); /* 00 00 00 01 01 00 00 10 */ __raw_writew 215 arch/sh/boards/board-magicpanelr2.c __raw_writew(0xAABC, PORT_PSELA); __raw_writew 220 arch/sh/boards/board-magicpanelr2.c __raw_writew(0x3C00, PORT_PSELB); __raw_writew 224 arch/sh/boards/board-magicpanelr2.c __raw_writew(0x0000, PORT_PSELC); __raw_writew 228 arch/sh/boards/board-magicpanelr2.c __raw_writew(0x0000, PORT_PSELD); __raw_writew 230 arch/sh/boards/board-magicpanelr2.c __raw_writew(0x0101, PORT_UTRCTL); __raw_writew 232 arch/sh/boards/board-magicpanelr2.c __raw_writew(0xA5C0, PORT_UCLKCR_W); __raw_writew 106 arch/sh/boards/board-polaris.c __raw_writew(wcr, WCR2); __raw_writew 111 arch/sh/boards/board-polaris.c __raw_writew(bcr_mask, BCR2); __raw_writew 142 arch/sh/boards/board-polaris.c __raw_writew(0, BCR_ILCRA); __raw_writew 143 arch/sh/boards/board-polaris.c __raw_writew(0, BCR_ILCRB); __raw_writew 144 arch/sh/boards/board-polaris.c __raw_writew(0, BCR_ILCRC); __raw_writew 145 arch/sh/boards/board-polaris.c __raw_writew(0, BCR_ILCRD); __raw_writew 146 arch/sh/boards/board-polaris.c __raw_writew(0, BCR_ILCRE); __raw_writew 147 arch/sh/boards/board-polaris.c __raw_writew(0, BCR_ILCRF); __raw_writew 148 arch/sh/boards/board-polaris.c __raw_writew(0, BCR_ILCRG); __raw_writew 21 arch/sh/boards/board-shmin.c __raw_writew(0x2a00, PFC_PHCR); // IRQ0-3=IRQ __raw_writew 22 arch/sh/boards/board-shmin.c __raw_writew(0x0aaa, INTC_ICR1); // IRQ0-3=IRQ-mode,Low-active. __raw_writew 155 arch/sh/boards/board-urquell.c __raw_writew(__raw_readw(UBOARDREG(IRL2MSKR)) & ~0x00000001, __raw_writew 165 arch/sh/boards/board-urquell.c __raw_writew(0xa5a5, UBOARDREG(SRSTR)); __raw_writew 178 arch/sh/boards/mach-ap325rxa/setup.c __raw_writew(0x100, FPGA_BKLREG); __raw_writew 180 arch/sh/boards/mach-ap325rxa/setup.c __raw_writew(0, FPGA_BKLREG); __raw_writew 192 arch/sh/boards/mach-ap325rxa/setup.c __raw_writew(FPGA_LCDREG_VAL, FPGA_LCDREG); __raw_writew 198 arch/sh/boards/mach-ap325rxa/setup.c __raw_writew(0, FPGA_LCDREG); __raw_writew 478 arch/sh/boards/mach-ap325rxa/setup.c __raw_writew(__raw_readw(PORT_MSELCRB) & ~0x0001, PORT_MSELCRB); __raw_writew 496 arch/sh/boards/mach-ap325rxa/setup.c __raw_writew(0, PORT_HIZCRC); __raw_writew 497 arch/sh/boards/mach-ap325rxa/setup.c __raw_writew(0xFFFF, PORT_DRVCRA); __raw_writew 498 arch/sh/boards/mach-ap325rxa/setup.c __raw_writew(0xFFFF, PORT_DRVCRB); __raw_writew 1121 arch/sh/boards/mach-ecovec24/setup.c __raw_writew((__raw_readw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA); __raw_writew 1141 arch/sh/boards/mach-ecovec24/setup.c __raw_writew(0x0000, 0xA4D80000); __raw_writew 1142 arch/sh/boards/mach-ecovec24/setup.c __raw_writew(0x0000, 0xA4D90000); __raw_writew 1149 arch/sh/boards/mach-ecovec24/setup.c __raw_writew(0x0600, 0xa40501d4); __raw_writew 1150 arch/sh/boards/mach-ecovec24/setup.c __raw_writew(0x0600, 0xa4050192); __raw_writew 1191 arch/sh/boards/mach-ecovec24/setup.c __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA); __raw_writew 1201 arch/sh/boards/mach-ecovec24/setup.c __raw_writew((__raw_readw(IODRIVEA) & ~0x00c0) | 0x0080 , IODRIVEA); __raw_writew 1344 arch/sh/boards/mach-ecovec24/setup.c __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000, __raw_writew 71 arch/sh/boards/mach-highlander/irq-r7785rp.c __raw_writew(0x0000, PA_IRLSSR1); /* FPGA IRLSSR1(CF_CD clear) */ __raw_writew 74 arch/sh/boards/mach-highlander/irq-r7785rp.c __raw_writew(0x0000, PA_IRLPRA); /* FPGA IRLA */ __raw_writew 75 arch/sh/boards/mach-highlander/irq-r7785rp.c __raw_writew(0xe598, PA_IRLPRB); /* FPGA IRLB */ __raw_writew 76 arch/sh/boards/mach-highlander/irq-r7785rp.c __raw_writew(0x7060, PA_IRLPRC); /* FPGA IRLC */ __raw_writew 77 arch/sh/boards/mach-highlander/irq-r7785rp.c __raw_writew(0x0000, PA_IRLPRD); /* FPGA IRLD */ __raw_writew 78 arch/sh/boards/mach-highlander/irq-r7785rp.c __raw_writew(0x4321, PA_IRLPRE); /* FPGA IRLE */ __raw_writew 79 arch/sh/boards/mach-highlander/irq-r7785rp.c __raw_writew(0xdcba, PA_IRLPRF); /* FPGA IRLF */ __raw_writew 45 arch/sh/boards/mach-highlander/psw.c __raw_writew(l, PA_DBSW); __raw_writew 313 arch/sh/boards/mach-highlander/setup.c __raw_writew(__raw_readw(PA_IVDRCTL) | (1 << IVDR_CK_ON), PA_IVDRCTL); __raw_writew 319 arch/sh/boards/mach-highlander/setup.c __raw_writew(__raw_readw(PA_IVDRCTL) & ~(1 << IVDR_CK_ON), PA_IVDRCTL); __raw_writew 343 arch/sh/boards/mach-highlander/setup.c __raw_writew(0x0001, PA_POFF); __raw_writew 378 arch/sh/boards/mach-highlander/setup.c __raw_writew(0x0000, PA_OBLED); /* Clear LED. */ __raw_writew 381 arch/sh/boards/mach-highlander/setup.c __raw_writew(0x0001, PA_SDPOW); /* SD Power ON */ __raw_writew 383 arch/sh/boards/mach-highlander/setup.c __raw_writew(__raw_readw(PA_IVDRCTL) | 0x01, PA_IVDRCTL); /* Si13112 */ __raw_writew 57 arch/sh/boards/mach-hp6xx/pm.c __raw_writew(frqcr, FRQCR); __raw_writew 65 arch/sh/boards/mach-hp6xx/pm.c __raw_writew(mcr & ~MCR_RFSH, MCR); __raw_writew 75 arch/sh/boards/mach-hp6xx/pm.c __raw_writew(0, RTCNT); __raw_writew 76 arch/sh/boards/mach-hp6xx/pm.c __raw_writew(mcr | MCR_RFSH | MCR_RMODE, MCR); __raw_writew 87 arch/sh/boards/mach-hp6xx/pm.c __raw_writew(frqcr, FRQCR); __raw_writew 90 arch/sh/boards/mach-hp6xx/pm.c __raw_writew(frqcr, FRQCR); __raw_writew 163 arch/sh/boards/mach-hp6xx/setup.c __raw_writew(v, SCPCR); __raw_writew 462 arch/sh/boards/mach-kfr2r09/setup.c __raw_writew((__raw_readw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB); __raw_writew 468 arch/sh/boards/mach-kfr2r09/setup.c __raw_writew(0x0600, 0xa40501d4); __raw_writew 596 arch/sh/boards/mach-kfr2r09/setup.c __raw_writew((__raw_readw(DRVCRB) & ~0x0003) | 0x0001, DRVCRB); __raw_writew 82 arch/sh/boards/mach-landisk/gio.c __raw_writew((unsigned short int)(0x0ffff & data), addr); __raw_writew 568 arch/sh/boards/mach-migor/setup.c __raw_writew(__raw_readw(PORT_MSELCRB) | 0x2000, PORT_MSELCRB); /* D15->D8 */ __raw_writew 581 arch/sh/boards/mach-migor/setup.c __raw_writew(__raw_readw(PORT_MSELCRA) | 1, PORT_MSELCRA); __raw_writew 70 arch/sh/boards/mach-r2d/setup.c __raw_writew(state == BITBANG_CS_ACTIVE, PA_RTCCE); __raw_writew 262 arch/sh/boards/mach-r2d/setup.c __raw_writew(0x0001, PA_POWOFF); __raw_writew 278 arch/sh/boards/mach-r2d/setup.c __raw_writew(0x0000, PA_OUTPORT); __raw_writew 37 arch/sh/boards/mach-sdk7780/irq.c __raw_writew(0xFFFF, FPGA_IRQ0MR); __raw_writew 39 arch/sh/boards/mach-sdk7780/irq.c __raw_writew(0x0003, FPGA_IMSR); __raw_writew 85 arch/sh/boards/mach-sdk7780/setup.c __raw_writew(0x0000, GPIO_PECR); __raw_writew 39 arch/sh/boards/mach-se/7206/irq.c __raw_writew(val, INTC_IPR01); __raw_writew 56 arch/sh/boards/mach-se/7206/irq.c __raw_writew(msk0, INTMSK0); __raw_writew 57 arch/sh/boards/mach-se/7206/irq.c __raw_writew(msk1, INTMSK1); __raw_writew 70 arch/sh/boards/mach-se/7206/irq.c __raw_writew(val, INTC_IPR01); __raw_writew 88 arch/sh/boards/mach-se/7206/irq.c __raw_writew(msk0, INTMSK0); __raw_writew 89 arch/sh/boards/mach-se/7206/irq.c __raw_writew(msk1, INTMSK1); __raw_writew 115 arch/sh/boards/mach-se/7206/irq.c __raw_writew(sts0, INTSTS0); __raw_writew 116 arch/sh/boards/mach-se/7206/irq.c __raw_writew(sts1, INTSTS1); __raw_writew 143 arch/sh/boards/mach-se/7206/irq.c __raw_writew(__raw_readw(INTC_ICR1) | 0x000b, INTC_ICR1); /* ICR1 */ __raw_writew 146 arch/sh/boards/mach-se/7206/irq.c __raw_writew(0x0000,INTSTS0); /* Clear INTSTS0 */ __raw_writew 147 arch/sh/boards/mach-se/7206/irq.c __raw_writew(0x0000,INTSTS1); /* Clear INTSTS1 */ __raw_writew 150 arch/sh/boards/mach-se/7206/irq.c __raw_writew(0x0001,INTSEL); __raw_writew 119 arch/sh/boards/mach-se/7343/irq.c __raw_writew(0x2000, 0xb03fffec); /* mrshpc irq enable */ __raw_writew 167 arch/sh/boards/mach-se/7343/setup.c __raw_writew(0xf900, FPGA_OUT); /* FPGA */ __raw_writew 169 arch/sh/boards/mach-se/7343/setup.c __raw_writew(0x0002, PORT_PECR); /* PORT E 1 = IRQ5 */ __raw_writew 170 arch/sh/boards/mach-se/7343/setup.c __raw_writew(0x0020, PORT_PSELD); __raw_writew 100 arch/sh/boards/mach-se/770x/irq.c __raw_writew(0, BCR_ILCRA); __raw_writew 101 arch/sh/boards/mach-se/770x/irq.c __raw_writew(0, BCR_ILCRB); __raw_writew 102 arch/sh/boards/mach-se/770x/irq.c __raw_writew(0, BCR_ILCRC); __raw_writew 103 arch/sh/boards/mach-se/770x/irq.c __raw_writew(0, BCR_ILCRD); __raw_writew 104 arch/sh/boards/mach-se/770x/irq.c __raw_writew(0, BCR_ILCRE); __raw_writew 105 arch/sh/boards/mach-se/770x/irq.c __raw_writew(0, BCR_ILCRF); __raw_writew 106 arch/sh/boards/mach-se/770x/irq.c __raw_writew(0, BCR_ILCRG); __raw_writew 38 arch/sh/boards/mach-se/7721/irq.c __raw_writew(__raw_readw(0xa4050118) & ~0x00ff, 0xa4050118); __raw_writew 79 arch/sh/boards/mach-se/7721/setup.c __raw_writew(0x0000, 0xA405010C); /* PGCR */ __raw_writew 80 arch/sh/boards/mach-se/7721/setup.c __raw_writew(0x0000, 0xA405010E); /* PHCR */ __raw_writew 81 arch/sh/boards/mach-se/7721/setup.c __raw_writew(0x00AA, 0xA4050118); /* PPCR */ __raw_writew 82 arch/sh/boards/mach-se/7721/setup.c __raw_writew(0x0000, 0xA4050124); /* PSELA */ __raw_writew 112 arch/sh/boards/mach-se/7722/irq.c __raw_writew(0x2000, 0xb03fffec); /* mrshpc irq enable */ __raw_writew 155 arch/sh/boards/mach-se/7722/setup.c __raw_writew(0x010D, FPGA_OUT); /* FPGA */ __raw_writew 157 arch/sh/boards/mach-se/7722/setup.c __raw_writew(0x0000, PORT_PECR); /* PORT E 1 = IRQ5 ,E 0 = BS */ __raw_writew 158 arch/sh/boards/mach-se/7722/setup.c __raw_writew(0x1000, PORT_PJCR); /* PORT J 1 = IRQ1,J 0 =IRQ0 */ __raw_writew 161 arch/sh/boards/mach-se/7722/setup.c __raw_writew(0x0020, PORT_PSELD); __raw_writew 164 arch/sh/boards/mach-se/7722/setup.c __raw_writew(0x0003, PORT_PSELB); __raw_writew 165 arch/sh/boards/mach-se/7722/setup.c __raw_writew(0xe000, PORT_PSELC); __raw_writew 166 arch/sh/boards/mach-se/7722/setup.c __raw_writew(0x0000, PORT_PKCR); __raw_writew 169 arch/sh/boards/mach-se/7722/setup.c __raw_writew(0x4020, PORT_PHCR); __raw_writew 170 arch/sh/boards/mach-se/7722/setup.c __raw_writew(0x0000, PORT_PLCR); __raw_writew 171 arch/sh/boards/mach-se/7722/setup.c __raw_writew(0x0000, PORT_PMCR); __raw_writew 172 arch/sh/boards/mach-se/7722/setup.c __raw_writew(0x0002, PORT_PRCR); __raw_writew 173 arch/sh/boards/mach-se/7722/setup.c __raw_writew(0x0000, PORT_PXCR); /* LCDC,CS6A */ __raw_writew 176 arch/sh/boards/mach-se/7722/setup.c __raw_writew(0x0A10, PORT_PSELA); /* BS,SHHID2 */ __raw_writew 177 arch/sh/boards/mach-se/7722/setup.c __raw_writew(0x0000, PORT_PYCR); __raw_writew 178 arch/sh/boards/mach-se/7722/setup.c __raw_writew(0x0000, PORT_PZCR); __raw_writew 179 arch/sh/boards/mach-se/7722/setup.c __raw_writew(__raw_readw(PORT_HIZCRA) & ~0x4000, PORT_HIZCRA); __raw_writew 180 arch/sh/boards/mach-se/7722/setup.c __raw_writew(__raw_readw(PORT_HIZCRC) & ~0xc000, PORT_HIZCRC); __raw_writew 75 arch/sh/boards/mach-se/7724/irq.c __raw_writew(__raw_readw(set.mraddr) | 0x0001 << bit, set.mraddr); __raw_writew 83 arch/sh/boards/mach-se/7724/irq.c __raw_writew(__raw_readw(set.mraddr) & ~(0x0001 << bit), set.mraddr); __raw_writew 116 arch/sh/boards/mach-se/7724/irq.c __raw_writew(0xffff, IRQ0_MR); /* mask all */ __raw_writew 117 arch/sh/boards/mach-se/7724/irq.c __raw_writew(0xffff, IRQ1_MR); /* mask all */ __raw_writew 118 arch/sh/boards/mach-se/7724/irq.c __raw_writew(0xffff, IRQ2_MR); /* mask all */ __raw_writew 119 arch/sh/boards/mach-se/7724/irq.c __raw_writew(0x0000, IRQ0_SR); /* clear irq */ __raw_writew 120 arch/sh/boards/mach-se/7724/irq.c __raw_writew(0x0000, IRQ1_SR); /* clear irq */ __raw_writew 121 arch/sh/boards/mach-se/7724/irq.c __raw_writew(0x0000, IRQ2_SR); /* clear irq */ __raw_writew 122 arch/sh/boards/mach-se/7724/irq.c __raw_writew(0x002a, IRQ_MODE); /* set irq type */ __raw_writew 637 arch/sh/boards/mach-se/7724/setup.c __raw_writew(0x0, EEPROM_OP); /* read */ __raw_writew 638 arch/sh/boards/mach-se/7724/setup.c __raw_writew(i*2, EEPROM_ADR); __raw_writew 639 arch/sh/boards/mach-se/7724/setup.c __raw_writew(0x1, EEPROM_STRT); __raw_writew 705 arch/sh/boards/mach-se/7724/setup.c __raw_writew(fpga_out | (1 << 4), FPGA_OUT); __raw_writew 710 arch/sh/boards/mach-se/7724/setup.c __raw_writew(fpga_out | (1 << 5), FPGA_OUT); __raw_writew 714 arch/sh/boards/mach-se/7724/setup.c __raw_writew(fpga_out, FPGA_OUT); __raw_writew 717 arch/sh/boards/mach-se/7724/setup.c __raw_writew((__raw_readw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB); __raw_writew 729 arch/sh/boards/mach-se/7724/setup.c __raw_writew(0x0600, 0xa40501d4); __raw_writew 732 arch/sh/boards/mach-se/7724/setup.c __raw_writew(0x0600, 0xa4050192); __raw_writew 780 arch/sh/boards/mach-se/7724/setup.c __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA); __raw_writew 24 arch/sh/boards/mach-se/7780/irq.c __raw_writew(0, FPGA_INTMSK1); __raw_writew 26 arch/sh/boards/mach-se/7780/irq.c __raw_writew((__raw_readw(FPGA_INTMSK1) | 0x0002), FPGA_INTMSK1); __raw_writew 28 arch/sh/boards/mach-se/7780/irq.c __raw_writew(0, FPGA_INTMSK2); __raw_writew 32 arch/sh/boards/mach-se/7780/irq.c __raw_writew( ((IRQPIN_SM501 << IRQPOS_SM501) | __raw_writew 36 arch/sh/boards/mach-se/7780/irq.c __raw_writew(((IRQPIN_EXTINT4 << IRQPOS_EXTINT4) | __raw_writew 42 arch/sh/boards/mach-se/7780/irq.c __raw_writew((IRQPIN_PCCPW << IRQPOS_PCCPW), FPGA_INTSEL3); __raw_writew 63 arch/sh/boards/mach-se/7780/irq.c __raw_writew(0x0013, FPGA_PCI_INTSEL1); __raw_writew 64 arch/sh/boards/mach-se/7780/irq.c __raw_writew(0xE402, FPGA_PCI_INTSEL2); __raw_writew 75 arch/sh/boards/mach-se/7780/setup.c __raw_writew( 'S' , PA_LED_DISP + (DISP_SEL0_ADDR << 1) ); __raw_writew 76 arch/sh/boards/mach-se/7780/setup.c __raw_writew( 'H' , PA_LED_DISP + (DISP_SEL1_ADDR << 1) ); __raw_writew 77 arch/sh/boards/mach-se/7780/setup.c __raw_writew( '-' , PA_LED_DISP + (DISP_SEL2_ADDR << 1) ); __raw_writew 78 arch/sh/boards/mach-se/7780/setup.c __raw_writew( 'L' , PA_LED_DISP + (DISP_SEL3_ADDR << 1) ); __raw_writew 79 arch/sh/boards/mach-se/7780/setup.c __raw_writew( 'i' , PA_LED_DISP + (DISP_SEL4_ADDR << 1) ); __raw_writew 80 arch/sh/boards/mach-se/7780/setup.c __raw_writew( 'n' , PA_LED_DISP + (DISP_SEL5_ADDR << 1) ); __raw_writew 81 arch/sh/boards/mach-se/7780/setup.c __raw_writew( 'u' , PA_LED_DISP + (DISP_SEL6_ADDR << 1) ); __raw_writew 82 arch/sh/boards/mach-se/7780/setup.c __raw_writew( 'x' , PA_LED_DISP + (DISP_SEL7_ADDR << 1) ); __raw_writew 93 arch/sh/boards/mach-se/7780/setup.c __raw_writew(0x0213, FPGA_REQSEL); __raw_writew 96 arch/sh/boards/mach-se/7780/setup.c __raw_writew(0x0000, GPIO_PECR); __raw_writew 97 arch/sh/boards/mach-se/7780/setup.c __raw_writew(__raw_readw(GPIO_PHCR)&0xfff3, GPIO_PHCR); __raw_writew 98 arch/sh/boards/mach-se/7780/setup.c __raw_writew(0x0c00, GPIO_PMSELR); __raw_writew 101 arch/sh/boards/mach-se/7780/setup.c __raw_writew(0x0001, FPGA_IVDRPW); __raw_writew 169 arch/sh/boards/mach-sh7763rdp/setup.c __raw_writew((__raw_readw(PORT_PSEL2) & 0xFFC3), PORT_PSEL2); __raw_writew 171 arch/sh/boards/mach-sh7763rdp/setup.c __raw_writew(__raw_readw(PORT_PICR) & 0xFC0F, PORT_PICR); __raw_writew 174 arch/sh/boards/mach-sh7763rdp/setup.c __raw_writew(0x00, USB_USBHSC); __raw_writew 178 arch/sh/boards/mach-sh7763rdp/setup.c __raw_writew(__raw_readw(PORT_PJCR) & 0x0003, PORT_PJCR); __raw_writew 180 arch/sh/boards/mach-sh7763rdp/setup.c __raw_writew(__raw_readw(PORT_PICR) & 0xF3FF, PORT_PICR); __raw_writew 181 arch/sh/boards/mach-sh7763rdp/setup.c __raw_writew(0, PORT_PKCR); __raw_writew 182 arch/sh/boards/mach-sh7763rdp/setup.c __raw_writew(0, PORT_PLCR); __raw_writew 184 arch/sh/boards/mach-sh7763rdp/setup.c __raw_writew((__raw_readw(PORT_PSEL2) & 0x00C0), PORT_PSEL2); __raw_writew 186 arch/sh/boards/mach-sh7763rdp/setup.c __raw_writew((__raw_readw(PORT_PSEL3) & 0x0700), PORT_PSEL3); __raw_writew 190 arch/sh/boards/mach-sh7763rdp/setup.c __raw_writew((__raw_readw(PORT_PSEL1) & 0xFFF0) | 0x0004, PORT_PSEL1); __raw_writew 192 arch/sh/boards/mach-sh7763rdp/setup.c __raw_writew(__raw_readw(PORT_PSEL4) | 0x4000, PORT_PSEL4); __raw_writew 195 arch/sh/boards/mach-sh7763rdp/setup.c __raw_writew((__raw_readw(PORT_PSEL1) & ~0xff00) | 0x2400, PORT_PSEL1); __raw_writew 196 arch/sh/boards/mach-sh7763rdp/setup.c __raw_writew(0x0, PORT_PFCR); __raw_writew 197 arch/sh/boards/mach-sh7763rdp/setup.c __raw_writew(0x0, PORT_PFCR); __raw_writew 198 arch/sh/boards/mach-sh7763rdp/setup.c __raw_writew(0x0, PORT_PFCR); __raw_writew 202 arch/sh/boards/mach-sh7763rdp/setup.c __raw_writew(0x0001, PORT_PSEL0); __raw_writew 205 arch/sh/boards/mach-sh7763rdp/setup.c __raw_writew(__raw_readw(PORT_PACR) & ~0x3000, PORT_PACR); __raw_writew 206 arch/sh/boards/mach-sh7763rdp/setup.c __raw_writew(__raw_readw(PORT_PCCR) & ~0xCFC3, PORT_PCCR); __raw_writew 37 arch/sh/boards/mach-x3proto/gpio.c __raw_writew(data, KEYCTLR); __raw_writew 77 arch/sh/boards/mach-x3proto/ilsel.c __raw_writew(tmp, addr); __raw_writew 152 arch/sh/boards/mach-x3proto/ilsel.c __raw_writew(tmp, addr); __raw_writew 45 arch/sh/boot/romimage/mmcif-sh7724.c __raw_writew(0x0000, PTWCR); __raw_writew 48 arch/sh/boot/romimage/mmcif-sh7724.c __raw_writew(__raw_readw(PTXCR) & ~0x000f, PTXCR); __raw_writew 51 arch/sh/boot/romimage/mmcif-sh7724.c __raw_writew(__raw_readw(PSELA) & ~0x2000, PSELA); __raw_writew 54 arch/sh/boot/romimage/mmcif-sh7724.c __raw_writew(__raw_readw(PSELE) & ~0x3000, PSELE); __raw_writew 57 arch/sh/boot/romimage/mmcif-sh7724.c __raw_writew(__raw_readw(HIZCRC) & ~0x0620, HIZCRC); __raw_writew 60 arch/sh/boot/romimage/mmcif-sh7724.c __raw_writew(__raw_readw(DRVCRA) | 0x3000, DRVCRA); __raw_writew 29 arch/sh/cchips/hd6446x/hd64461.c __raw_writew(nimr, HD64461_NIMR); __raw_writew 40 arch/sh/cchips/hd6446x/hd64461.c __raw_writew(nimr, HD64461_NIMR); __raw_writew 86 arch/sh/cchips/hd6446x/hd64461.c __raw_writew(0x2240, INTC_ICR1); __raw_writew 88 arch/sh/cchips/hd6446x/hd64461.c __raw_writew(0xffff, HD64461_NIMR); __raw_writew 258 arch/sh/drivers/dma/dma-sh.c #define dmaor_write_reg(n, data) __raw_writew(data, dma_find_base(n)*6) __raw_writew 88 arch/sh/drivers/pci/pci-sh5.h #define SH5PCI_WRITE_SHORT(reg,val) __raw_writew((u16)(val),PCISH5_ICR_REG(reg)) __raw_writew 113 arch/sh/drivers/pci/pci-sh7780.c __raw_writew(cmd, hose->reg_base + PCI_STATUS); __raw_writew 172 arch/sh/drivers/pci/pci-sh7780.c __raw_writew(PCI_STATUS_DETECTED_PARITY | \ __raw_writew 236 arch/sh/drivers/pci/pci-sh7780.c __raw_writew(tmp, hose->reg_base + PCI_STATUS); __raw_writew 380 arch/sh/drivers/pci/pci-sh7780.c __raw_writew(PCI_COMMAND_SERR | PCI_COMMAND_WAIT | \ __raw_writew 46 arch/sh/include/asm/io.h #define writew_relaxed(v,c) ((void)__raw_writew((__force u16)ioswabw(v),c)) __raw_writew 135 arch/sh/include/asm/watchdog.h __raw_writew((WTCNT_HIGH << 8) | (__u16)val, WTCNT); __raw_writew 157 arch/sh/include/asm/watchdog.h __raw_writew((WTCSR_HIGH << 8) | (__u16)val, WTCSR); __raw_writew 20 arch/sh/include/mach-common/mach/magicpanelr2.h #define SETBITS_OUTW(mask, reg) __raw_writew(__raw_readw(reg) | mask, reg) __raw_writew 23 arch/sh/include/mach-common/mach/magicpanelr2.h #define CLRBITS_OUTW(mask, reg) __raw_writew(__raw_readw(reg) & ~mask, reg) __raw_writew 42 arch/sh/include/mach-ecovec24/mach/romimage.h __raw_writew(__raw_readw(HIZCRA) & ~(1 << 1), HIZCRA); __raw_writew 13 arch/sh/include/mach-se/mach/mrshpc.h __raw_writew(0x0674, MRSHPC_CPWCR); /* Card Vcc is 3.3v? */ __raw_writew 15 arch/sh/include/mach-se/mach/mrshpc.h __raw_writew(0x0678, MRSHPC_CPWCR); /* Card Vcc is 5V */ __raw_writew 23 arch/sh/include/mach-se/mach/mrshpc.h __raw_writew(0x8a84, MRSHPC_MW0CR1); __raw_writew 26 arch/sh/include/mach-se/mach/mrshpc.h __raw_writew(0x0b00, MRSHPC_MW0CR2); __raw_writew 29 arch/sh/include/mach-se/mach/mrshpc.h __raw_writew(0x0300, MRSHPC_MW0CR2); __raw_writew 32 arch/sh/include/mach-se/mach/mrshpc.h __raw_writew(0x8a85, MRSHPC_MW1CR1); __raw_writew 35 arch/sh/include/mach-se/mach/mrshpc.h __raw_writew(0x0a00, MRSHPC_MW1CR2); __raw_writew 38 arch/sh/include/mach-se/mach/mrshpc.h __raw_writew(0x0200, MRSHPC_MW1CR2); __raw_writew 41 arch/sh/include/mach-se/mach/mrshpc.h __raw_writew(0x8a86, MRSHPC_IOWCR1); __raw_writew 42 arch/sh/include/mach-se/mach/mrshpc.h __raw_writew(0x0008, MRSHPC_CDCR); /* I/O card mode */ __raw_writew 44 arch/sh/include/mach-se/mach/mrshpc.h __raw_writew(0x0a00, MRSHPC_IOWCR2); /* bus width 16bit SWAP = 1*/ __raw_writew 46 arch/sh/include/mach-se/mach/mrshpc.h __raw_writew(0x0200, MRSHPC_IOWCR2); /* bus width 16bit SWAP = 0*/ __raw_writew 48 arch/sh/include/mach-se/mach/mrshpc.h __raw_writew(0x2000, MRSHPC_ICR); __raw_writew 35 arch/sh/kernel/cpu/irq/ipr.c __raw_writew(__raw_readw(addr) & (0xffff ^ (0xf << p->shift)), addr); __raw_writew 44 arch/sh/kernel/cpu/irq/ipr.c __raw_writew(__raw_readw(addr) | (p->priority << p->shift), addr); __raw_writew 473 arch/sh/kernel/cpu/sh2a/setup-sh7264.c __raw_writew(0x200 , 0xffffc0c2) ; /* Initialise UACS25 */ __raw_writew 17 arch/sh/kernel/cpu/sh3/serial-sh770x.c __raw_writew(data & 0x0fcf, SCPCR); __raw_writew 24 arch/sh/kernel/cpu/sh3/serial-sh770x.c __raw_writew((data & 0x0fcf) | 0x1000, SCPCR); __raw_writew 13 arch/sh/kernel/cpu/sh3/serial-sh7710.c __raw_writew(__raw_readw(PACR) & 0xffc0, PACR); __raw_writew 14 arch/sh/kernel/cpu/sh3/serial-sh7710.c __raw_writew(__raw_readw(PBCR) & 0x0fff, PBCR); __raw_writew 16 arch/sh/kernel/cpu/sh3/serial-sh7710.c __raw_writew(__raw_readw(PBCR) & 0xf003, PBCR); __raw_writew 17 arch/sh/kernel/cpu/sh3/serial-sh7720.c __raw_writew((data & 0xfc03), PORT_PTCR); __raw_writew 21 arch/sh/kernel/cpu/sh3/serial-sh7720.c __raw_writew((data & 0xfc03), PORT_PVCR); __raw_writew 27 arch/sh/kernel/cpu/sh3/serial-sh7720.c __raw_writew((data & 0xffc3), PORT_PTCR); __raw_writew 31 arch/sh/kernel/cpu/sh3/serial-sh7720.c __raw_writew((data & 0xffc3), PORT_PVCR); __raw_writew 58 arch/sh/kernel/cpu/sh3/setup-sh3.c __raw_writew(__raw_readw(INTC_ICR1) & ~INTC_ICR1_IRQLVL, INTC_ICR1); __raw_writew 214 arch/sh/kernel/cpu/sh4/perf_event.c __raw_writew(tmp, PMCR(idx)); __raw_writew 219 arch/sh/kernel/cpu/sh4/perf_event.c __raw_writew(__raw_readw(PMCR(idx)) | PMCR_PMCLR, PMCR(idx)); __raw_writew 220 arch/sh/kernel/cpu/sh4/perf_event.c __raw_writew(hwc->config | PMCR_PMEN | PMCR_PMST, PMCR(idx)); __raw_writew 228 arch/sh/kernel/cpu/sh4/perf_event.c __raw_writew(__raw_readw(PMCR(i)) & ~PMCR_PMEN, PMCR(i)); __raw_writew 236 arch/sh/kernel/cpu/sh4/perf_event.c __raw_writew(__raw_readw(PMCR(i)) | PMCR_PMEN, PMCR(i)); __raw_writew 132 arch/sh/kernel/cpu/sh4/setup-sh4-202.c __raw_writew(__raw_readw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR); __raw_writew 352 arch/sh/kernel/cpu/sh4/setup-sh7750.c __raw_writew(__raw_readw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR); __raw_writew 285 arch/sh/kernel/cpu/sh4/setup-sh7760.c __raw_writew(__raw_readw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR); __raw_writew 18 arch/sh/kernel/cpu/sh4a/serial-sh7722.c __raw_writew(data, PSCR); __raw_writew 1200 arch/sh/kernel/cpu/sh4a/setup-sh7724.c __raw_writew(sh7724_rstandby_state.rwtcsr & 0x07, 0xa4520004); __raw_writew 1230 arch/sh/kernel/cpu/sh4a/setup-sh7724.c __raw_writew(sh7724_rstandby_state.ipra, 0xa4080000); /* IPRA */ __raw_writew 1231 arch/sh/kernel/cpu/sh4a/setup-sh7724.c __raw_writew(sh7724_rstandby_state.iprb, 0xa4080004); /* IPRB */ __raw_writew 1232 arch/sh/kernel/cpu/sh4a/setup-sh7724.c __raw_writew(sh7724_rstandby_state.iprc, 0xa4080008); /* IPRC */ __raw_writew 1233 arch/sh/kernel/cpu/sh4a/setup-sh7724.c __raw_writew(sh7724_rstandby_state.iprd, 0xa408000c); /* IPRD */ __raw_writew 1234 arch/sh/kernel/cpu/sh4a/setup-sh7724.c __raw_writew(sh7724_rstandby_state.ipre, 0xa4080010); /* IPRE */ __raw_writew 1235 arch/sh/kernel/cpu/sh4a/setup-sh7724.c __raw_writew(sh7724_rstandby_state.iprf, 0xa4080014); /* IPRF */ __raw_writew 1236 arch/sh/kernel/cpu/sh4a/setup-sh7724.c __raw_writew(sh7724_rstandby_state.iprg, 0xa4080018); /* IPRG */ __raw_writew 1237 arch/sh/kernel/cpu/sh4a/setup-sh7724.c __raw_writew(sh7724_rstandby_state.iprh, 0xa408001c); /* IPRH */ __raw_writew 1238 arch/sh/kernel/cpu/sh4a/setup-sh7724.c __raw_writew(sh7724_rstandby_state.ipri, 0xa4080020); /* IPRI */ __raw_writew 1239 arch/sh/kernel/cpu/sh4a/setup-sh7724.c __raw_writew(sh7724_rstandby_state.iprj, 0xa4080024); /* IPRJ */ __raw_writew 1240 arch/sh/kernel/cpu/sh4a/setup-sh7724.c __raw_writew(sh7724_rstandby_state.iprk, 0xa4080028); /* IPRK */ __raw_writew 1241 arch/sh/kernel/cpu/sh4a/setup-sh7724.c __raw_writew(sh7724_rstandby_state.iprl, 0xa408002c); /* IPRL */ __raw_writew 1257 arch/sh/kernel/cpu/sh4a/setup-sh7724.c __raw_writew(sh7724_rstandby_state.rwtcnt, 0xa4520000); /* RWTCNT */ __raw_writew 1258 arch/sh/kernel/cpu/sh4a/setup-sh7724.c __raw_writew(sh7724_rstandby_state.rwtcsr, 0xa4520004); /* RWTCSR */ __raw_writew 205 arch/sh/kernel/io_trapped.c __raw_writew(tmp, dst_addr); __raw_writew 55 arch/sh/kernel/iomap.c __raw_writew(cpu_to_be16(val), addr); __raw_writew 115 arch/sh/kernel/iomap.c __raw_writew(*src, addr); __raw_writew 160 arch/sh/kernel/kgdb.c __raw_writew(stepped_opcode, stepped_address); __raw_writew 75 arch/sparc/include/asm/ide.h __raw_writew(*ps++, port); __raw_writew 83 arch/sparc/include/asm/ide.h __raw_writew((w >> 16), port); __raw_writew 84 arch/sparc/include/asm/ide.h __raw_writew(w, port); __raw_writew 89 arch/sparc/include/asm/ide.h __raw_writew(*ps, port); __raw_writew 20 arch/sparc/include/asm/io.h #define writew_be(__l, __addr) __raw_writew(__l, __addr) __raw_writew 76 arch/sparc/include/asm/io_64.h #define __raw_writew __raw_writew __raw_writew 317 arch/sparc/include/asm/io_64.h __raw_writew(w, addr); __raw_writew 425 arch/sparc/include/asm/io_64.h #define iowrite16be __raw_writew __raw_writew 28 arch/sparc/lib/PeeCeeI.c __raw_writew(*(u16 *)src, addr); __raw_writew 444 drivers/ata/pata_octeon_cf.c __raw_writew(ap->ctl, base + 0xe); __raw_writew 446 drivers/ata/pata_octeon_cf.c __raw_writew(ap->ctl | ATA_SRST, base + 0xe); __raw_writew 448 drivers/ata/pata_octeon_cf.c __raw_writew(ap->ctl, base + 0xe); __raw_writew 479 drivers/ata/pata_octeon_cf.c __raw_writew(tf->hob_feature << 8, base + 0xc); __raw_writew 480 drivers/ata/pata_octeon_cf.c __raw_writew(tf->hob_nsect | tf->hob_lbal << 8, base + 2); __raw_writew 481 drivers/ata/pata_octeon_cf.c __raw_writew(tf->hob_lbam | tf->hob_lbah << 8, base + 4); __raw_writew 490 drivers/ata/pata_octeon_cf.c __raw_writew(tf->feature << 8, base + 0xc); __raw_writew 491 drivers/ata/pata_octeon_cf.c __raw_writew(tf->nsect | tf->lbal << 8, base + 2); __raw_writew 492 drivers/ata/pata_octeon_cf.c __raw_writew(tf->lbam | tf->lbah << 8, base + 4); __raw_writew 530 drivers/ata/pata_octeon_cf.c __raw_writew(blob, base + 6); __raw_writew 115 drivers/bcma/host_soc.c __raw_writew((__force u16)(*buf), addr); __raw_writew 105 drivers/dma/sh/shdmac.c __raw_writew(data, addr); __raw_writew 276 drivers/dma/sh/shdmac.c __raw_writew((__raw_readw(addr) & (0xff00 >> shift)) | (val << shift), __raw_writew 47 drivers/gpio/gpio-mm-lantiq.c __raw_writew(chip->shadow, chip->mmchip.regs); __raw_writew 94 drivers/ide/tx4938ide.c __raw_writew(le16_to_cpu(*ptr), (void __iomem *)port); __raw_writew 98 drivers/ide/tx4939ide.c __raw_writew(val, base + tx4939ide_swizzlew(reg)); __raw_writew 467 drivers/ide/tx4939ide.c __raw_writew(le16_to_cpu(*ptr), (void __iomem *)port); __raw_writew 144 drivers/input/keyboard/jornada680_kbd.c __raw_writew((dc_static | *y++), PDCR); __raw_writew 145 drivers/input/keyboard/jornada680_kbd.c __raw_writew((ec_static | *y++), PECR); __raw_writew 162 drivers/input/keyboard/jornada680_kbd.c __raw_writew((dc_static | (0x5555 & 0xcc0c)),PDCR); __raw_writew 163 drivers/input/keyboard/jornada680_kbd.c __raw_writew((ec_static | (0x5555 & 0xf0cf)),PECR); __raw_writew 456 drivers/mmc/host/dw_mmc.h #define mci_fifo_writew(__value, __reg) __raw_writew(__reg, __value) __raw_writew 81 drivers/mmc/host/omap.c #define OMAP_MMC_WRITE(host, reg, val) __raw_writew((val), (host)->virt_base + OMAP_MMC_REG(host, reg)) __raw_writew 67 drivers/mtd/maps/ixp4xx.c __raw_writew(cpu_to_be16(d), (void __iomem *)((unsigned long)addr ^ 0x2)); __raw_writew 82 drivers/mtd/maps/ixp4xx.c __raw_writew(d, addr); __raw_writew 238 drivers/mtd/nand/raw/mxc_nand.c __raw_writew(*s++, t++); __raw_writew 1345 drivers/net/ethernet/8390/pcnet_cs.c do { __raw_writew(*s++, d++); } while (--c); __raw_writew 1437 drivers/net/ethernet/8390/pcnet_cs.c __raw_writew((i>>1), info->base+offset+i); __raw_writew 87 drivers/net/ethernet/amd/am79c961a.c #define am_writeword(dev,off,val) __raw_writew(val, ISAMEM_BASE + ((off) << 1)) __raw_writew 182 drivers/net/ethernet/cirrus/ep93xx_eth.c #define wrw(ep, off, val) __raw_writew((val), (ep)->base_addr + (off)) __raw_writew 34 drivers/net/ethernet/freescale/enetc/enetc_pf.c __raw_writew(lower, hw->port + ENETC_PSIPMAR1(si)); __raw_writew 208 drivers/net/ethernet/freescale/fs_enet/fs_enet.h #define __cbd_out16(addr, x) __raw_writew(x, addr) __raw_writew 50 drivers/net/ethernet/freescale/fs_enet/mac-fec.c #define __fs_out16(addr, x) __raw_writew(x, addr) __raw_writew 46 drivers/net/ethernet/freescale/fs_enet/mac-scc.c #define __fs_out16(addr, x) __raw_writew(x, addr) __raw_writew 356 drivers/net/ethernet/natsemi/sonic.h __raw_writew(val, base + (offset * 2) + 1); __raw_writew 358 drivers/net/ethernet/natsemi/sonic.h __raw_writew(val, base + (offset * 2) + 0); __raw_writew 361 drivers/net/ethernet/natsemi/sonic.h __raw_writew(val, base + (offset * 1) + 0); __raw_writew 132 drivers/parisc/lba_pci.c #define WRITE_U16(value, addr) __raw_writew(value, addr) __raw_writew 86 drivers/pcmcia/pxa2xx_balloon3.c __raw_writew(BALLOON3_CF_RESET, BALLOON3_CF_CONTROL_REG + __raw_writew 275 drivers/scsi/ncr53c8xx.h #define writew_b2l __raw_writew __raw_writew 279 drivers/scsi/ncr53c8xx.h #define writew_raw __raw_writew __raw_writew 109 drivers/sh/intc/access.c __raw_writew(intc_set_field_from_handle(0, data, h), ptr); __raw_writew 145 drivers/sh/intc/access.c __raw_writew(value, ptr); __raw_writew 104 drivers/sh/intc/chip.c __raw_writew(0xffff ^ value, addr); __raw_writew 234 drivers/spi/spi-atmel.c __raw_writew((value), (port)->regs + SPI_##reg) __raw_writew 195 drivers/spi/spi-bcm63xx-hsspi.c __raw_writew(opcode | curr_step, bs->fifo); __raw_writew 166 drivers/spi/spi-dw.h __raw_writew(val, dws->regs + offset); __raw_writew 110 drivers/spi/spi-omap-uwire.c __raw_writew(val, uwire_base + (idx << uwire_idx_shift)); __raw_writew 139 drivers/ssb/host_soc.c __raw_writew((__force u16)(*buf), addr); __raw_writew 401 drivers/ssb/pcmcia.c __raw_writew((__force u16)(*buf), addr); __raw_writew 412 drivers/ssb/pcmcia.c __raw_writew((__force u16)(*buf), addr); __raw_writew 414 drivers/ssb/pcmcia.c __raw_writew((__force u16)(*buf), addr + 2); __raw_writew 79 drivers/usb/c67x00/c67x00-ll-hpi.c __raw_writew(value, dev->hpi.base + reg * dev->hpi.regstep); __raw_writew 372 drivers/usb/host/isp116x.h __raw_writew(val, isp116x->data_reg); __raw_writew 274 drivers/usb/musb/musb_core.c __raw_writew(data, addr + offset); __raw_writew 305 drivers/usb/musb/musb_core.c __raw_writew(*(u16 *)&src[index], fifo); __raw_writew 169 drivers/usb/musb/tusb6010.c __raw_writew(tmp, addr + (offset & ~1)); __raw_writew 64 drivers/video/fbdev/nvidia/nv_local.h #define NV_WR16(p,i,d) (__raw_writew((d), (void __iomem *)(p) + (i))) __raw_writew 74 drivers/video/fbdev/omap2/omapfb/omapfb-main.c __raw_writew((r << 11) | (g << 5) | (b << 0), p); __raw_writew 80 drivers/video/fbdev/riva/riva_hw.h #define NV_WR16(p,i,d) (__raw_writew((d), (void __iomem *)(p) + (i))) __raw_writew 115 include/asm-generic/io.h #ifndef __raw_writew __raw_writew 116 include/asm-generic/io.h #define __raw_writew __raw_writew __raw_writew 215 include/asm-generic/io.h __raw_writew(cpu_to_le16(value), addr); __raw_writew 291 include/asm-generic/io.h __raw_writew(cpu_to_le16(value), addr); __raw_writew 405 include/asm-generic/io.h __raw_writew(*buf++, addr); __raw_writew 513 include/asm-generic/io.h __raw_writew(cpu_to_le16(value), PCI_IOBASE + addr); __raw_writew 556 include/linux/fb.h #define fb_writew __raw_writew __raw_writew 98 include/linux/mtd/doc2000.h __raw_writew(data, addr + reg); __raw_writew 416 include/linux/mtd/map.h __raw_writew(datum.x[0], map->virt + ofs); __raw_writew 315 lib/iomap.c __raw_writew(*src, addr); __raw_writew 44 sound/soc/sh/sh7760-ac97.c __raw_writew(ipsel | (3 << 10), IPSEL);