__raw_writel 262 arch/alpha/include/asm/io.h extern void __raw_writel(u32 b, volatile void __iomem *addr); __raw_writel 481 arch/alpha/include/asm/io.h __raw_writel(b, addr); __raw_writel 508 arch/alpha/include/asm/io.h #define writel_relaxed(b, addr) __raw_writel(b, addr) __raw_writel 146 arch/alpha/kernel/io.c EXPORT_SYMBOL(__raw_writel); __raw_writel 192 arch/alpha/kernel/io.c __raw_writel(b, addr); __raw_writel 495 arch/alpha/kernel/io.c __raw_writel(*(const u32 *)from, to); __raw_writel 547 arch/alpha/kernel/io.c __raw_writel(c, to); __raw_writel 566 arch/alpha/kernel/io.c __raw_writel(c, to); __raw_writel 48 arch/arc/include/asm/io.h #define iowrite32be(v,p) ({ __iowmb(); __raw_writel((__force u32)cpu_to_be32(v), p); }) __raw_writel 152 arch/arc/include/asm/io.h #define __raw_writel __raw_writel __raw_writel 235 arch/arc/include/asm/io.h #define writel_relaxed(v,c) __raw_writel((__force u32) cpu_to_le32(v),c) __raw_writel 37 arch/arm/common/it8152.c __raw_writel((__raw_readl(IT8152_INTC_LDCNIMR) | __raw_writel 41 arch/arm/common/it8152.c __raw_writel((__raw_readl(IT8152_INTC_LPCNIMR) | __raw_writel 45 arch/arm/common/it8152.c __raw_writel((__raw_readl(IT8152_INTC_PDCNIMR) | __raw_writel 56 arch/arm/common/it8152.c __raw_writel((__raw_readl(IT8152_INTC_LDCNIMR) & __raw_writel 60 arch/arm/common/it8152.c __raw_writel((__raw_readl(IT8152_INTC_LPCNIMR) & __raw_writel 64 arch/arm/common/it8152.c __raw_writel((__raw_readl(IT8152_INTC_PDCNIMR) & __raw_writel 81 arch/arm/common/it8152.c __raw_writel((0xffff), IT8152_INTC_PDCNIMR); __raw_writel 82 arch/arm/common/it8152.c __raw_writel((0), IT8152_INTC_PDCNIRR); __raw_writel 83 arch/arm/common/it8152.c __raw_writel((0xffff), IT8152_INTC_LPCNIMR); __raw_writel 84 arch/arm/common/it8152.c __raw_writel((0), IT8152_INTC_LPCNIRR); __raw_writel 85 arch/arm/common/it8152.c __raw_writel((0xffff), IT8152_INTC_LDCNIMR); __raw_writel 86 arch/arm/common/it8152.c __raw_writel((0), IT8152_INTC_LDCNIRR); __raw_writel 107 arch/arm/common/it8152.c __raw_writel((~bits_pd), IT8152_INTC_PDCNIRR); __raw_writel 108 arch/arm/common/it8152.c __raw_writel((~bits_lp), IT8152_INTC_LPCNIRR); __raw_writel 109 arch/arm/common/it8152.c __raw_writel((~bits_ld), IT8152_INTC_LDCNIRR); __raw_writel 184 arch/arm/common/it8152.c __raw_writel((addr + where), IT8152_PCI_CFG_ADDR); __raw_writel 207 arch/arm/common/it8152.c __raw_writel((addr + where), IT8152_PCI_CFG_ADDR); __raw_writel 216 arch/arm/common/it8152.c __raw_writel((addr + where), IT8152_PCI_CFG_ADDR); __raw_writel 217 arch/arm/common/it8152.c __raw_writel((v | vtemp), IT8152_PCI_CFG_DATA); __raw_writel 92 arch/arm/include/asm/cti.h __raw_writel(val, base + CTIINEN + trig_in * 4); __raw_writel 96 arch/arm/include/asm/cti.h __raw_writel(val, base + CTIOUTEN + trig_out * 4); __raw_writel 107 arch/arm/include/asm/cti.h __raw_writel(0x1, cti->base + CTICONTROL); __raw_writel 118 arch/arm/include/asm/cti.h __raw_writel(0, cti->base + CTICONTROL); __raw_writel 134 arch/arm/include/asm/cti.h __raw_writel(val, base + CTIINTACK); __raw_writel 146 arch/arm/include/asm/cti.h __raw_writel(CS_LAR_KEY, cti->base + LOCKACCESS); __raw_writel 158 arch/arm/include/asm/cti.h __raw_writel(~CS_LAR_KEY, cti->base + LOCKACCESS); __raw_writel 23 arch/arm/include/asm/hardware/iomd.h #define iomd_writel(val,off) __raw_writel(val, IOMD_BASE + (off)) __raw_writel 92 arch/arm/include/asm/io.h #define __raw_writel __raw_writel __raw_writel 255 arch/arm/include/asm/io.h #define outl(v,p) ({ __iowmb(); __raw_writel((__force __u32) \ __raw_writel 299 arch/arm/include/asm/io.h #define writel_relaxed(v,c) __raw_writel((__force u32) cpu_to_le32(v),c) __raw_writel 426 arch/arm/include/asm/io.h #define iowrite32be(v,p) ({ __iowmb(); __raw_writel((__force __u32)cpu_to_be32(v), p); }) __raw_writel 13 arch/arm/kernel/v7m.c __raw_writel(V7M_SCB_AIRCR_VECTKEY | V7M_SCB_AIRCR_SYSRESETREQ, __raw_writel 51 arch/arm/mach-aspeed/platsmp.c __raw_writel(0xBADABABA, base + BOOT_SIG); __raw_writel 65 arch/arm/mach-at91/pm.c __raw_writel(value, soc_pm.data.ramc[id] + field) __raw_writel 140 arch/arm/mach-cns3xxx/cns3420vb.c __raw_writel((__raw_readl(MISC_CHIP_CONFIG_REG) | (0X2 << 24)), __raw_writel 316 arch/arm/mach-cns3xxx/core.c __raw_writel((__raw_readl(MISC_CHIP_CONFIG_REG) | (0X2 << 24)), __raw_writel 367 arch/arm/mach-cns3xxx/core.c __raw_writel(tmp, MISC_SATA_POWER_MODE); __raw_writel 387 arch/arm/mach-cns3xxx/core.c __raw_writel(gpioa_pins, gpioa); __raw_writel 57 arch/arm/mach-cns3xxx/devices.c __raw_writel(tmp, MISC_SATA_POWER_MODE); __raw_writel 102 arch/arm/mach-cns3xxx/devices.c __raw_writel(gpioa_pins, gpioa); __raw_writel 193 arch/arm/mach-cns3xxx/pcie.c __raw_writel(reg, MISC_PCIE_CTRL(port)); __raw_writel 251 arch/arm/mach-cns3xxx/pcie.c __raw_writel(~0x3FFF, MISC_PCIE_INT_MASK(cnspci->port)); __raw_writel 20 arch/arm/mach-cns3xxx/pm.c __raw_writel(reg, PM_CLK_GATE_REG); __raw_writel 29 arch/arm/mach-cns3xxx/pm.c __raw_writel(reg, PM_CLK_GATE_REG); __raw_writel 38 arch/arm/mach-cns3xxx/pm.c __raw_writel(reg, PM_PLL_HM_PD_CTRL_REG); __raw_writel 51 arch/arm/mach-cns3xxx/pm.c __raw_writel(reg, PM_PLL_HM_PD_CTRL_REG); __raw_writel 67 arch/arm/mach-cns3xxx/pm.c __raw_writel(reg, PM_SOFT_RST_REG); __raw_writel 71 arch/arm/mach-cns3xxx/pm.c __raw_writel(reg, PM_SOFT_RST_REG); __raw_writel 1130 arch/arm/mach-davinci/board-da850-evm.c __raw_writel(val, cfg_chip3_base); __raw_writel 1460 arch/arm/mach-davinci/board-da850-evm.c __raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30); __raw_writel 1461 arch/arm/mach-davinci/board-da850-evm.c __raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30); __raw_writel 496 arch/arm/mach-davinci/board-dm646x-evm.c __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS)); __raw_writel 521 arch/arm/mach-davinci/board-dm646x-evm.c __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL)); __raw_writel 527 arch/arm/mach-davinci/board-dm646x-evm.c __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS)); __raw_writel 660 arch/arm/mach-davinci/board-dm646x-evm.c __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL)); __raw_writel 548 arch/arm/mach-davinci/board-mityomapl138.c __raw_writel(val, cfg_chip3_base); __raw_writel 64 arch/arm/mach-davinci/board-omapl138-hawk.c __raw_writel(val, cfgchip3); __raw_writel 43 arch/arm/mach-davinci/cpuidle.c __raw_writel(val, ddr2_reg_base + DDR2_SDRCR_OFFSET); __raw_writel 211 arch/arm/mach-davinci/devices.c __raw_writel(v & ~0xfc0, __raw_writel 247 arch/arm/mach-davinci/devices.c __raw_writel(0, __raw_writel 616 arch/arm/mach-davinci/dm646x.c __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS)); __raw_writel 620 arch/arm/mach-davinci/dm646x.c __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VDD3P3VPWDN)); __raw_writel 82 arch/arm/mach-davinci/mux.c __raw_writel(reg, pinmux_base + cfg->mux_reg); __raw_writel 53 arch/arm/mach-davinci/pm.c __raw_writel(val, pm_config.cpupll_reg_base + PLLCTL); __raw_writel 60 arch/arm/mach-davinci/pm.c __raw_writel(val, pm_config.cpupll_reg_base + PLLCTL); __raw_writel 67 arch/arm/mach-davinci/pm.c __raw_writel(val, pm_config.deepsleep_reg); __raw_writel 77 arch/arm/mach-davinci/pm.c __raw_writel(val, pm_config.cpupll_reg_base + PLLCTL); __raw_writel 82 arch/arm/mach-davinci/pm.c __raw_writel(val, pm_config.cpupll_reg_base + PLLCTL); __raw_writel 90 arch/arm/mach-davinci/pm.c __raw_writel(val, pm_config.cpupll_reg_base + PLLCTL); __raw_writel 99 arch/arm/mach-davinci/pm.c __raw_writel(val, pm_config.cpupll_reg_base + PLLCTL); __raw_writel 27 arch/arm/mach-davinci/serial.c __raw_writel(value, p->membase + offset); __raw_writel 128 arch/arm/mach-davinci/time.c __raw_writel(__raw_readl(t->base + t->tim_off) + t->period, __raw_writel 135 arch/arm/mach-davinci/time.c __raw_writel(tcr, t->base + TCR); __raw_writel 138 arch/arm/mach-davinci/time.c __raw_writel(0, t->base + t->tim_off); __raw_writel 139 arch/arm/mach-davinci/time.c __raw_writel(t->period, t->base + t->prd_off); __raw_writel 147 arch/arm/mach-davinci/time.c __raw_writel(tcr, t->base + TCR); __raw_writel 207 arch/arm/mach-davinci/time.c __raw_writel(0, base[i] + TCR); __raw_writel 211 arch/arm/mach-davinci/time.c __raw_writel(tgcr, base[i] + TGCR); __raw_writel 215 arch/arm/mach-davinci/time.c __raw_writel(tgcr, base[i] + TGCR); __raw_writel 220 arch/arm/mach-davinci/time.c __raw_writel(tgcr, base[i] + TGCR); __raw_writel 223 arch/arm/mach-davinci/time.c __raw_writel(0, base[i] + TIM12); __raw_writel 224 arch/arm/mach-davinci/time.c __raw_writel(0, base[i] + TIM34); __raw_writel 131 arch/arm/mach-ebsa110/io.c __raw_writel(val, a); __raw_writel 302 arch/arm/mach-ebsa110/io.c __raw_writel(val, a); __raw_writel 258 arch/arm/mach-ep93xx/clock.c __raw_writel(v, clk->enable_reg); __raw_writel 289 arch/arm/mach-ep93xx/clock.c __raw_writel(v, clk->enable_reg); __raw_writel 99 arch/arm/mach-ep93xx/core.c __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK); __raw_writel 100 arch/arm/mach-ep93xx/core.c __raw_writel(val, reg); __raw_writel 115 arch/arm/mach-ep93xx/core.c __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK); __raw_writel 116 arch/arm/mach-ep93xx/core.c __raw_writel(val, EP93XX_SYSCON_DEVCFG); __raw_writel 176 arch/arm/mach-ep93xx/core.c __raw_writel(mcr, base + EP93XX_UART_MCR_OFFSET); __raw_writel 366 arch/arm/mach-ep93xx/core.c __raw_writel((0 << 1) | (0 << 0), __raw_writel 67 arch/arm/mach-ep93xx/crunch.c __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK); __raw_writel 68 arch/arm/mach-ep93xx/crunch.c __raw_writel(devcfg, EP93XX_SYSCON_DEVCFG); __raw_writel 68 arch/arm/mach-ep93xx/include/mach/uncompress.h __raw_writel(v | ETH_SELF_CTL_RESET, PHYS_ETH_SELF_CTL); __raw_writel 226 arch/arm/mach-exynos/mcpm-exynos.c __raw_writel(0xe59f0000, ns_sram_base_addr); /* ldr r0, [pc, #0] */ __raw_writel 227 arch/arm/mach-exynos/mcpm-exynos.c __raw_writel(0xe12fff10, ns_sram_base_addr + 4); /* bx r0 */ __raw_writel 228 arch/arm/mach-exynos/mcpm-exynos.c __raw_writel(__pa_symbol(mcpm_entry_point), ns_sram_base_addr + 8); __raw_writel 51 arch/arm/mach-ixp4xx/include/mach/cpu.h __raw_writel(~value, IXP4XX_EXP_CFG2); __raw_writel 133 arch/arm/mach-ixp4xx/include/mach/io.h __raw_writel(value, p); __raw_writel 513 arch/arm/mach-ixp4xx/include/mach/io.h __raw_writel((u32 __force)cpu_to_le32(value), addr); __raw_writel 47 arch/arm/mach-lpc32xx/common.c __raw_writel(savedval2 + 1, iramptr2); __raw_writel 52 arch/arm/mach-lpc32xx/common.c __raw_writel(savedval2, iramptr2); __raw_writel 73 arch/arm/mach-lpc32xx/common.c __raw_writel(tmp, LPC32XX_CLKPWR_MACCLK_CTRL); __raw_writel 131 arch/arm/mach-lpc32xx/pm.c __raw_writel(__raw_readl(EMC_CTRL_REG) | EMC_SRMMC, EMC_CTRL_REG); __raw_writel 109 arch/arm/mach-lpc32xx/serial.c __raw_writel(0x0101, uartinit_data[i].pdiv_clk_reg); __raw_writel 116 arch/arm/mach-lpc32xx/serial.c __raw_writel(0xC1, LPC32XX_UART_IIR_FCR(puart)); __raw_writel 117 arch/arm/mach-lpc32xx/serial.c __raw_writel(0x00, LPC32XX_UART_DLL_FIFO(puart)); __raw_writel 122 arch/arm/mach-lpc32xx/serial.c __raw_writel(0, LPC32XX_UART_IIR_FCR(puart)); __raw_writel 126 arch/arm/mach-lpc32xx/serial.c __raw_writel(clkmodes, LPC32XX_UARTCTL_CLKMODE); __raw_writel 130 arch/arm/mach-lpc32xx/serial.c __raw_writel(0xC1, LPC32XX_UART_IIR_FCR(puart)); __raw_writel 131 arch/arm/mach-lpc32xx/serial.c __raw_writel(0x00, LPC32XX_UART_DLL_FIFO(puart)); __raw_writel 135 arch/arm/mach-lpc32xx/serial.c __raw_writel(0, LPC32XX_UART_IIR_FCR(puart)); __raw_writel 141 arch/arm/mach-lpc32xx/serial.c __raw_writel(tmp, LPC32XX_UARTCTL_CTRL); __raw_writel 146 arch/arm/mach-lpc32xx/serial.c __raw_writel(tmp, LPC32XX_UARTCTL_CTRL); __raw_writel 55 arch/arm/mach-mmp/clock-mmp2.c __raw_writel(clk_rst, clk->clk_rst); __raw_writel 64 arch/arm/mach-mmp/clock-mmp2.c __raw_writel(clk_rst, clk->clk_rst); __raw_writel 21 arch/arm/mach-mmp/clock.c __raw_writel(clk_rst, clk->clk_rst); __raw_writel 26 arch/arm/mach-mmp/clock.c __raw_writel(0, clk->clk_rst); __raw_writel 36 arch/arm/mach-mmp/clock.c __raw_writel(clk->enable_val, clk->clk_rst); __raw_writel 41 arch/arm/mach-mmp/clock.c __raw_writel(0, clk->clk_rst); __raw_writel 90 arch/arm/mach-mmp/mmp2.c __raw_writel(data | (1 << 6), mfpr_pmic); __raw_writel 91 arch/arm/mach-mmp/mmp2.c __raw_writel(data, mfpr_pmic); __raw_writel 125 arch/arm/mach-mmp/mmp2.c __raw_writel(APBC_APBCLK | APBC_RST, APBC_TIMERS); __raw_writel 132 arch/arm/mach-mmp/mmp2.c __raw_writel(clk_rst, APBC_TIMERS); __raw_writel 48 arch/arm/mach-mmp/pm-mmp2.c __raw_writel(data, MPMU_WUCRM_PJ); __raw_writel 53 arch/arm/mach-mmp/pm-mmp2.c __raw_writel(data, MPMU_WUCRM_PJ); __raw_writel 64 arch/arm/mach-mmp/pm-mmp2.c __raw_writel(0x0, CIU_REG(0x64)); __raw_writel 65 arch/arm/mach-mmp/pm-mmp2.c __raw_writel(0x0, CIU_REG(0x68)); __raw_writel 70 arch/arm/mach-mmp/pm-mmp2.c __raw_writel(val, CIU_REG(0x1c)); __raw_writel 80 arch/arm/mach-mmp/pm-mmp2.c __raw_writel(0x03003003, CIU_REG(0x64)); __raw_writel 81 arch/arm/mach-mmp/pm-mmp2.c __raw_writel(0x00303030, CIU_REG(0x68)); __raw_writel 86 arch/arm/mach-mmp/pm-mmp2.c __raw_writel(val, CIU_REG(0x1c)); __raw_writel 97 arch/arm/mach-mmp/pm-mmp2.c __raw_writel(0x0000a010, MPMU_CGR_PJ); __raw_writel 104 arch/arm/mach-mmp/pm-mmp2.c __raw_writel(0xdffefffe, MPMU_CGR_PJ); __raw_writel 107 arch/arm/mach-mmp/pm-mmp2.c __raw_writel(val, MPMU_PLL2_CTRL1); __raw_writel 154 arch/arm/mach-mmp/pm-mmp2.c __raw_writel(idle_cfg, APMU_PJ_IDLE_CFG); __raw_writel 155 arch/arm/mach-mmp/pm-mmp2.c __raw_writel(apcr, MPMU_PCR_PJ); /* 0xfe086000 */ __raw_writel 170 arch/arm/mach-mmp/pm-mmp2.c __raw_writel(temp, APMU_SRAM_PWR_DWN); __raw_writel 230 arch/arm/mach-mmp/pm-mmp2.c __raw_writel(0x5, MPMU_SCCR); __raw_writel 237 arch/arm/mach-mmp/pm-mmp2.c __raw_writel(__raw_readl(CIU_REG(0x8)) & ~(0x1 << 23), CIU_REG(0x8)); __raw_writel 243 arch/arm/mach-mmp/pm-mmp2.c __raw_writel(apcr, MPMU_PCR_PJ); __raw_writel 113 arch/arm/mach-mmp/pm-pxa910.c __raw_writel(awucrm, MPMU_AWUCRM); __raw_writel 117 arch/arm/mach-mmp/pm-pxa910.c __raw_writel(apcr, MPMU_APCR); __raw_writel 122 arch/arm/mach-mmp/pm-pxa910.c __raw_writel(awucrm, MPMU_AWUCRM); __raw_writel 126 arch/arm/mach-mmp/pm-pxa910.c __raw_writel(apcr, MPMU_APCR); __raw_writel 172 arch/arm/mach-mmp/pm-pxa910.c __raw_writel(0x0, APMU_MC_HW_SLP_TYPE); /* auto refresh */ __raw_writel 182 arch/arm/mach-mmp/pm-pxa910.c __raw_writel(idle_cfg, APMU_MOH_IDLE_CFG); __raw_writel 183 arch/arm/mach-mmp/pm-pxa910.c __raw_writel(apcr, MPMU_APCR); __raw_writel 199 arch/arm/mach-mmp/pm-pxa910.c __raw_writel(idle_cfg, APMU_MOH_IDLE_CFG); __raw_writel 218 arch/arm/mach-mmp/pm-pxa910.c __raw_writel(idle_cfg, APMU_MOH_IDLE_CFG); __raw_writel 262 arch/arm/mach-mmp/pm-pxa910.c __raw_writel(__raw_readl(APMU_SQU_CLK_GATE_CTRL) | (1 << 30), __raw_writel 264 arch/arm/mach-mmp/pm-pxa910.c __raw_writel(__raw_readl(MPMU_FCCR) | (1 << 28), MPMU_FCCR); __raw_writel 267 arch/arm/mach-mmp/pm-pxa910.c __raw_writel(awucrm, MPMU_AWUCRM); __raw_writel 74 arch/arm/mach-mmp/pxa168.c __raw_writel(APBC_APBCLK | APBC_RST, APBC_TIMERS); __raw_writel 77 arch/arm/mach-mmp/pxa168.c __raw_writel(TIMER_CLK_RST, APBC_TIMERS); __raw_writel 89 arch/arm/mach-mmp/pxa168.c __raw_writel(val | mask, APMU_WAKE_CLR); __raw_writel 113 arch/arm/mach-mmp/pxa910.c __raw_writel(APBC_APBCLK | APBC_RST, APBC_TIMERS); __raw_writel 114 arch/arm/mach-mmp/pxa910.c __raw_writel(TIMER_CLK_RST, APBC_TIMERS); __raw_writel 53 arch/arm/mach-mmp/time.c __raw_writel(1, mmp_timer_base + TMR_CVWR(1)); __raw_writel 73 arch/arm/mach-mmp/time.c __raw_writel(0x01, mmp_timer_base + TMR_ICR(0)); __raw_writel 78 arch/arm/mach-mmp/time.c __raw_writel(0x02, mmp_timer_base + TMR_CER); __raw_writel 95 arch/arm/mach-mmp/time.c __raw_writel(0x02, mmp_timer_base + TMR_CER); __raw_writel 100 arch/arm/mach-mmp/time.c __raw_writel(0x01, mmp_timer_base + TMR_ICR(0)); __raw_writel 101 arch/arm/mach-mmp/time.c __raw_writel(0x01, mmp_timer_base + TMR_IER(0)); __raw_writel 106 arch/arm/mach-mmp/time.c __raw_writel(delta - 1, mmp_timer_base + TMR_TN_MM(0, 0)); __raw_writel 111 arch/arm/mach-mmp/time.c __raw_writel(0x03, mmp_timer_base + TMR_CER); __raw_writel 124 arch/arm/mach-mmp/time.c __raw_writel(0x00, mmp_timer_base + TMR_IER(0)); __raw_writel 156 arch/arm/mach-mmp/time.c __raw_writel(0x0, mmp_timer_base + TMR_CER); /* disable */ __raw_writel 160 arch/arm/mach-mmp/time.c __raw_writel(ccr, mmp_timer_base + TMR_CCR); __raw_writel 163 arch/arm/mach-mmp/time.c __raw_writel(0x2, mmp_timer_base + TMR_CMR); __raw_writel 165 arch/arm/mach-mmp/time.c __raw_writel(0x1, mmp_timer_base + TMR_PLCR(0)); /* periodic */ __raw_writel 166 arch/arm/mach-mmp/time.c __raw_writel(0x7, mmp_timer_base + TMR_ICR(0)); /* clear status */ __raw_writel 167 arch/arm/mach-mmp/time.c __raw_writel(0x0, mmp_timer_base + TMR_IER(0)); __raw_writel 169 arch/arm/mach-mmp/time.c __raw_writel(0x0, mmp_timer_base + TMR_PLCR(1)); /* free-running */ __raw_writel 170 arch/arm/mach-mmp/time.c __raw_writel(0x7, mmp_timer_base + TMR_ICR(1)); /* clear status */ __raw_writel 171 arch/arm/mach-mmp/time.c __raw_writel(0x0, mmp_timer_base + TMR_IER(1)); __raw_writel 174 arch/arm/mach-mmp/time.c __raw_writel(0x2, mmp_timer_base + TMR_CER); __raw_writel 153 arch/arm/mach-mvebu/pmsu.c __raw_writel((unsigned long)resume_addr_reg, __raw_writel 61 arch/arm/mach-mxs/mach-mxs.c __raw_writel(mask, reg + MXS_SET_ADDR); __raw_writel 66 arch/arm/mach-mxs/mach-mxs.c __raw_writel(mask, reg + MXS_CLR_ADDR); __raw_writel 71 arch/arm/mach-mxs/mach-mxs.c __raw_writel(mask, reg + MXS_TOG_ADDR); __raw_writel 338 arch/arm/mach-omap1/clock.c __raw_writel(val, clk->enable_reg); __raw_writel 463 arch/arm/mach-omap1/clock.c __raw_writel(regval32, clk->enable_reg); __raw_writel 484 arch/arm/mach-omap1/clock.c __raw_writel(regval32, clk->enable_reg); __raw_writel 251 arch/arm/mach-omap1/gpio16xx.c __raw_writel(SYSCONFIG_WORD, base + OMAP1610_GPIO_SYSCONFIG); __raw_writel 177 arch/arm/mach-omap1/io.c __raw_writel(v, OMAP1_IO_ADDRESS(pa)); __raw_writel 308 arch/arm/mach-orion5x/pci.c __raw_writel(val, PCI_CONF_DATA); __raw_writel 70 arch/arm/mach-prima2/platsmp.c __raw_writel(__pa_symbol(sirfsoc_secondary_startup), __raw_writel 74 arch/arm/mach-prima2/platsmp.c __raw_writel(0x3CAF5D62, __raw_writel 476 arch/arm/mach-pxa/balloon3.c __raw_writel(~balloon3_irq_enabled, BALLOON3_INT_CONTROL_REG); __raw_writel 483 arch/arm/mach-pxa/balloon3.c __raw_writel(~balloon3_irq_enabled, BALLOON3_INT_CONTROL_REG); __raw_writel 584 arch/arm/mach-pxa/balloon3.c __raw_writel(balloon3_ctl_clr, __raw_writel 587 arch/arm/mach-pxa/balloon3.c __raw_writel(balloon3_ctl_set, __raw_writel 642 arch/arm/mach-pxa/balloon3.c __raw_writel( __raw_writel 60 arch/arm/mach-pxa/cm-x2xx-pci.c __raw_writel((0), IT8152_INTC_PDCNIRR); __raw_writel 61 arch/arm/mach-pxa/cm-x2xx-pci.c __raw_writel((0), IT8152_INTC_LPCNIRR); __raw_writel 67 arch/arm/mach-pxa/cm-x2xx-pci.c __raw_writel((sleep_save_ite[0]), IT8152_INTC_PDCNIMR); __raw_writel 68 arch/arm/mach-pxa/cm-x2xx-pci.c __raw_writel((sleep_save_ite[1]), IT8152_INTC_LPCNIMR); __raw_writel 69 arch/arm/mach-pxa/cm-x2xx-pci.c __raw_writel((sleep_save_ite[2]), IT8152_INTC_LPNIAR); __raw_writel 128 arch/arm/mach-pxa/cm-x2xx-pci.c __raw_writel(0x800, IT8152_PCI_CFG_ADDR); __raw_writel 429 arch/arm/mach-pxa/cm-x2xx.c __raw_writel(sleep_save_msc[0], MSC0); __raw_writel 430 arch/arm/mach-pxa/cm-x2xx.c __raw_writel(sleep_save_msc[1], MSC1); __raw_writel 431 arch/arm/mach-pxa/cm-x2xx.c __raw_writel(sleep_save_msc[2], MSC2); __raw_writel 266 arch/arm/mach-pxa/csb726.c __raw_writel((__raw_readl(MSC2) & ~0xffff) | 0x7ff4, MSC2); /* SM501 */ __raw_writel 173 arch/arm/mach-pxa/h5000.c __raw_writel(0x129c24f2, MSC0); __raw_writel 174 arch/arm/mach-pxa/h5000.c __raw_writel(0x7ff424fa, MSC1); __raw_writel 175 arch/arm/mach-pxa/h5000.c __raw_writel(0x7ff47ff4, MSC2); __raw_writel 177 arch/arm/mach-pxa/h5000.c __raw_writel(__raw_readl(MDREFR) | 0x02080000, MDREFR); __raw_writel 71 arch/arm/mach-pxa/irq.c __raw_writel(icmr, base + ICMR); __raw_writel 81 arch/arm/mach-pxa/irq.c __raw_writel(icmr, base + ICMR); __raw_writel 128 arch/arm/mach-pxa/irq.c __raw_writel(hw | IPR_VALID, pxa_irq_base + IPR(hw)); __raw_writel 159 arch/arm/mach-pxa/irq.c __raw_writel(0, base + ICMR); /* disable all IRQs */ __raw_writel 160 arch/arm/mach-pxa/irq.c __raw_writel(0, base + ICLR); /* all IRQs are IRQ, not FIQ */ __raw_writel 163 arch/arm/mach-pxa/irq.c __raw_writel(1, irq_base(0) + ICCR); __raw_writel 189 arch/arm/mach-pxa/irq.c __raw_writel(0, base + ICMR); __raw_writel 207 arch/arm/mach-pxa/irq.c __raw_writel(saved_icmr[i], base + ICMR); __raw_writel 208 arch/arm/mach-pxa/irq.c __raw_writel(0, base + ICLR); __raw_writel 213 arch/arm/mach-pxa/irq.c __raw_writel(saved_ipr[i], pxa_irq_base + IPR(i)); __raw_writel 215 arch/arm/mach-pxa/irq.c __raw_writel(1, pxa_irq_base + ICCR); __raw_writel 731 arch/arm/mach-pxa/mioa701.c __raw_writel(0x7ff02dd8, MSC0); __raw_writel 732 arch/arm/mach-pxa/mioa701.c __raw_writel(0x0001c391, MCMEM0); __raw_writel 733 arch/arm/mach-pxa/mioa701.c __raw_writel(0x0001c391, MCATT0); __raw_writel 734 arch/arm/mach-pxa/mioa701.c __raw_writel(0x0001c391, MCIO0); __raw_writel 122 arch/arm/mach-pxa/pxa27x.c __raw_writel(sleep_save[SLEEP_SAVE_MDREFR], MDREFR); __raw_writel 46 arch/arm/mach-pxa/pxa3xx-ulpi.c __raw_writel(val, u2d->mmio_base + reg); __raw_writel 36 arch/arm/mach-pxa/smemc.c __raw_writel(msc[0], MSC0); __raw_writel 37 arch/arm/mach-pxa/smemc.c __raw_writel(msc[1], MSC1); __raw_writel 38 arch/arm/mach-pxa/smemc.c __raw_writel(sxcnfg, SXCNFG); __raw_writel 39 arch/arm/mach-pxa/smemc.c __raw_writel(memclkcfg, MEMCLKCFG); __raw_writel 40 arch/arm/mach-pxa/smemc.c __raw_writel(csadrcfg[0], CSADRCFG0); __raw_writel 41 arch/arm/mach-pxa/smemc.c __raw_writel(csadrcfg[1], CSADRCFG1); __raw_writel 42 arch/arm/mach-pxa/smemc.c __raw_writel(csadrcfg[2], CSADRCFG2); __raw_writel 43 arch/arm/mach-pxa/smemc.c __raw_writel(csadrcfg[3], CSADRCFG3); __raw_writel 45 arch/arm/mach-pxa/smemc.c __raw_writel(0x2, CSMSADRCFG); __raw_writel 64 arch/arm/mach-pxa/smemc.c __raw_writel(0x2, CSMSADRCFG); __raw_writel 972 arch/arm/mach-pxa/spitz.c __raw_writel((msc0 & 0xffff) | 0x7ee00000, MSC0); __raw_writel 981 arch/arm/mach-pxa/stargate2.c __raw_writel(__raw_readl(MECR) & ~MECR_NOS, MECR); __raw_writel 893 arch/arm/mach-pxa/tosa.c __raw_writel((msc0 & 0xffff) | 0x7ee00000, MSC0); __raw_writel 172 arch/arm/mach-pxa/xcep.c __raw_writel((__raw_readl(MSC1) & 0xffff) | 0xD5540000, MSC1); __raw_writel 174 arch/arm/mach-pxa/xcep.c __raw_writel((__raw_readl(MSC2) & 0xffff) | 0x72A00000, MSC2); __raw_writel 871 arch/arm/mach-pxa/zeus.c __raw_writel(msc0, MSC0); __raw_writel 872 arch/arm/mach-pxa/zeus.c __raw_writel(msc1, MSC1); __raw_writel 57 arch/arm/mach-rpc/include/mach/hardware.h #define vidc_writel(val) __raw_writel(val, VIDC_BASE) __raw_writel 184 arch/arm/mach-s3c24xx/common.c __raw_writel(__raw_readl(S3C2410_CLKCON) | S3C2410_CLKCON_IDLE, __raw_writel 193 arch/arm/mach-s3c24xx/common.c __raw_writel(__raw_readl(S3C2410_CLKCON) & ~S3C2410_CLKCON_IDLE, __raw_writel 51 arch/arm/mach-s3c24xx/cpufreq-utils.c __raw_writel(refval, S3C2410_REFRESH); __raw_writel 25 arch/arm/mach-s3c24xx/include/mach/pm-core.h __raw_writel(tmp, S3C2410_CLKCON); __raw_writel 31 arch/arm/mach-s3c24xx/include/mach/pm-core.h __raw_writel(s3c_irqwake_intmask, S3C2410_INTMSK); __raw_writel 32 arch/arm/mach-s3c24xx/include/mach/pm-core.h __raw_writel(s3c_irqwake_eintmask, S3C2410_EINTMASK); __raw_writel 36 arch/arm/mach-s3c24xx/include/mach/pm-core.h __raw_writel(__raw_readl(S3C2410_EINTPEND), S3C2410_EINTPEND); __raw_writel 37 arch/arm/mach-s3c24xx/include/mach/pm-core.h __raw_writel(__raw_readl(S3C2410_INTPND), S3C2410_INTPND); __raw_writel 38 arch/arm/mach-s3c24xx/include/mach/pm-core.h __raw_writel(__raw_readl(S3C2410_SRCPND), S3C2410_SRCPND); __raw_writel 44 arch/arm/mach-s3c24xx/include/mach/pm-core.h __raw_writel(0x00, S3C2410_CLKCON); /* turn off clocks over sleep */ __raw_writel 412 arch/arm/mach-s3c24xx/iotiming-s3c2410.c __raw_writel(bt->bankcon, bank_reg(bank)); __raw_writel 187 arch/arm/mach-s3c24xx/iotiming-s3c2412.c __raw_writel(bt->smbidcyr, regs + SMBIDCYR); __raw_writel 188 arch/arm/mach-s3c24xx/iotiming-s3c2412.c __raw_writel(bt->smbwstrd, regs + SMBWSTRDR); __raw_writel 189 arch/arm/mach-s3c24xx/iotiming-s3c2412.c __raw_writel(bt->smbwstwr, regs + SMBWSTWRR); __raw_writel 190 arch/arm/mach-s3c24xx/iotiming-s3c2412.c __raw_writel(bt->smbwstoen, regs + SMBWSTOENR); __raw_writel 191 arch/arm/mach-s3c24xx/iotiming-s3c2412.c __raw_writel(bt->smbwstwen, regs + SMBWSTWENR); __raw_writel 192 arch/arm/mach-s3c24xx/iotiming-s3c2412.c __raw_writel(bt->smbwstbrd, regs + SMBWSTBRDR); __raw_writel 277 arch/arm/mach-s3c24xx/iotiming-s3c2412.c __raw_writel(refresh, S3C2412_REFRESH); __raw_writel 80 arch/arm/mach-s3c24xx/irq-pm.c __raw_writel(save_extint[i], S3C24XX_EXTINT0 + (i*4)); __raw_writel 83 arch/arm/mach-s3c24xx/irq-pm.c __raw_writel(save_eintflt[i], S3C24XX_EINFLT0 + (i*4)); __raw_writel 86 arch/arm/mach-s3c24xx/irq-pm.c __raw_writel(save_eintmask, S3C24XX_EINTMASK); __raw_writel 128 arch/arm/mach-s3c24xx/mach-h1940.c __raw_writel(latch_state, H1940_LATCH); __raw_writel 501 arch/arm/mach-s3c24xx/mach-jive.c __raw_writel(0x2BED, S3C2412_INFORM0); __raw_writel 502 arch/arm/mach-s3c24xx/mach-jive.c __raw_writel(__pa_symbol(s3c_cpu_resume), S3C2412_INFORM1); __raw_writel 509 arch/arm/mach-s3c24xx/mach-jive.c __raw_writel(0x0, S3C2412_INFORM0); __raw_writel 555 arch/arm/mach-s3c24xx/mach-jive.c __raw_writel(S3C2412_SLPCON_IN(0) | __raw_writel 569 arch/arm/mach-s3c24xx/mach-jive.c __raw_writel(S3C2412_SLPCON_PULL(0) | __raw_writel 589 arch/arm/mach-s3c24xx/mach-jive.c __raw_writel(S3C2412_SLPCON_ALL_PULL, S3C2412_GPDSLPCON); __raw_writel 593 arch/arm/mach-s3c24xx/mach-jive.c __raw_writel(S3C2412_SLPCON_LOW(0) | __raw_writel 604 arch/arm/mach-s3c24xx/mach-jive.c __raw_writel(S3C2412_SLPCON_IN(0) | __raw_writel 623 arch/arm/mach-s3c24xx/mach-jive.c __raw_writel(S3C2412_SLPCON_PULL(0) | __raw_writel 415 arch/arm/mach-s3c24xx/mach-n30.c __raw_writel(0x007fffff, S3C2410_GPACON); __raw_writel 417 arch/arm/mach-s3c24xx/mach-n30.c __raw_writel(0x007fefff, S3C2410_GPACON); __raw_writel 418 arch/arm/mach-s3c24xx/mach-n30.c __raw_writel(0x00000000, S3C2410_GPADAT); __raw_writel 433 arch/arm/mach-s3c24xx/mach-n30.c __raw_writel(0x00154556, S3C2410_GPBCON); __raw_writel 434 arch/arm/mach-s3c24xx/mach-n30.c __raw_writel(0x00000750, S3C2410_GPBDAT); __raw_writel 435 arch/arm/mach-s3c24xx/mach-n30.c __raw_writel(0x00000073, S3C2410_GPBUP); __raw_writel 452 arch/arm/mach-s3c24xx/mach-n30.c __raw_writel(0xaaa80618, S3C2410_GPCCON); __raw_writel 453 arch/arm/mach-s3c24xx/mach-n30.c __raw_writel(0x0000014c, S3C2410_GPCDAT); __raw_writel 454 arch/arm/mach-s3c24xx/mach-n30.c __raw_writel(0x0000fef2, S3C2410_GPCUP); __raw_writel 464 arch/arm/mach-s3c24xx/mach-n30.c __raw_writel(0xaa95aaa4, S3C2410_GPDCON); __raw_writel 465 arch/arm/mach-s3c24xx/mach-n30.c __raw_writel(0x00000601, S3C2410_GPDDAT); __raw_writel 466 arch/arm/mach-s3c24xx/mach-n30.c __raw_writel(0x0000fbfe, S3C2410_GPDUP); __raw_writel 473 arch/arm/mach-s3c24xx/mach-n30.c __raw_writel(0xa56aaaaa, S3C2410_GPECON); __raw_writel 474 arch/arm/mach-s3c24xx/mach-n30.c __raw_writel(0x0000efc5, S3C2410_GPEDAT); __raw_writel 475 arch/arm/mach-s3c24xx/mach-n30.c __raw_writel(0x0000f81f, S3C2410_GPEUP); __raw_writel 488 arch/arm/mach-s3c24xx/mach-n30.c __raw_writel(0x0000aaaa, S3C2410_GPFCON); __raw_writel 489 arch/arm/mach-s3c24xx/mach-n30.c __raw_writel(0x00000000, S3C2410_GPFDAT); __raw_writel 490 arch/arm/mach-s3c24xx/mach-n30.c __raw_writel(0x000000ff, S3C2410_GPFUP); __raw_writel 516 arch/arm/mach-s3c24xx/mach-n30.c __raw_writel(0xff0a956a, S3C2410_GPGCON); __raw_writel 518 arch/arm/mach-s3c24xx/mach-n30.c __raw_writel(0xff4aa92a, S3C2410_GPGCON); __raw_writel 519 arch/arm/mach-s3c24xx/mach-n30.c __raw_writel(0x0000e800, S3C2410_GPGDAT); __raw_writel 520 arch/arm/mach-s3c24xx/mach-n30.c __raw_writel(0x0000f86f, S3C2410_GPGUP); __raw_writel 535 arch/arm/mach-s3c24xx/mach-n30.c __raw_writel(0x0028aaaa, S3C2410_GPHCON); __raw_writel 536 arch/arm/mach-s3c24xx/mach-n30.c __raw_writel(0x000005ef, S3C2410_GPHDAT); __raw_writel 537 arch/arm/mach-s3c24xx/mach-n30.c __raw_writel(0x0000063f, S3C2410_GPHUP); __raw_writel 380 arch/arm/mach-s3c24xx/mach-osiris.c __raw_writel(__raw_readl(S3C2410_BWSCON) | S3C2410_BWSCON_ST1 | S3C2410_BWSCON_ST2 | S3C2410_BWSCON_ST3 | S3C2410_BWSCON_ST4 | S3C2410_BWSCON_ST5, S3C2410_BWSCON); __raw_writel 33 arch/arm/mach-s3c24xx/pm-s3c2410.c __raw_writel(__pa_symbol(s3c_cpu_resume), S3C2410_GSTATUS3); __raw_writel 48 arch/arm/mach-s3c24xx/pm-s3c2410.c __raw_writel(calc, phys_to_virt(H1940_SUSPEND_CHECKSUM)); __raw_writel 64 arch/arm/mach-s3c24xx/pm-s3c2410.c __raw_writel(calc, phys_to_virt(H1940_SUSPEND_CHECKSUM)); __raw_writel 93 arch/arm/mach-s3c24xx/pm-s3c2410.c __raw_writel(tmp, S3C2410_GSTATUS2); __raw_writel 42 arch/arm/mach-s3c24xx/pm-s3c2412.c __raw_writel(tmp, S3C2412_PWRCFG); __raw_writel 118 arch/arm/mach-s3c24xx/pm-s3c2412.c __raw_writel(tmp, S3C2412_PWRCFG); __raw_writel 27 arch/arm/mach-s3c24xx/pm-s3c2416.c __raw_writel(S3C2443_PWRCFG_SLEEP, S3C2443_PWRCFG); __raw_writel 30 arch/arm/mach-s3c24xx/pm-s3c2416.c __raw_writel(0x2BED, S3C2443_PWRMODE); __raw_writel 45 arch/arm/mach-s3c24xx/pm-s3c2416.c __raw_writel(0x2BED, S3C2412_INFORM0); __raw_writel 46 arch/arm/mach-s3c24xx/pm-s3c2416.c __raw_writel(__pa_symbol(s3c_cpu_resume), S3C2412_INFORM1); __raw_writel 74 arch/arm/mach-s3c24xx/pm-s3c2416.c __raw_writel(0x0, S3C2443_PWRMODE); __raw_writel 75 arch/arm/mach-s3c24xx/pm-s3c2416.c __raw_writel(0x0, S3C2412_INFORM0); __raw_writel 76 arch/arm/mach-s3c24xx/pm-s3c2416.c __raw_writel(0x0, S3C2412_INFORM1); __raw_writel 119 arch/arm/mach-s3c24xx/s3c2412.c __raw_writel(tmp, S3C2412_PWRCFG); __raw_writel 57 arch/arm/mach-s3c24xx/simtec-pm.c __raw_writel(gstatus4, S3C2410_GSTATUS4); __raw_writel 255 arch/arm/mach-s3c64xx/common.c __raw_writel(mask, S3C64XX_EINT0MASK); __raw_writel 264 arch/arm/mach-s3c64xx/common.c __raw_writel(mask, S3C64XX_EINT0MASK); __raw_writel 269 arch/arm/mach-s3c64xx/common.c __raw_writel((u32)data->chip_data, S3C64XX_EINT0PEND); __raw_writel 335 arch/arm/mach-s3c64xx/common.c __raw_writel(ctrl, reg); __raw_writel 32 arch/arm/mach-s3c64xx/cpuidle.c __raw_writel(tmp, S3C64XX_PWR_CFG); __raw_writel 36 arch/arm/mach-s3c64xx/include/mach/pm-core.h __raw_writel(tmp, S3C_PCLK_GATE); __raw_writel 45 arch/arm/mach-s3c64xx/include/mach/pm-core.h __raw_writel(__raw_readl(S3C64XX_EINT0PEND), S3C64XX_EINT0PEND); __raw_writel 112 arch/arm/mach-s3c64xx/include/mach/pm-core.h __raw_writel(0, S3C64XX_SLPEN); __raw_writel 122 arch/arm/mach-s3c64xx/include/mach/pm-core.h __raw_writel(S3C64XX_SLPEN_USE_xSLP, S3C64XX_SLPEN); __raw_writel 92 arch/arm/mach-s3c64xx/irq-pm.c __raw_writel(irq_uart_mask[i], S3C_VA_UARTx(i) + S3C64XX_UINTM); __raw_writel 95 arch/arm/mach-s3c64xx/irq-pm.c __raw_writel(grp->con, S3C64XX_EINT12CON + (i * 4)); __raw_writel 96 arch/arm/mach-s3c64xx/irq-pm.c __raw_writel(grp->mask, S3C64XX_EINT12MASK + (i * 4)); __raw_writel 97 arch/arm/mach-s3c64xx/irq-pm.c __raw_writel(grp->fltcon, S3C64XX_EINT12FLTCON + (i * 4)); __raw_writel 92 arch/arm/mach-s3c64xx/mach-anw6410.c __raw_writel(tmp, S3C64XX_SPCON); __raw_writel 97 arch/arm/mach-s3c64xx/mach-anw6410.c __raw_writel(tmp, S3C64XX_MODEM_MIFPCON); __raw_writel 108 arch/arm/mach-s3c64xx/mach-anw6410.c __raw_writel(anw6410_extdev_status, ANW6410_VA_EXTDEV); __raw_writel 114 arch/arm/mach-s3c64xx/mach-anw6410.c __raw_writel(anw6410_extdev_status, ANW6410_VA_EXTDEV); __raw_writel 162 arch/arm/mach-s3c64xx/mach-anw6410.c __raw_writel(anw6410_extdev_status, ANW6410_VA_EXTDEV); __raw_writel 247 arch/arm/mach-s3c64xx/mach-mini6410.c __raw_writel(tmp, S3C64XX_SPCON); __raw_writel 252 arch/arm/mach-s3c64xx/mach-mini6410.c __raw_writel(tmp, S3C64XX_MODEM_MIFPCON); __raw_writel 340 arch/arm/mach-s3c64xx/mach-mini6410.c __raw_writel(cs1, S3C64XX_SROM_BW); __raw_writel 344 arch/arm/mach-s3c64xx/mach-mini6410.c __raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) | __raw_writel 217 arch/arm/mach-s3c64xx/mach-real6410.c __raw_writel(tmp, S3C64XX_SPCON); __raw_writel 222 arch/arm/mach-s3c64xx/mach-real6410.c __raw_writel(tmp, S3C64XX_MODEM_MIFPCON); __raw_writel 309 arch/arm/mach-s3c64xx/mach-real6410.c __raw_writel(cs1, S3C64XX_SROM_BW); __raw_writel 313 arch/arm/mach-s3c64xx/mach-real6410.c __raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) | __raw_writel 279 arch/arm/mach-s3c64xx/mach-smartq.c __raw_writel(tmp, S3C64XX_SPCON); __raw_writel 284 arch/arm/mach-s3c64xx/mach-smartq.c __raw_writel(tmp, S3C64XX_MODEM_MIFPCON); __raw_writel 645 arch/arm/mach-s3c64xx/mach-smdk6410.c __raw_writel(tmp, S3C64XX_SPCON); __raw_writel 650 arch/arm/mach-s3c64xx/mach-smdk6410.c __raw_writel(tmp, S3C64XX_MODEM_MIFPCON); __raw_writel 674 arch/arm/mach-s3c64xx/mach-smdk6410.c __raw_writel(cs1, S3C64XX_SROM_BW); __raw_writel 678 arch/arm/mach-s3c64xx/mach-smdk6410.c __raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) | __raw_writel 50 arch/arm/mach-s3c64xx/pm.c __raw_writel(val, S3C64XX_NORMAL_CFG); __raw_writel 65 arch/arm/mach-s3c64xx/pm.c __raw_writel(val, S3C64XX_NORMAL_CFG); __raw_writel 220 arch/arm/mach-s3c64xx/pm.c __raw_writel(s3c_irqwake_eintmask, S3C64XX_EINT_MASK); __raw_writel 225 arch/arm/mach-s3c64xx/pm.c __raw_writel(0, S3C64XX_EINT_MASK); __raw_writel 254 arch/arm/mach-s3c64xx/pm.c __raw_writel(tmp, S3C64XX_PWR_CFG); __raw_writel 258 arch/arm/mach-s3c64xx/pm.c __raw_writel(__raw_readl(S3C64XX_WAKEUP_STAT), __raw_writel 302 arch/arm/mach-s3c64xx/pm.c __raw_writel(__pa_symbol(s3c_cpu_resume), S3C64XX_INFORM0); __raw_writel 305 arch/arm/mach-s3c64xx/pm.c __raw_writel(__raw_readl(S3C64XX_WAKEUP_STAT), S3C64XX_WAKEUP_STAT); __raw_writel 71 arch/arm/mach-s5pv210/pm.c __raw_writel(s5pv210_irqwake_intmask, S5P_WAKEUP_MASK); __raw_writel 74 arch/arm/mach-s5pv210/pm.c __raw_writel(__pa_symbol(s5pv210_cpu_resume), S5P_INFORM0); __raw_writel 78 arch/arm/mach-s5pv210/pm.c __raw_writel(tmp, S5P_SLEEP_CFG); __raw_writel 84 arch/arm/mach-s5pv210/pm.c __raw_writel(tmp, S5P_PWR_CFG); __raw_writel 89 arch/arm/mach-s5pv210/pm.c __raw_writel(tmp, S5P_OTHERS); __raw_writel 53 arch/arm/mach-s5pv210/s5pv210.c __raw_writel(0x1, S5P_SWRESET); __raw_writel 32 arch/arm/mach-shmobile/setup-r8a7778.c __raw_writel(0x73ffffff, base + INT2NTSR0); __raw_writel 33 arch/arm/mach-shmobile/setup-r8a7778.c __raw_writel(0xffffffff, base + INT2NTSR1); __raw_writel 36 arch/arm/mach-shmobile/setup-r8a7778.c __raw_writel(0x08330773, base + INT2SMSKCR0); __raw_writel 37 arch/arm/mach-shmobile/setup-r8a7778.c __raw_writel(0x00311110, base + INT2SMSKCR1); __raw_writel 56 arch/arm/mach-shmobile/setup-r8a7779.c __raw_writel(0xffffffff, INT2NTSR0); __raw_writel 57 arch/arm/mach-shmobile/setup-r8a7779.c __raw_writel(0x3fffffff, INT2NTSR1); __raw_writel 60 arch/arm/mach-shmobile/setup-r8a7779.c __raw_writel(0xfffffff0, INT2SMSKCR0); __raw_writel 61 arch/arm/mach-shmobile/setup-r8a7779.c __raw_writel(0xfff7ffff, INT2SMSKCR1); __raw_writel 62 arch/arm/mach-shmobile/setup-r8a7779.c __raw_writel(0xfffbffdf, INT2SMSKCR2); __raw_writel 63 arch/arm/mach-shmobile/setup-r8a7779.c __raw_writel(0xbffffffc, INT2SMSKCR3); __raw_writel 64 arch/arm/mach-shmobile/setup-r8a7779.c __raw_writel(0x003fee3f, INT2SMSKCR4); __raw_writel 40 arch/arm/mach-shmobile/smp-r8a7779.c __raw_writel(__pa(shmobile_boot_vector), AVECR); __raw_writel 32 arch/arm/mach-shmobile/smp-sh73a0.c __raw_writel(1 << lcpu, WUPCR); /* wake up */ __raw_writel 34 arch/arm/mach-shmobile/smp-sh73a0.c __raw_writel(1 << lcpu, SRESCR); /* reset */ __raw_writel 42 arch/arm/mach-shmobile/smp-sh73a0.c __raw_writel(0, APARMBAREA); /* 4k */ __raw_writel 43 arch/arm/mach-shmobile/smp-sh73a0.c __raw_writel(__pa(shmobile_boot_vector), SBAR); __raw_writel 122 arch/arm/mach-spear/platsmp.c __raw_writel(__pa_symbol(spear13xx_secondary_startup), SYS_LOCATION); __raw_writel 40 arch/arm/mach-sti/platsmp.c __raw_writel(entry_pa, cpu_strt_ptr); __raw_writel 76 arch/arm/mach-zx/platsmp.c __raw_writel(__pa_symbol(zx_secondary_startup), __raw_writel 65 arch/arm/mm/cache-b15-rac.c __raw_writel(0, b15_rac_base + RAC_CONFIG0_REG); __raw_writel 74 arch/arm/mm/cache-b15-rac.c __raw_writel(FLUSH_RAC, b15_rac_base + rac_flush_offset); __raw_writel 96 arch/arm/mm/cache-b15-rac.c __raw_writel(val, b15_rac_base + RAC_CONFIG0_REG); __raw_writel 133 arch/arm/plat-pxa/mfp.c __raw_writel(val, mfpr_mmio_base + (off)) __raw_writel 50 arch/arm/plat-samsung/gpio-samsung.c __raw_writel(pup, reg); __raw_writel 122 arch/arm/plat-samsung/gpio-samsung.c __raw_writel(pup, reg); __raw_writel 193 arch/arm/plat-samsung/gpio-samsung.c __raw_writel(con, reg); __raw_writel 256 arch/arm/plat-samsung/gpio-samsung.c __raw_writel(con, reg); __raw_writel 324 arch/arm/plat-samsung/gpio-samsung.c __raw_writel(con, reg); __raw_writel 440 arch/arm/plat-samsung/gpio-samsung.c __raw_writel(con, base + 0x00); __raw_writel 461 arch/arm/plat-samsung/gpio-samsung.c __raw_writel(dat, base + 0x04); __raw_writel 467 arch/arm/plat-samsung/gpio-samsung.c __raw_writel(con, base + 0x00); __raw_writel 468 arch/arm/plat-samsung/gpio-samsung.c __raw_writel(dat, base + 0x04); __raw_writel 502 arch/arm/plat-samsung/gpio-samsung.c __raw_writel(con, base + GPIOCON_OFF); __raw_writel 528 arch/arm/plat-samsung/gpio-samsung.c __raw_writel(dat, base + GPIODAT_OFF); __raw_writel 529 arch/arm/plat-samsung/gpio-samsung.c __raw_writel(con, base + GPIOCON_OFF); __raw_writel 530 arch/arm/plat-samsung/gpio-samsung.c __raw_writel(dat, base + GPIODAT_OFF); __raw_writel 574 arch/arm/plat-samsung/gpio-samsung.c __raw_writel(con, regcon); __raw_writel 607 arch/arm/plat-samsung/gpio-samsung.c __raw_writel(dat, base + GPIODAT_OFF); __raw_writel 608 arch/arm/plat-samsung/gpio-samsung.c __raw_writel(con, regcon); __raw_writel 609 arch/arm/plat-samsung/gpio-samsung.c __raw_writel(dat, base + GPIODAT_OFF); __raw_writel 642 arch/arm/plat-samsung/gpio-samsung.c __raw_writel(dat, base + 0x04); __raw_writel 646 arch/arm/plat-samsung/gpio-samsung.c __raw_writel(con, base + 0x00); __raw_writel 647 arch/arm/plat-samsung/gpio-samsung.c __raw_writel(dat, base + 0x04); __raw_writel 668 arch/arm/plat-samsung/gpio-samsung.c __raw_writel(dat, base + 0x04); __raw_writel 1318 arch/arm/plat-samsung/gpio-samsung.c __raw_writel(misccr, S3C24XX_MISCCR); __raw_writel 87 arch/arm/plat-samsung/pm-debug.c __raw_writel(save->ulcon, regs + S3C2410_ULCON); __raw_writel 88 arch/arm/plat-samsung/pm-debug.c __raw_writel(save->ucon, regs + S3C2410_UCON); __raw_writel 89 arch/arm/plat-samsung/pm-debug.c __raw_writel(save->ufcon, regs + S3C2410_UFCON); __raw_writel 90 arch/arm/plat-samsung/pm-debug.c __raw_writel(save->umcon, regs + S3C2410_UMCON); __raw_writel 91 arch/arm/plat-samsung/pm-debug.c __raw_writel(save->ubrdiv, regs + S3C2410_UBRDIV); __raw_writel 94 arch/arm/plat-samsung/pm-debug.c __raw_writel(save->udivslot, regs + S3C2443_DIVSLOT); __raw_writel 48 arch/arm/plat-samsung/pm-gpio.c __raw_writel(gpcon, base + OFFS_CON); __raw_writel 52 arch/arm/plat-samsung/pm-gpio.c __raw_writel(gps_gpdat, base + OFFS_DAT); __raw_writel 53 arch/arm/plat-samsung/pm-gpio.c __raw_writel(gps_gpcon, base + OFFS_CON); __raw_writel 132 arch/arm/plat-samsung/pm-gpio.c __raw_writel(chip->pm_save[2], base + OFFS_UP); __raw_writel 175 arch/arm/plat-samsung/pm-gpio.c __raw_writel(gpcon, base + OFFS_CON); __raw_writel 179 arch/arm/plat-samsung/pm-gpio.c __raw_writel(gps_gpdat, base + OFFS_DAT); __raw_writel 180 arch/arm/plat-samsung/pm-gpio.c __raw_writel(gps_gpcon, base + OFFS_CON); __raw_writel 253 arch/arm/plat-samsung/pm-gpio.c __raw_writel(gpcon, con); __raw_writel 276 arch/arm/plat-samsung/pm-gpio.c __raw_writel(chip->pm_save[2], base + OFFS_DAT); __raw_writel 277 arch/arm/plat-samsung/pm-gpio.c __raw_writel(chip->pm_save[1], base + OFFS_CON); __raw_writel 279 arch/arm/plat-samsung/pm-gpio.c __raw_writel(chip->pm_save[0], base - 4); __raw_writel 281 arch/arm/plat-samsung/pm-gpio.c __raw_writel(chip->pm_save[2], base + OFFS_DAT); __raw_writel 282 arch/arm/plat-samsung/pm-gpio.c __raw_writel(chip->pm_save[3], base + OFFS_UP); __raw_writel 41 arch/arm/plat-samsung/wakeup-mask.c __raw_writel(val, reg); __raw_writel 42 arch/arm/plat-samsung/watchdog-reset.c __raw_writel(0, wdt_base + S3C2410_WTCON); __raw_writel 45 arch/arm/plat-samsung/watchdog-reset.c __raw_writel(0x80, wdt_base + S3C2410_WTCNT); __raw_writel 46 arch/arm/plat-samsung/watchdog-reset.c __raw_writel(0x80, wdt_base + S3C2410_WTDAT); __raw_writel 49 arch/arm/plat-samsung/watchdog-reset.c __raw_writel(S3C2410_WTCON_ENABLE | S3C2410_WTCON_DIV16 | __raw_writel 36 arch/arm64/include/asm/io.h #define __raw_writel __raw_writel __raw_writel 126 arch/arm64/include/asm/io.h #define writel_relaxed(v,c) ((void)__raw_writel((__force u32)cpu_to_le32(v),(c))) __raw_writel 192 arch/arm64/include/asm/io.h #define iowrite32be(v,p) ({ __iowmb(); __raw_writel((__force __u32)cpu_to_be32(v), p); }) __raw_writel 33 arch/c6x/include/asm/soc.h #define soc_writel(b, addr) __raw_writel((b), (addr)) __raw_writel 41 arch/h8300/include/asm/io.h #define __raw_writel __raw_writel __raw_writel 172 arch/hexagon/include/asm/io.h #define writel_relaxed __raw_writel __raw_writel 61 arch/m68k/coldfire/dma_timer.c __raw_writel(0x00000000, DTRR0); __raw_writel 65 arch/m68k/coldfire/intc-2.c __raw_writel(val | imrbit, imraddr); __raw_writel 87 arch/m68k/coldfire/intc-2.c __raw_writel(val & ~imrbit, imraddr); __raw_writel 198 arch/m68k/coldfire/intc-2.c __raw_writel(0x1, MCFICM_INTC0 + MCFINTC_IMRL); __raw_writel 200 arch/m68k/coldfire/intc-2.c __raw_writel(0x1, MCFICM_INTC1 + MCFINTC_IMRL); __raw_writel 73 arch/m68k/coldfire/intc.c __raw_writel(imr | (0x1 << index), MCFSIM_IMR); __raw_writel 80 arch/m68k/coldfire/intc.c __raw_writel(imr & ~(0x1 << index), MCFSIM_IMR); __raw_writel 88 arch/m68k/coldfire/intc.c __raw_writel(imr, MCFSIM_IMR); __raw_writel 89 arch/m68k/coldfire/m54xx.c __raw_writel(0, MCF_GPT_GMS0); __raw_writel 90 arch/m68k/coldfire/m54xx.c __raw_writel(MCF_GPT_GCIR_CNT(1), MCF_GPT_GCIR0); __raw_writel 91 arch/m68k/coldfire/m54xx.c __raw_writel(MCF_GPT_GMS_WDEN | MCF_GPT_GMS_CE | MCF_GPT_GMS_TMS(4), __raw_writel 71 arch/m68k/coldfire/pci.c __raw_writel(PCICAR_E | addr, PCICAR); __raw_writel 87 arch/m68k/coldfire/pci.c __raw_writel(0, PCICAR); __raw_writel 103 arch/m68k/coldfire/pci.c __raw_writel(PCICAR_E | addr, PCICAR); __raw_writel 115 arch/m68k/coldfire/pci.c __raw_writel(cpu_to_le32(value), addr); __raw_writel 119 arch/m68k/coldfire/pci.c __raw_writel(0, PCICAR); __raw_writel 178 arch/m68k/coldfire/pci.c __raw_writel(PCIGSCR_RESET, PCIGSCR); __raw_writel 179 arch/m68k/coldfire/pci.c __raw_writel(0, PCITCR); __raw_writel 185 arch/m68k/coldfire/pci.c __raw_writel(PACR_INTMPRI | PACR_INTMINTE | PACR_EXTMPRI(0x1f) | __raw_writel 193 arch/m68k/coldfire/pci.c __raw_writel(PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | __raw_writel 195 arch/m68k/coldfire/pci.c __raw_writel(PCICR1_LT(32) | PCICR1_CL(8), PCICR1); __raw_writel 196 arch/m68k/coldfire/pci.c __raw_writel(0, PCICR2); __raw_writel 203 arch/m68k/coldfire/pci.c __raw_writel(WXBTAR(PCI_MEM_PA, PCI_MEM_BA, PCI_MEM_SIZE), __raw_writel 205 arch/m68k/coldfire/pci.c __raw_writel(WXBTAR(PCI_IO_PA, PCI_IO_BA, PCI_IO_SIZE), __raw_writel 207 arch/m68k/coldfire/pci.c __raw_writel(PCIIWCR_W0_MEM /*| PCIIWCR_W0_MRDL*/ | PCIIWCR_W0_E | __raw_writel 214 arch/m68k/coldfire/pci.c __raw_writel(CONFIG_RAMBASE, PCIBAR1); __raw_writel 215 arch/m68k/coldfire/pci.c __raw_writel(CONFIG_RAMBASE | PCITBATR1_E, PCITBATR1); __raw_writel 225 arch/m68k/coldfire/pci.c __raw_writel(0, PCIGSCR); __raw_writel 47 arch/m68k/coldfire/sltimers.c __raw_writel(MCFSLT_SSR_BE | MCFSLT_SSR_TE, PA(MCFSLT_SSR)); __raw_writel 67 arch/m68k/coldfire/sltimers.c __raw_writel(MCF_BUSCLK / PROFILEHZ - 1, PA(MCFSLT_STCNT)); __raw_writel 68 arch/m68k/coldfire/sltimers.c __raw_writel(MCFSLT_SCR_RUN | MCFSLT_SCR_IEN | MCFSLT_SCR_TEN, __raw_writel 90 arch/m68k/coldfire/sltimers.c __raw_writel(MCFSLT_SSR_BE | MCFSLT_SSR_TE, TA(MCFSLT_SSR)); __raw_writel 136 arch/m68k/coldfire/sltimers.c __raw_writel(mcfslt_cycles_per_jiffy - 1, TA(MCFSLT_STCNT)); __raw_writel 137 arch/m68k/coldfire/sltimers.c __raw_writel(MCFSLT_SCR_RUN | MCFSLT_SCR_IEN | MCFSLT_SCR_TEN, __raw_writel 42 arch/m68k/coldfire/timers.c #define __raw_writetrr __raw_writel __raw_writel 94 arch/m68k/include/asm/io_no.h __raw_writel(value, addr); __raw_writel 96 arch/m68k/include/asm/io_no.h __raw_writel(__cpu_to_le32(value), addr); __raw_writel 106 arch/m68k/include/asm/io_no.h #define writel __raw_writel __raw_writel 125 arch/m68k/include/asm/mcfgpio.h #define mcfgpio_write(data, port) __raw_writel(data, port) __raw_writel 49 arch/microblaze/include/asm/io.h #define out_be32(a, v) __raw_writel((v), (void __iomem __force *)(a)) __raw_writel 59 arch/microblaze/include/asm/io.h #define out_le32(a, v) __raw_writel(__cpu_to_le32(v), (a)) __raw_writel 85 arch/mips/alchemy/board-xxs1500.c __raw_writel(1, (void __iomem *)KSEG1ADDR(AU1000_UART3_PHYS_ADDR + 0x18)); __raw_writel 1004 arch/mips/alchemy/common/dbdma.c __raw_writel(alchemy_dbdma_pm_data[i][0] & ~1, addr + 0x00); __raw_writel 1013 arch/mips/alchemy/common/dbdma.c __raw_writel(0, addr + 0x0c); __raw_writel 1025 arch/mips/alchemy/common/dbdma.c __raw_writel(alchemy_dbdma_pm_data[0][0], addr + 0x00); __raw_writel 1026 arch/mips/alchemy/common/dbdma.c __raw_writel(alchemy_dbdma_pm_data[0][1], addr + 0x04); __raw_writel 1027 arch/mips/alchemy/common/dbdma.c __raw_writel(alchemy_dbdma_pm_data[0][2], addr + 0x08); __raw_writel 1028 arch/mips/alchemy/common/dbdma.c __raw_writel(alchemy_dbdma_pm_data[0][3], addr + 0x0c); __raw_writel 1033 arch/mips/alchemy/common/dbdma.c __raw_writel(alchemy_dbdma_pm_data[i][0], addr + 0x00); __raw_writel 1034 arch/mips/alchemy/common/dbdma.c __raw_writel(alchemy_dbdma_pm_data[i][1], addr + 0x04); __raw_writel 1035 arch/mips/alchemy/common/dbdma.c __raw_writel(alchemy_dbdma_pm_data[i][2], addr + 0x08); __raw_writel 1036 arch/mips/alchemy/common/dbdma.c __raw_writel(alchemy_dbdma_pm_data[i][3], addr + 0x0c); __raw_writel 1037 arch/mips/alchemy/common/dbdma.c __raw_writel(alchemy_dbdma_pm_data[i][4], addr + 0x10); __raw_writel 1038 arch/mips/alchemy/common/dbdma.c __raw_writel(alchemy_dbdma_pm_data[i][5], addr + 0x14); __raw_writel 293 arch/mips/alchemy/common/irq.c __raw_writel(1 << bit, base + IC_MASKSET); __raw_writel 294 arch/mips/alchemy/common/irq.c __raw_writel(1 << bit, base + IC_WAKESET); __raw_writel 303 arch/mips/alchemy/common/irq.c __raw_writel(1 << bit, base + IC_MASKSET); __raw_writel 304 arch/mips/alchemy/common/irq.c __raw_writel(1 << bit, base + IC_WAKESET); __raw_writel 313 arch/mips/alchemy/common/irq.c __raw_writel(1 << bit, base + IC_MASKCLR); __raw_writel 314 arch/mips/alchemy/common/irq.c __raw_writel(1 << bit, base + IC_WAKECLR); __raw_writel 323 arch/mips/alchemy/common/irq.c __raw_writel(1 << bit, base + IC_MASKCLR); __raw_writel 324 arch/mips/alchemy/common/irq.c __raw_writel(1 << bit, base + IC_WAKECLR); __raw_writel 337 arch/mips/alchemy/common/irq.c __raw_writel(1 << bit, base + IC_FALLINGCLR); __raw_writel 338 arch/mips/alchemy/common/irq.c __raw_writel(1 << bit, base + IC_RISINGCLR); __raw_writel 351 arch/mips/alchemy/common/irq.c __raw_writel(1 << bit, base + IC_FALLINGCLR); __raw_writel 352 arch/mips/alchemy/common/irq.c __raw_writel(1 << bit, base + IC_RISINGCLR); __raw_writel 361 arch/mips/alchemy/common/irq.c __raw_writel(1 << bit, base + IC_WAKECLR); __raw_writel 362 arch/mips/alchemy/common/irq.c __raw_writel(1 << bit, base + IC_MASKCLR); __raw_writel 363 arch/mips/alchemy/common/irq.c __raw_writel(1 << bit, base + IC_RISINGCLR); __raw_writel 364 arch/mips/alchemy/common/irq.c __raw_writel(1 << bit, base + IC_FALLINGCLR); __raw_writel 373 arch/mips/alchemy/common/irq.c __raw_writel(1 << bit, base + IC_WAKECLR); __raw_writel 374 arch/mips/alchemy/common/irq.c __raw_writel(1 << bit, base + IC_MASKCLR); __raw_writel 375 arch/mips/alchemy/common/irq.c __raw_writel(1 << bit, base + IC_RISINGCLR); __raw_writel 376 arch/mips/alchemy/common/irq.c __raw_writel(1 << bit, base + IC_FALLINGCLR); __raw_writel 452 arch/mips/alchemy/common/irq.c __raw_writel(1 << bit, base + IC_CFG2CLR); __raw_writel 453 arch/mips/alchemy/common/irq.c __raw_writel(1 << bit, base + IC_CFG1CLR); __raw_writel 454 arch/mips/alchemy/common/irq.c __raw_writel(1 << bit, base + IC_CFG0SET); __raw_writel 459 arch/mips/alchemy/common/irq.c __raw_writel(1 << bit, base + IC_CFG2CLR); __raw_writel 460 arch/mips/alchemy/common/irq.c __raw_writel(1 << bit, base + IC_CFG1SET); __raw_writel 461 arch/mips/alchemy/common/irq.c __raw_writel(1 << bit, base + IC_CFG0CLR); __raw_writel 466 arch/mips/alchemy/common/irq.c __raw_writel(1 << bit, base + IC_CFG2CLR); __raw_writel 467 arch/mips/alchemy/common/irq.c __raw_writel(1 << bit, base + IC_CFG1SET); __raw_writel 468 arch/mips/alchemy/common/irq.c __raw_writel(1 << bit, base + IC_CFG0SET); __raw_writel 473 arch/mips/alchemy/common/irq.c __raw_writel(1 << bit, base + IC_CFG2SET); __raw_writel 474 arch/mips/alchemy/common/irq.c __raw_writel(1 << bit, base + IC_CFG1CLR); __raw_writel 475 arch/mips/alchemy/common/irq.c __raw_writel(1 << bit, base + IC_CFG0SET); __raw_writel 480 arch/mips/alchemy/common/irq.c __raw_writel(1 << bit, base + IC_CFG2SET); __raw_writel 481 arch/mips/alchemy/common/irq.c __raw_writel(1 << bit, base + IC_CFG1SET); __raw_writel 482 arch/mips/alchemy/common/irq.c __raw_writel(1 << bit, base + IC_CFG0CLR); __raw_writel 487 arch/mips/alchemy/common/irq.c __raw_writel(1 << bit, base + IC_CFG2CLR); __raw_writel 488 arch/mips/alchemy/common/irq.c __raw_writel(1 << bit, base + IC_CFG1CLR); __raw_writel 489 arch/mips/alchemy/common/irq.c __raw_writel(1 << bit, base + IC_CFG0CLR); __raw_writel 523 arch/mips/alchemy/common/irq.c __raw_writel(l, r + AU1300_GPIC_PINCFG); __raw_writel 556 arch/mips/alchemy/common/irq.c __raw_writel(bit, r + AU1300_GPIC_DEVSEL); __raw_writel 589 arch/mips/alchemy/common/irq.c __raw_writel(r, AU1300_GPIC_ADDR + AU1300_GPIC_DMASEL); __raw_writel 608 arch/mips/alchemy/common/irq.c __raw_writel(bit, r + AU1300_GPIC_IDIS); __raw_writel 625 arch/mips/alchemy/common/irq.c __raw_writel(bit, r + AU1300_GPIC_IEN); __raw_writel 637 arch/mips/alchemy/common/irq.c __raw_writel(bit, r + AU1300_GPIC_IPEND); /* ack */ __raw_writel 638 arch/mips/alchemy/common/irq.c __raw_writel(bit, r + AU1300_GPIC_IDIS); /* mask */ __raw_writel 652 arch/mips/alchemy/common/irq.c __raw_writel(bit, r + AU1300_GPIC_IPEND); /* ack */ __raw_writel 718 arch/mips/alchemy/common/irq.c __raw_writel(0xffffffff, base + IC_CFG0CLR); __raw_writel 719 arch/mips/alchemy/common/irq.c __raw_writel(0xffffffff, base + IC_CFG1CLR); __raw_writel 720 arch/mips/alchemy/common/irq.c __raw_writel(0xffffffff, base + IC_CFG2CLR); __raw_writel 721 arch/mips/alchemy/common/irq.c __raw_writel(0xffffffff, base + IC_MASKCLR); __raw_writel 722 arch/mips/alchemy/common/irq.c __raw_writel(0xffffffff, base + IC_ASSIGNCLR); __raw_writel 723 arch/mips/alchemy/common/irq.c __raw_writel(0xffffffff, base + IC_WAKECLR); __raw_writel 724 arch/mips/alchemy/common/irq.c __raw_writel(0xffffffff, base + IC_SRCSET); __raw_writel 725 arch/mips/alchemy/common/irq.c __raw_writel(0xffffffff, base + IC_FALLINGCLR); __raw_writel 726 arch/mips/alchemy/common/irq.c __raw_writel(0xffffffff, base + IC_RISINGCLR); __raw_writel 727 arch/mips/alchemy/common/irq.c __raw_writel(0x00000000, base + IC_TESTBIT); __raw_writel 749 arch/mips/alchemy/common/irq.c __raw_writel(d[0], base + IC_CFG0SET); __raw_writel 750 arch/mips/alchemy/common/irq.c __raw_writel(d[1], base + IC_CFG1SET); __raw_writel 751 arch/mips/alchemy/common/irq.c __raw_writel(d[2], base + IC_CFG2SET); __raw_writel 752 arch/mips/alchemy/common/irq.c __raw_writel(d[3], base + IC_SRCSET); __raw_writel 753 arch/mips/alchemy/common/irq.c __raw_writel(d[4], base + IC_ASSIGNSET); __raw_writel 754 arch/mips/alchemy/common/irq.c __raw_writel(d[5], base + IC_WAKESET); __raw_writel 757 arch/mips/alchemy/common/irq.c __raw_writel(d[6], base + IC_MASKSET); __raw_writel 793 arch/mips/alchemy/common/irq.c __raw_writel(~0UL, base + AU1300_GPIC_IDIS + 0x0); __raw_writel 794 arch/mips/alchemy/common/irq.c __raw_writel(~0UL, base + AU1300_GPIC_IDIS + 0x4); __raw_writel 795 arch/mips/alchemy/common/irq.c __raw_writel(~0UL, base + AU1300_GPIC_IDIS + 0x8); __raw_writel 796 arch/mips/alchemy/common/irq.c __raw_writel(~0UL, base + AU1300_GPIC_IDIS + 0xc); __raw_writel 815 arch/mips/alchemy/common/irq.c __raw_writel(~0UL, base + AU1300_GPIC_IDIS + 0x0); __raw_writel 816 arch/mips/alchemy/common/irq.c __raw_writel(~0UL, base + AU1300_GPIC_IDIS + 0x4); __raw_writel 817 arch/mips/alchemy/common/irq.c __raw_writel(~0UL, base + AU1300_GPIC_IDIS + 0x8); __raw_writel 818 arch/mips/alchemy/common/irq.c __raw_writel(~0UL, base + AU1300_GPIC_IDIS + 0xc); __raw_writel 824 arch/mips/alchemy/common/irq.c __raw_writel(alchemy_gpic_pmdata[i + 5], base + (i << 2)); __raw_writel 829 arch/mips/alchemy/common/irq.c __raw_writel(alchemy_gpic_pmdata[4], base + AU1300_GPIC_DMASEL); __raw_writel 833 arch/mips/alchemy/common/irq.c __raw_writel(alchemy_gpic_pmdata[0], base + AU1300_GPIC_IEN + 0x0); __raw_writel 834 arch/mips/alchemy/common/irq.c __raw_writel(alchemy_gpic_pmdata[1], base + AU1300_GPIC_IEN + 0x4); __raw_writel 835 arch/mips/alchemy/common/irq.c __raw_writel(alchemy_gpic_pmdata[2], base + AU1300_GPIC_IEN + 0x8); __raw_writel 836 arch/mips/alchemy/common/irq.c __raw_writel(alchemy_gpic_pmdata[3], base + AU1300_GPIC_IEN + 0xc); __raw_writel 911 arch/mips/alchemy/common/irq.c __raw_writel(1 << bit, base + IC_ASSIGNSET); __raw_writel 934 arch/mips/alchemy/common/irq.c __raw_writel(~0UL, bank_base + AU1300_GPIC_IDIS); __raw_writel 936 arch/mips/alchemy/common/irq.c __raw_writel(~0UL, bank_base + AU1300_GPIC_IPEND); __raw_writel 112 arch/mips/alchemy/common/usb.c __raw_writel(r, base + USB_DWC_CTRL2); __raw_writel 118 arch/mips/alchemy/common/usb.c __raw_writel(r, base + USB_DWC_CTRL2); __raw_writel 128 arch/mips/alchemy/common/usb.c __raw_writel(1, base + USB_DWC_CTRL7); /* start OHCI clock */ __raw_writel 134 arch/mips/alchemy/common/usb.c __raw_writel(r, base + USB_DWC_CTRL3); __raw_writel 141 arch/mips/alchemy/common/usb.c __raw_writel(r, base + USB_INT_ENABLE); __raw_writel 145 arch/mips/alchemy/common/usb.c __raw_writel(0, base + USB_DWC_CTRL7); __raw_writel 150 arch/mips/alchemy/common/usb.c __raw_writel(r, base + USB_INT_ENABLE); __raw_writel 156 arch/mips/alchemy/common/usb.c __raw_writel(r, base + USB_DWC_CTRL3); __raw_writel 170 arch/mips/alchemy/common/usb.c __raw_writel(r, base + USB_DWC_CTRL3); __raw_writel 175 arch/mips/alchemy/common/usb.c __raw_writel(r, base + USB_DWC_CTRL1); __raw_writel 182 arch/mips/alchemy/common/usb.c __raw_writel(r, base + USB_INT_ENABLE); __raw_writel 187 arch/mips/alchemy/common/usb.c __raw_writel(r, base + USB_INT_ENABLE); __raw_writel 192 arch/mips/alchemy/common/usb.c __raw_writel(r, base + USB_DWC_CTRL1); __raw_writel 197 arch/mips/alchemy/common/usb.c __raw_writel(r, base + USB_DWC_CTRL3); __raw_writel 211 arch/mips/alchemy/common/usb.c __raw_writel(r, base + USB_DWC_CTRL1); __raw_writel 218 arch/mips/alchemy/common/usb.c __raw_writel(r, base + USB_INT_ENABLE); __raw_writel 223 arch/mips/alchemy/common/usb.c __raw_writel(r, base + USB_INT_ENABLE); __raw_writel 228 arch/mips/alchemy/common/usb.c __raw_writel(r, base + USB_DWC_CTRL1); __raw_writel 241 arch/mips/alchemy/common/usb.c __raw_writel(r, base + USB_DWC_CTRL3); __raw_writel 246 arch/mips/alchemy/common/usb.c __raw_writel(r, base + USB_DWC_CTRL1); __raw_writel 253 arch/mips/alchemy/common/usb.c __raw_writel(r, base + USB_DWC_CTRL1); __raw_writel 258 arch/mips/alchemy/common/usb.c __raw_writel(r, base + USB_DWC_CTRL3); __raw_writel 303 arch/mips/alchemy/common/usb.c __raw_writel(0, base + USB_INT_ENABLE); /* disable all USB irqs */ __raw_writel 305 arch/mips/alchemy/common/usb.c __raw_writel(0, base + USB_DWC_CTRL3); /* disable all clocks */ __raw_writel 307 arch/mips/alchemy/common/usb.c __raw_writel(~0, base + USB_MSR_ERR); /* clear all errors */ __raw_writel 309 arch/mips/alchemy/common/usb.c __raw_writel(~0, base + USB_INT_STATUS); /* clear int status */ __raw_writel 312 arch/mips/alchemy/common/usb.c __raw_writel(USB_SBUS_CTRL_SBCA, base + USB_SBUS_CTRL); __raw_writel 320 arch/mips/alchemy/common/usb.c __raw_writel(r | USBCFG_OCE, base + AU1200_USBCFG); __raw_writel 324 arch/mips/alchemy/common/usb.c __raw_writel(r & ~USBCFG_OCE, base + AU1200_USBCFG); __raw_writel 334 arch/mips/alchemy/common/usb.c __raw_writel(r | USBCFG_ECE | USBCFG_PPE, base + AU1200_USBCFG); __raw_writel 340 arch/mips/alchemy/common/usb.c __raw_writel(r & ~USBCFG_ECE, base + AU1200_USBCFG); __raw_writel 350 arch/mips/alchemy/common/usb.c __raw_writel(r | USBCFG_UCE | USBCFG_PPE, base + AU1200_USBCFG); __raw_writel 355 arch/mips/alchemy/common/usb.c __raw_writel(r & ~USBCFG_UCE, base + AU1200_USBCFG); __raw_writel 387 arch/mips/alchemy/common/usb.c __raw_writel(USBCFG_INIT_AU1200, base + AU1200_USBCFG); __raw_writel 417 arch/mips/alchemy/common/usb.c __raw_writel(r, base); __raw_writel 438 arch/mips/alchemy/common/usb.c __raw_writel(r | USBHEN_CE, base + creg); __raw_writel 441 arch/mips/alchemy/common/usb.c __raw_writel(r | USBHEN_CE | USBHEN_E, base + creg); __raw_writel 450 arch/mips/alchemy/common/usb.c __raw_writel(r & ~(USBHEN_CE | USBHEN_E), base + creg); __raw_writel 519 arch/mips/alchemy/common/usb.c __raw_writel(0, base + 0x04); __raw_writel 521 arch/mips/alchemy/common/usb.c __raw_writel(0, base + creg); __raw_writel 524 arch/mips/alchemy/common/usb.c __raw_writel(alchemy_usb_pmdata[0], base + creg); __raw_writel 543 arch/mips/alchemy/common/usb.c __raw_writel(alchemy_usb_pmdata[0], base + 0x00); __raw_writel 544 arch/mips/alchemy/common/usb.c __raw_writel(alchemy_usb_pmdata[1], base + 0x04); __raw_writel 558 arch/mips/alchemy/common/usb.c __raw_writel(alchemy_usb_pmdata[0], base + USB_DWC_CTRL4); __raw_writel 27 arch/mips/alchemy/common/vss.c __raw_writel(3, base + VSS_CLKRST); /* enable clock, assert reset */ __raw_writel 30 arch/mips/alchemy/common/vss.c __raw_writel(0x01fffffe, base + VSS_GATE); /* maximum setup time */ __raw_writel 34 arch/mips/alchemy/common/vss.c __raw_writel(0x01, base + VSS_FTR); __raw_writel 36 arch/mips/alchemy/common/vss.c __raw_writel(0x03, base + VSS_FTR); __raw_writel 38 arch/mips/alchemy/common/vss.c __raw_writel(0x07, base + VSS_FTR); __raw_writel 40 arch/mips/alchemy/common/vss.c __raw_writel(0x0f, base + VSS_FTR); __raw_writel 43 arch/mips/alchemy/common/vss.c __raw_writel(0x01ffffff, base + VSS_GATE); /* start FSM too */ __raw_writel 46 arch/mips/alchemy/common/vss.c __raw_writel(2, base + VSS_CLKRST); /* deassert reset */ __raw_writel 49 arch/mips/alchemy/common/vss.c __raw_writel(0x1f, base + VSS_FTR); /* enable isolation cells */ __raw_writel 58 arch/mips/alchemy/common/vss.c __raw_writel(0x0f, base + VSS_FTR); /* disable isolation cells */ __raw_writel 60 arch/mips/alchemy/common/vss.c __raw_writel(0, base + VSS_GATE); /* disable FSM */ __raw_writel 62 arch/mips/alchemy/common/vss.c __raw_writel(3, base + VSS_CLKRST); /* assert reset */ __raw_writel 64 arch/mips/alchemy/common/vss.c __raw_writel(1, base + VSS_CLKRST); /* disable clock */ __raw_writel 66 arch/mips/alchemy/common/vss.c __raw_writel(0, base + VSS_FTR); /* disable all footers */ __raw_writel 917 arch/mips/alchemy/devboards/db1200.c __raw_writel(PSC_SEL_CLK_SERCLK, __raw_writel 822 arch/mips/alchemy/devboards/db1300.c __raw_writel(PSC_SEL_CLK_SERCLK, __raw_writel 825 arch/mips/alchemy/devboards/db1300.c __raw_writel(PSC_SEL_CLK_SERCLK, __raw_writel 835 arch/mips/alchemy/devboards/db1300.c __raw_writel(PSC_SEL_CLK_INTCLK, __raw_writel 48 arch/mips/alchemy/devboards/db1550.c __raw_writel(PSC_SEL_CLK_SERCLK | PSC_SEL_PS_AC97MODE, __raw_writel 50 arch/mips/alchemy/devboards/db1550.c __raw_writel(PSC_CTRL_DISABLE, base + PSC_CTRL_OFFSET); __raw_writel 52 arch/mips/alchemy/devboards/db1550.c __raw_writel(PSC_AC97RST_RST, base + PSC_AC97RST_OFFSET); __raw_writel 607 arch/mips/alchemy/devboards/db1550.c __raw_writel(PSC_SEL_CLK_SERCLK, __raw_writel 610 arch/mips/alchemy/devboards/db1550.c __raw_writel(PSC_SEL_CLK_SERCLK, __raw_writel 614 arch/mips/alchemy/devboards/db1550.c __raw_writel(PSC_SEL_CLK_INTCLK, __raw_writel 617 arch/mips/alchemy/devboards/db1550.c __raw_writel(PSC_SEL_CLK_INTCLK, __raw_writel 44 arch/mips/ath25/ar2315.c __raw_writel(val, ar2315_rst_base + reg); __raw_writel 45 arch/mips/ath25/ar5312.c __raw_writel(val, ar5312_rst_base + reg); __raw_writel 213 arch/mips/ath25/ar5312.c __raw_writel(ctl, flashctl_base + AR5312_FLASHCTL0); __raw_writel 218 arch/mips/ath25/ar5312.c __raw_writel(ctl, flashctl_base + AR5312_FLASHCTL1); __raw_writel 221 arch/mips/ath25/ar5312.c __raw_writel(ctl, flashctl_base + AR5312_FLASHCTL2); __raw_writel 21 arch/mips/ath25/early_printk.c __raw_writel(ch, base + 4 * reg); __raw_writel 61 arch/mips/ath79/common.c __raw_writel(0x1, flush_reg); __raw_writel 66 arch/mips/ath79/common.c __raw_writel(0x1, flush_reg); __raw_writel 76 arch/mips/ath79/common.c __raw_writel(AR71XX_PCI_WIN0_OFFS, ath79_ddr_pci_win_base + 0x0); __raw_writel 77 arch/mips/ath79/common.c __raw_writel(AR71XX_PCI_WIN1_OFFS, ath79_ddr_pci_win_base + 0x4); __raw_writel 78 arch/mips/ath79/common.c __raw_writel(AR71XX_PCI_WIN2_OFFS, ath79_ddr_pci_win_base + 0x8); __raw_writel 79 arch/mips/ath79/common.c __raw_writel(AR71XX_PCI_WIN3_OFFS, ath79_ddr_pci_win_base + 0xc); __raw_writel 80 arch/mips/ath79/common.c __raw_writel(AR71XX_PCI_WIN4_OFFS, ath79_ddr_pci_win_base + 0x10); __raw_writel 81 arch/mips/ath79/common.c __raw_writel(AR71XX_PCI_WIN5_OFFS, ath79_ddr_pci_win_base + 0x14); __raw_writel 82 arch/mips/ath79/common.c __raw_writel(AR71XX_PCI_WIN6_OFFS, ath79_ddr_pci_win_base + 0x18); __raw_writel 83 arch/mips/ath79/common.c __raw_writel(AR71XX_PCI_WIN7_OFFS, ath79_ddr_pci_win_base + 0x1c); __raw_writel 39 arch/mips/ath79/early_printk.c __raw_writel((unsigned char)ch, base + UART_TX * 4); __raw_writel 49 arch/mips/ath79/early_printk.c __raw_writel(AR933X_UART_DATA_TX_CSR | (unsigned char)ch, __raw_writel 97 arch/mips/ath79/early_printk.c __raw_writel(t, gpio_base + AR71XX_GPIO_REG_FUNC); __raw_writel 79 arch/mips/bmips/dma.c __raw_writel(cfg | 0x100, cbr + BMIPS_RAC_CONFIG); __raw_writel 46 arch/mips/bmips/setup.c __raw_writel(kbase | RELO_NORMAL_VEC, __raw_writel 508 arch/mips/include/asm/io.h __raw_writel(cpu_to_be32((val)), (__force unsigned *)(addr)) __raw_writel 156 arch/mips/include/asm/mach-ath79/ath79.h __raw_writel(val, ath79_pll_base + reg); __raw_writel 166 arch/mips/include/asm/mach-ath79/ath79.h __raw_writel(val, ath79_reset_base + reg); __raw_writel 612 arch/mips/include/asm/mach-au1x00/au1000.h __raw_writel(v, b + regofs); __raw_writel 628 arch/mips/include/asm/mach-au1x00/au1000.h __raw_writel(v, b + regofs); __raw_writel 730 arch/mips/include/asm/mach-au1x00/au1000.h __raw_writel(0, addr + 0x100); __raw_writel 732 arch/mips/include/asm/mach-au1x00/au1000.h __raw_writel(1, addr + 0x100); __raw_writel 735 arch/mips/include/asm/mach-au1x00/au1000.h __raw_writel(3, addr + 0x100); __raw_writel 743 arch/mips/include/asm/mach-au1x00/au1000.h __raw_writel(0, addr + 0x100); /* UART_MOD_CNTRL */ __raw_writel 762 arch/mips/include/asm/mach-au1x00/au1000.h __raw_writel(c, base + 0x04); /* tx */ __raw_writel 160 arch/mips/include/asm/mach-au1x00/au1000_dma.h __raw_writel(DMA_BE0, chan->io + DMA_MODE_SET); __raw_writel 169 arch/mips/include/asm/mach-au1x00/au1000_dma.h __raw_writel(DMA_BE1, chan->io + DMA_MODE_SET); __raw_writel 177 arch/mips/include/asm/mach-au1x00/au1000_dma.h __raw_writel(DMA_BE0 | DMA_BE1, chan->io + DMA_MODE_SET); __raw_writel 186 arch/mips/include/asm/mach-au1x00/au1000_dma.h __raw_writel(DMA_GO, chan->io + DMA_MODE_SET); __raw_writel 198 arch/mips/include/asm/mach-au1x00/au1000_dma.h __raw_writel(DMA_GO, chan->io + DMA_MODE_CLEAR); __raw_writel 218 arch/mips/include/asm/mach-au1x00/au1000_dma.h __raw_writel(~DMA_GO, chan->io + DMA_MODE_CLEAR); __raw_writel 242 arch/mips/include/asm/mach-au1x00/au1000_dma.h __raw_writel(CPHYSADDR(chan->fifo_addr), chan->io + DMA_PERIPHERAL_ADDR); __raw_writel 248 arch/mips/include/asm/mach-au1x00/au1000_dma.h __raw_writel(~mode, chan->io + DMA_MODE_CLEAR); __raw_writel 249 arch/mips/include/asm/mach-au1x00/au1000_dma.h __raw_writel(mode, chan->io + DMA_MODE_SET); __raw_writel 307 arch/mips/include/asm/mach-au1x00/au1000_dma.h __raw_writel(CPHYSADDR(a), chan->io + DMA_PERIPHERAL_ADDR); __raw_writel 319 arch/mips/include/asm/mach-au1x00/au1000_dma.h __raw_writel(DMA_D0, chan->io + DMA_MODE_CLEAR); __raw_writel 328 arch/mips/include/asm/mach-au1x00/au1000_dma.h __raw_writel(DMA_D1, chan->io + DMA_MODE_CLEAR); __raw_writel 347 arch/mips/include/asm/mach-au1x00/au1000_dma.h __raw_writel(a, chan->io + DMA_BUFFER0_START); __raw_writel 359 arch/mips/include/asm/mach-au1x00/au1000_dma.h __raw_writel(a, chan->io + DMA_BUFFER1_START); __raw_writel 373 arch/mips/include/asm/mach-au1x00/au1000_dma.h __raw_writel(count, chan->io + DMA_BUFFER0_COUNT); __raw_writel 386 arch/mips/include/asm/mach-au1x00/au1000_dma.h __raw_writel(count, chan->io + DMA_BUFFER1_COUNT); __raw_writel 399 arch/mips/include/asm/mach-au1x00/au1000_dma.h __raw_writel(count, chan->io + DMA_BUFFER0_COUNT); __raw_writel 400 arch/mips/include/asm/mach-au1x00/au1000_dma.h __raw_writel(count, chan->io + DMA_BUFFER1_COUNT); __raw_writel 276 arch/mips/include/asm/mach-au1x00/gpio-au1000.h __raw_writel(0, base + 0x110); /* the write op is key */ __raw_writel 294 arch/mips/include/asm/mach-au1x00/gpio-au1000.h __raw_writel(d, base + AU1000_GPIO2_DIR); __raw_writel 303 arch/mips/include/asm/mach-au1x00/gpio-au1000.h __raw_writel(mask, base + AU1000_GPIO2_OUTPUT); __raw_writel 367 arch/mips/include/asm/mach-au1x00/gpio-au1000.h __raw_writel(r, base + AU1000_GPIO2_INTENABLE); __raw_writel 444 arch/mips/include/asm/mach-au1x00/gpio-au1000.h __raw_writel(3, base + AU1000_GPIO2_ENABLE); /* reset, clock enabled */ __raw_writel 446 arch/mips/include/asm/mach-au1x00/gpio-au1000.h __raw_writel(1, base + AU1000_GPIO2_ENABLE); /* clock enabled */ __raw_writel 458 arch/mips/include/asm/mach-au1x00/gpio-au1000.h __raw_writel(2, base + AU1000_GPIO2_ENABLE); /* reset, clock disabled */ __raw_writel 49 arch/mips/include/asm/mach-au1x00/gpio-au1300.h __raw_writel(bit, roff + AU1300_GPIC_DEVCLR); __raw_writel 64 arch/mips/include/asm/mach-au1x00/gpio-au1300.h __raw_writel(bit, roff + (v ? AU1300_GPIC_PINVAL __raw_writel 15 arch/mips/include/asm/mach-lantiq/lantiq.h #define ltq_w32(val, reg) __raw_writel(val, reg) __raw_writel 37 arch/mips/include/asm/mach-ralink/ralink_regs.h __raw_writel(val, rt_sysc_membase + reg); __raw_writel 49 arch/mips/include/asm/mach-ralink/ralink_regs.h __raw_writel(val | set, rt_sysc_membase + reg); __raw_writel 54 arch/mips/include/asm/mach-ralink/ralink_regs.h __raw_writel(val, rt_memc_membase + reg); __raw_writel 30 arch/mips/include/asm/mach-rc32434/dma_v.h __raw_writel(0, &ch->dmac); __raw_writel 33 arch/mips/include/asm/mach-rc32434/dma_v.h __raw_writel(0, &ch->dmas); __raw_writel 44 arch/mips/include/asm/mach-rc32434/dma_v.h __raw_writel(0, &ch->dmandptr); __raw_writel 45 arch/mips/include/asm/mach-rc32434/dma_v.h __raw_writel(dma_addr, &ch->dmadptr); __raw_writel 50 arch/mips/include/asm/mach-rc32434/dma_v.h __raw_writel(dma_addr, &ch->dmandptr); __raw_writel 50 arch/mips/include/asm/mips-cps.h __raw_writel(val, addr_##unit##_##name()); \ __raw_writel 59 arch/mips/include/asm/mips-cps.h __raw_writel((uint64_t)val >> 32, \ __raw_writel 61 arch/mips/include/asm/mips-cps.h __raw_writel(val, addr_##unit##_##name()); \ __raw_writel 68 arch/mips/include/asm/mips-gic.h __raw_writel(val, addr_gic_##name(intr)); \ __raw_writel 121 arch/mips/include/asm/mips-gic.h __raw_writel(BIT(intr % 32), addr); \ __raw_writel 145 arch/mips/include/asm/mips-gic.h __raw_writel(_val, addr); \ __raw_writel 817 arch/mips/include/asm/pci/bridge.h #define bridge_write(bc, reg, val) __raw_writel(val, &bc->base->reg) __raw_writel 819 arch/mips/include/asm/pci/bridge.h __raw_writel(__raw_readl(&bc->base->reg) | (val), &bc->base->reg) __raw_writel 821 arch/mips/include/asm/pci/bridge.h __raw_writel(__raw_readl(&bc->base->reg) & ~(val), &bc->base->reg) __raw_writel 63 arch/mips/kernel/cevt-txx9.c __raw_writel(TCR_BASE, &tmrptr->tcr); __raw_writel 64 arch/mips/kernel/cevt-txx9.c __raw_writel(0, &tmrptr->tisr); __raw_writel 65 arch/mips/kernel/cevt-txx9.c __raw_writel(TIMER_CCD, &tmrptr->ccdr); __raw_writel 66 arch/mips/kernel/cevt-txx9.c __raw_writel(TXx9_TMITMR_TZCE, &tmrptr->itmr); __raw_writel 67 arch/mips/kernel/cevt-txx9.c __raw_writel(1 << TXX9_CLOCKSOURCE_BITS, &tmrptr->cpra); __raw_writel 68 arch/mips/kernel/cevt-txx9.c __raw_writel(TCR_BASE | TXx9_TMTCR_TCE, &tmrptr->tcr); __raw_writel 83 arch/mips/kernel/cevt-txx9.c __raw_writel(TCR_BASE, &tmrptr->tcr); __raw_writel 85 arch/mips/kernel/cevt-txx9.c __raw_writel(0, &tmrptr->tisr); __raw_writel 96 arch/mips/kernel/cevt-txx9.c __raw_writel(TXx9_TMITMR_TIIE | TXx9_TMITMR_TZCE, &tmrptr->itmr); __raw_writel 98 arch/mips/kernel/cevt-txx9.c __raw_writel(((u64)(NSEC_PER_SEC / HZ) * evt->mult) >> evt->shift, __raw_writel 100 arch/mips/kernel/cevt-txx9.c __raw_writel(TCR_BASE | TXx9_TMTCR_TCE, &tmrptr->tcr); __raw_writel 111 arch/mips/kernel/cevt-txx9.c __raw_writel(TXx9_TMITMR_TIIE, &tmrptr->itmr); __raw_writel 122 arch/mips/kernel/cevt-txx9.c __raw_writel(0, &tmrptr->itmr); __raw_writel 133 arch/mips/kernel/cevt-txx9.c __raw_writel(TIMER_CCD, &tmrptr->ccdr); __raw_writel 134 arch/mips/kernel/cevt-txx9.c __raw_writel(0, &tmrptr->itmr); __raw_writel 147 arch/mips/kernel/cevt-txx9.c __raw_writel(delta, &tmrptr->cpra); __raw_writel 148 arch/mips/kernel/cevt-txx9.c __raw_writel(TCR_BASE | TXx9_TMTCR_TCE, &tmrptr->tcr); __raw_writel 172 arch/mips/kernel/cevt-txx9.c __raw_writel(0, &tmrptr->tisr); /* ack interrupt */ __raw_writel 192 arch/mips/kernel/cevt-txx9.c __raw_writel(TIMER_CCD, &tmrptr->ccdr); __raw_writel 193 arch/mips/kernel/cevt-txx9.c __raw_writel(0, &tmrptr->itmr); __raw_writel 216 arch/mips/kernel/cevt-txx9.c __raw_writel(TXx9_TMTCR_CRE | TXx9_TMTCR_TCE, &tmrptr->tcr); __raw_writel 218 arch/mips/kernel/cevt-txx9.c __raw_writel(TXx9_TMTCR_CRE, &tmrptr->tcr); __raw_writel 219 arch/mips/kernel/cevt-txx9.c __raw_writel(0, &tmrptr->tisr); __raw_writel 220 arch/mips/kernel/cevt-txx9.c __raw_writel(0xffffffff, &tmrptr->cpra); __raw_writel 221 arch/mips/kernel/cevt-txx9.c __raw_writel(0, &tmrptr->itmr); __raw_writel 222 arch/mips/kernel/cevt-txx9.c __raw_writel(0, &tmrptr->ccdr); __raw_writel 223 arch/mips/kernel/cevt-txx9.c __raw_writel(0, &tmrptr->pgmr); __raw_writel 32 arch/mips/kernel/gpio_txx9.c __raw_writel(val, &txx9_pioptr->dout); __raw_writel 49 arch/mips/kernel/gpio_txx9.c __raw_writel(__raw_readl(&txx9_pioptr->dir) & ~(1 << offset), __raw_writel 62 arch/mips/kernel/gpio_txx9.c __raw_writel(__raw_readl(&txx9_pioptr->dir) | (1 << offset), __raw_writel 72 arch/mips/kernel/irq_txx9.c __raw_writel((__raw_readl(ilrp) & ~(0xff << ofs)) __raw_writel 77 arch/mips/kernel/irq_txx9.c __raw_writel(0, &txx9_ircptr->imr); __raw_writel 78 arch/mips/kernel/irq_txx9.c __raw_writel(irc_elevel, &txx9_ircptr->imr); __raw_writel 88 arch/mips/kernel/irq_txx9.c __raw_writel((__raw_readl(ilrp) & ~(0xff << ofs)) __raw_writel 93 arch/mips/kernel/irq_txx9.c __raw_writel(0, &txx9_ircptr->imr); __raw_writel 94 arch/mips/kernel/irq_txx9.c __raw_writel(irc_elevel, &txx9_ircptr->imr); __raw_writel 109 arch/mips/kernel/irq_txx9.c __raw_writel(TXx9_IRSCR_EIClrE | irq_nr, &txx9_ircptr->scr); __raw_writel 135 arch/mips/kernel/irq_txx9.c __raw_writel(cr, crp); __raw_writel 162 arch/mips/kernel/irq_txx9.c __raw_writel(0, &txx9_ircptr->imr); __raw_writel 164 arch/mips/kernel/irq_txx9.c __raw_writel(0, &txx9_ircptr->ilr[i]); __raw_writel 167 arch/mips/kernel/irq_txx9.c __raw_writel(0, &txx9_ircptr->cr[i]); __raw_writel 169 arch/mips/kernel/irq_txx9.c __raw_writel(TXx9_IRCER_ICE, &txx9_ircptr->cer); __raw_writel 170 arch/mips/kernel/irq_txx9.c __raw_writel(irc_elevel, &txx9_ircptr->imr); __raw_writel 514 arch/mips/kernel/smp-bmips.c __raw_writel(val, cbr + BMIPS_RELO_VECTOR_CONTROL_0); __raw_writel 518 arch/mips/kernel/smp-bmips.c __raw_writel(val, cbr + BMIPS_RELO_VECTOR_CONTROL_1); __raw_writel 601 arch/mips/kernel/smp-bmips.c __raw_writel(cfg | 0x100, cbr + BMIPS_RAC_CONFIG); __raw_writel 605 arch/mips/kernel/smp-bmips.c __raw_writel(cfg | 0xf, cbr + BMIPS_RAC_CONFIG); __raw_writel 609 arch/mips/kernel/smp-bmips.c __raw_writel(cfg | 0x0fff0000, cbr + BMIPS_RAC_ADDRESS_RANGE); __raw_writel 621 arch/mips/kernel/smp-bmips.c __raw_writel(cfg & ~0x07000000, cbr + BMIPS_L2_CONFIG); __raw_writel 28 arch/mips/loongson32/common/irq.c __raw_writel(__raw_readl(LS1X_INTC_INTCLR(n)) __raw_writel 37 arch/mips/loongson32/common/irq.c __raw_writel(__raw_readl(LS1X_INTC_INTIEN(n)) __raw_writel 46 arch/mips/loongson32/common/irq.c __raw_writel(__raw_readl(LS1X_INTC_INTIEN(n)) __raw_writel 48 arch/mips/loongson32/common/irq.c __raw_writel(__raw_readl(LS1X_INTC_INTCLR(n)) __raw_writel 57 arch/mips/loongson32/common/irq.c __raw_writel(__raw_readl(LS1X_INTC_INTIEN(n)) __raw_writel 68 arch/mips/loongson32/common/irq.c __raw_writel(__raw_readl(LS1X_INTC_INTPOL(n)) __raw_writel 70 arch/mips/loongson32/common/irq.c __raw_writel(__raw_readl(LS1X_INTC_INTEDGE(n)) __raw_writel 74 arch/mips/loongson32/common/irq.c __raw_writel(__raw_readl(LS1X_INTC_INTPOL(n)) __raw_writel 76 arch/mips/loongson32/common/irq.c __raw_writel(__raw_readl(LS1X_INTC_INTEDGE(n)) __raw_writel 80 arch/mips/loongson32/common/irq.c __raw_writel(__raw_readl(LS1X_INTC_INTPOL(n)) __raw_writel 82 arch/mips/loongson32/common/irq.c __raw_writel(__raw_readl(LS1X_INTC_INTEDGE(n)) __raw_writel 86 arch/mips/loongson32/common/irq.c __raw_writel(__raw_readl(LS1X_INTC_INTPOL(n)) __raw_writel 88 arch/mips/loongson32/common/irq.c __raw_writel(__raw_readl(LS1X_INTC_INTEDGE(n)) __raw_writel 92 arch/mips/loongson32/common/irq.c __raw_writel(__raw_readl(LS1X_INTC_INTPOL(n)) __raw_writel 94 arch/mips/loongson32/common/irq.c __raw_writel(__raw_readl(LS1X_INTC_INTEDGE(n)) __raw_writel 166 arch/mips/loongson32/common/irq.c __raw_writel(0x0, LS1X_INTC_INTIEN(n)); __raw_writel 167 arch/mips/loongson32/common/irq.c __raw_writel(0xffffffff, LS1X_INTC_INTCLR(n)); __raw_writel 168 arch/mips/loongson32/common/irq.c __raw_writel(0xffffffff, LS1X_INTC_INTPOL(n)); __raw_writel 170 arch/mips/loongson32/common/irq.c __raw_writel(n ? 0x0 : 0xe000, LS1X_INTC_INTEDGE(n)); __raw_writel 99 arch/mips/loongson32/common/platform.c __raw_writel(__raw_readl(LS1X_MUX_CTRL0) | GMAC1_USE_UART1 | __raw_writel 129 arch/mips/loongson32/common/platform.c __raw_writel(val, LS1X_MUX_CTRL1); __raw_writel 136 arch/mips/loongson32/common/platform.c __raw_writel(val, LS1X_MUX_CTRL1); __raw_writel 139 arch/mips/loongson32/common/platform.c __raw_writel(val & (~GMAC_SHUT), LS1X_MUX_CTRL0); __raw_writel 289 arch/mips/loongson32/common/platform.c __raw_writel(val | RTC_EXTCLK_EN, LS1X_RTC_CTRL); __raw_writel 26 arch/mips/loongson32/common/reset.c __raw_writel(0x1, wdt_reg_base + WDT_EN); __raw_writel 27 arch/mips/loongson32/common/reset.c __raw_writel(0x1, wdt_reg_base + WDT_TIMER); __raw_writel 28 arch/mips/loongson32/common/reset.c __raw_writel(0x1, wdt_reg_base + WDT_SET); __raw_writel 40 arch/mips/loongson32/common/time.c __raw_writel(period, timer_reg_base + PWM_HRC); __raw_writel 41 arch/mips/loongson32/common/time.c __raw_writel(period, timer_reg_base + PWM_LRC); __raw_writel 46 arch/mips/loongson32/common/time.c __raw_writel(0x0, timer_reg_base + PWM_CNT); __raw_writel 47 arch/mips/loongson32/common/time.c __raw_writel(INT_EN | CNT_EN, timer_reg_base + PWM_CTRL); __raw_writel 131 arch/mips/loongson32/common/time.c __raw_writel(INT_EN | CNT_EN, timer_reg_base + PWM_CTRL); __raw_writel 140 arch/mips/loongson32/common/time.c __raw_writel(INT_EN | CNT_EN, timer_reg_base + PWM_CTRL); __raw_writel 149 arch/mips/loongson32/common/time.c __raw_writel(__raw_readl(timer_reg_base + PWM_CTRL) & ~CNT_EN, __raw_writel 249 arch/mips/mti-malta/malta-dtshim.c __raw_writel(sc_cfg, biu_base + MSC01_SC_CFG_OFS); __raw_writel 177 arch/mips/paravirt/paravirt-irq.c __raw_writel(mask, mips_irq_chip + mips_irq_chip_reg_en_w1s); __raw_writel 184 arch/mips/paravirt/paravirt-irq.c __raw_writel(mask, mips_irq_chip + mips_irq_chip_reg_en_w1c); __raw_writel 195 arch/mips/paravirt/paravirt-irq.c __raw_writel(mask, mips_irq_chip + mips_irq_chip_reg_en_w1c); __raw_writel 202 arch/mips/paravirt/paravirt-irq.c __raw_writel(mask, mips_irq_chip + mips_irq_chip_reg_en_w1s); __raw_writel 225 arch/mips/paravirt/paravirt-irq.c __raw_writel(mask, base + (cpuid * mips_irq_cpu_stride)); __raw_writel 247 arch/mips/paravirt/paravirt-irq.c __raw_writel(mask, mips_irq_chip + mips_irq_chip_reg_raw_w1c + sizeof(u32)); __raw_writel 258 arch/mips/paravirt/paravirt-irq.c __raw_writel(mask, mips_irq_chip + mips_irq_chip_reg_raw_w1s + sizeof(u32)); __raw_writel 270 arch/mips/paravirt/paravirt-irq.c __raw_writel(mask, base + (cpuid * mips_irq_cpu_stride)); __raw_writel 137 arch/mips/pci/ops-bcm63xx.c __raw_writel(cpu_to_le32(data), pci_iospace_start); __raw_writel 64 arch/mips/pci/ops-tx4927.c __raw_writel(((bus->number & 0xff) << 0x10) __raw_writel 69 arch/mips/pci/ops-tx4927.c __raw_writel((__raw_readl(&pcicptr->pcistatus) & 0x0000ffff) __raw_writel 84 arch/mips/pci/ops-tx4927.c __raw_writel((__raw_readl(&pcicptr->pcistatus) & 0x0000ffff) __raw_writel 130 arch/mips/pci/ops-tx4927.c __raw_writel(val, &pcicptr->g2pcfgdata); __raw_writel 239 arch/mips/pci/ops-tx4927.c __raw_writel(__raw_readl(&pcicptr->pciccfg) __raw_writel 247 arch/mips/pci/ops-tx4927.c __raw_writel((channel->io_resource->end - channel->io_resource->start) __raw_writel 261 arch/mips/pci/ops-tx4927.c __raw_writel(0, &pcicptr->g2pmmask[i]); __raw_writel 266 arch/mips/pci/ops-tx4927.c __raw_writel((channel->mem_resource->end __raw_writel 281 arch/mips/pci/ops-tx4927.c __raw_writel(0, &pcicptr->p2giopbase); /* 256B */ __raw_writel 284 arch/mips/pci/ops-tx4927.c __raw_writel(0, &pcicptr->p2gm0plbase); __raw_writel 285 arch/mips/pci/ops-tx4927.c __raw_writel(0, &pcicptr->p2gm0pubase); __raw_writel 294 arch/mips/pci/ops-tx4927.c __raw_writel(0xffffffff, &pcicptr->p2gm1plbase); __raw_writel 295 arch/mips/pci/ops-tx4927.c __raw_writel(0xffffffff, &pcicptr->p2gm1pubase); __raw_writel 298 arch/mips/pci/ops-tx4927.c __raw_writel(0xffffffff, &pcicptr->p2gm2pbase); /* 1MB */ __raw_writel 302 arch/mips/pci/ops-tx4927.c __raw_writel((tx4927_pci_opts.gbwc << 16) __raw_writel 307 arch/mips/pci/ops-tx4927.c __raw_writel(__raw_readl(&pcicptr->pciccfg) __raw_writel 312 arch/mips/pci/ops-tx4927.c __raw_writel(__raw_readl(&pcicptr->pciccfg) __raw_writel 316 arch/mips/pci/ops-tx4927.c __raw_writel(__raw_readl(&pcicptr->pciccfg) __raw_writel 321 arch/mips/pci/ops-tx4927.c __raw_writel(0, &pcicptr->pcicfg1); __raw_writel 323 arch/mips/pci/ops-tx4927.c __raw_writel((__raw_readl(&pcicptr->g2ptocnt) & ~0xffff) __raw_writel 329 arch/mips/pci/ops-tx4927.c __raw_writel(TX4927_PCIC_PCICSTATUS_ALL, &pcicptr->pcicstatus); __raw_writel 331 arch/mips/pci/ops-tx4927.c __raw_writel(TX4927_PCIC_PCICSTATUS_ALL, &pcicptr->pcicmask); __raw_writel 333 arch/mips/pci/ops-tx4927.c __raw_writel(TX4927_PCIC_G2PSTATUS_ALL, &pcicptr->g2pstatus); __raw_writel 335 arch/mips/pci/ops-tx4927.c __raw_writel(TX4927_PCIC_G2PSTATUS_ALL, &pcicptr->g2pmask); __raw_writel 337 arch/mips/pci/ops-tx4927.c __raw_writel((__raw_readl(&pcicptr->pcistatus) & 0x0000ffff) __raw_writel 341 arch/mips/pci/ops-tx4927.c __raw_writel(TX4927_PCIC_PCISTATUS_ALL, &pcicptr->pcimask); __raw_writel 345 arch/mips/pci/ops-tx4927.c __raw_writel(TX4927_PCIC_PBACFG_RPBA, &pcicptr->pbacfg); __raw_writel 346 arch/mips/pci/ops-tx4927.c __raw_writel(0, &pcicptr->pbabm); __raw_writel 348 arch/mips/pci/ops-tx4927.c __raw_writel(TX4927_PCIC_PBACFG_PBAEN, &pcicptr->pbacfg); __raw_writel 351 arch/mips/pci/ops-tx4927.c __raw_writel(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY __raw_writel 481 arch/mips/pci/ops-tx4927.c __raw_writel((__raw_readl(&pcicptr->pcistatus) & 0x0000ffff) __raw_writel 484 arch/mips/pci/ops-tx4927.c __raw_writel(TX4927_PCIC_G2PSTATUS_ALL, &pcicptr->g2pstatus); __raw_writel 485 arch/mips/pci/ops-tx4927.c __raw_writel(TX4927_PCIC_PBASTATUS_ALL, &pcicptr->pbastatus); __raw_writel 486 arch/mips/pci/ops-tx4927.c __raw_writel(TX4927_PCIC_PCICSTATUS_ALL, &pcicptr->pcicstatus); __raw_writel 503 arch/mips/pci/ops-tx4927.c __raw_writel(TX4927_PCIC_PBACFG_RPBA, &pcicptr->pbacfg); __raw_writel 509 arch/mips/pci/ops-tx4927.c __raw_writel(0x72543610, &pcicptr->pbareqport); __raw_writel 510 arch/mips/pci/ops-tx4927.c __raw_writel(0, &pcicptr->pbabm); __raw_writel 512 arch/mips/pci/ops-tx4927.c __raw_writel(TX4927_PCIC_PBACFG_FIXPA, &pcicptr->pbacfg); __raw_writel 514 arch/mips/pci/ops-tx4927.c __raw_writel(TX4927_PCIC_PBACFG_FIXPA | __raw_writel 116 arch/mips/pci/pci-alchemy.c __raw_writel(r, ctx->regs + PCI_REG_STATCMD); __raw_writel 155 arch/mips/pci/pci-alchemy.c __raw_writel(*data, ctx->pci_cfg_vm->addr + offset); __raw_writel 175 arch/mips/pci/pci-alchemy.c __raw_writel(status & 0xf000ffff, ctx->regs + PCI_REG_STATCMD); __raw_writel 335 arch/mips/pci/pci-alchemy.c __raw_writel(ctx->pm[0], ctx->regs + PCI_REG_CMEM); __raw_writel 336 arch/mips/pci/pci-alchemy.c __raw_writel(ctx->pm[2], ctx->regs + PCI_REG_B2BMASK_CCH); __raw_writel 337 arch/mips/pci/pci-alchemy.c __raw_writel(ctx->pm[3], ctx->regs + PCI_REG_B2BBASE0_VID); __raw_writel 338 arch/mips/pci/pci-alchemy.c __raw_writel(ctx->pm[4], ctx->regs + PCI_REG_B2BBASE1_SID); __raw_writel 339 arch/mips/pci/pci-alchemy.c __raw_writel(ctx->pm[5], ctx->regs + PCI_REG_MWMASK_DEV); __raw_writel 340 arch/mips/pci/pci-alchemy.c __raw_writel(ctx->pm[6], ctx->regs + PCI_REG_MWBASE_REV_CCL); __raw_writel 341 arch/mips/pci/pci-alchemy.c __raw_writel(ctx->pm[7], ctx->regs + PCI_REG_ID); __raw_writel 342 arch/mips/pci/pci-alchemy.c __raw_writel(ctx->pm[8], ctx->regs + PCI_REG_CLASSREV); __raw_writel 343 arch/mips/pci/pci-alchemy.c __raw_writel(ctx->pm[9], ctx->regs + PCI_REG_PARAM); __raw_writel 344 arch/mips/pci/pci-alchemy.c __raw_writel(ctx->pm[10], ctx->regs + PCI_REG_MBAR); __raw_writel 345 arch/mips/pci/pci-alchemy.c __raw_writel(ctx->pm[11], ctx->regs + PCI_REG_TIMEOUT); __raw_writel 347 arch/mips/pci/pci-alchemy.c __raw_writel(ctx->pm[1], ctx->regs + PCI_REG_CONFIG); __raw_writel 437 arch/mips/pci/pci-alchemy.c __raw_writel(val, ctx->regs + PCI_REG_CONFIG); __raw_writel 477 arch/mips/pci/pci-alchemy.c __raw_writel(val, ctx->regs + PCI_REG_CONFIG); __raw_writel 198 arch/mips/pci/pci-ar2315.c __raw_writel(val, apc->mmr_mem + reg); __raw_writel 242 arch/mips/pci/pci-ar2315.c __raw_writel(value, apc->cfg_mem + addr); __raw_writel 124 arch/mips/pci/pci-ar71xx.c __raw_writel(pci_err, base + AR71XX_PCI_REG_PCI_ERR); __raw_writel 138 arch/mips/pci/pci-ar71xx.c __raw_writel(ahb_err, base + AR71XX_PCI_REG_AHB_ERR); __raw_writel 155 arch/mips/pci/pci-ar71xx.c __raw_writel(ad_cbe, base + AR71XX_PCI_REG_CRP_AD_CBE); __raw_writel 156 arch/mips/pci/pci-ar71xx.c __raw_writel(value, base + AR71XX_PCI_REG_CRP_WRDATA); __raw_writel 169 arch/mips/pci/pci-ar71xx.c __raw_writel(addr, base + AR71XX_PCI_REG_CFG_AD); __raw_writel 170 arch/mips/pci/pci-ar71xx.c __raw_writel(cmd | ar71xx_pci_get_ble(where, size, 0), __raw_writel 216 arch/mips/pci/pci-ar71xx.c __raw_writel(value, base + AR71XX_PCI_REG_CFG_WRDATA); __raw_writel 264 arch/mips/pci/pci-ar71xx.c __raw_writel(t | (1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE); __raw_writel 281 arch/mips/pci/pci-ar71xx.c __raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE); __raw_writel 299 arch/mips/pci/pci-ar71xx.c __raw_writel(0, base + AR71XX_RESET_REG_PCI_INT_ENABLE); __raw_writel 300 arch/mips/pci/pci-ar71xx.c __raw_writel(0, base + AR71XX_RESET_REG_PCI_INT_STATUS); __raw_writel 106 arch/mips/pci/pci-ar724x.c __raw_writel(data, base + (where & ~3)); __raw_writel 217 arch/mips/pci/pci-ar724x.c __raw_writel(data, base + (where & ~3)); __raw_writel 262 arch/mips/pci/pci-ar724x.c __raw_writel(t | AR724X_PCI_INT_DEV0, __raw_writel 283 arch/mips/pci/pci-ar724x.c __raw_writel(t & ~AR724X_PCI_INT_DEV0, __raw_writel 290 arch/mips/pci/pci-ar724x.c __raw_writel(t | AR724X_PCI_INT_DEV0, __raw_writel 313 arch/mips/pci/pci-ar724x.c __raw_writel(0, base + AR724X_PCI_REG_INT_MASK); __raw_writel 314 arch/mips/pci/pci-ar724x.c __raw_writel(0, base + AR724X_PCI_REG_INT_STATUS); __raw_writel 351 arch/mips/pci/pci-ar724x.c __raw_writel(app, apc->ctrl_base + AR724X_PCI_REG_APP); __raw_writel 32 arch/mips/pic32/common/reset.c __raw_writel(1, reg); __raw_writel 56 arch/mips/pic32/pic32mzda/early_console.c __raw_writel(0, uart_base + U_MODE(port)); __raw_writel 57 arch/mips/pic32/pic32mzda/early_console.c __raw_writel(((pbclk / baud) / 16) - 1, uart_base + U_BRG(port)); __raw_writel 58 arch/mips/pic32/pic32mzda/early_console.c __raw_writel(UART_ENABLE, uart_base + U_MODE(port)); __raw_writel 59 arch/mips/pic32/pic32mzda/early_console.c __raw_writel(UART_ENABLE_TX | UART_ENABLE_RX, __raw_writel 160 arch/mips/pic32/pic32mzda/early_console.c __raw_writel(c, uart_base + U_TXR(console_port)); __raw_writel 130 arch/mips/pic32/pic32mzda/early_pin.c __raw_writel(pin, pps_base + input_pin_reg[i].reg); __raw_writel 260 arch/mips/pic32/pic32mzda/early_pin.c __raw_writel(function, __raw_writel 37 arch/mips/ralink/early_printk.c __raw_writel(val, uart_membase + reg); __raw_writel 61 arch/mips/ralink/irq.c __raw_writel(val, rt_intc_membase + rt_intc_regs[reg]); __raw_writel 39 arch/mips/ralink/timer.c __raw_writel(val, rt->membase + reg); __raw_writel 61 arch/mips/rb532/setup.c __raw_writel(val, (void *)&pci_reg->pcic); __raw_writel 36 arch/mips/sgi-ip22/ip22-nvram.c __raw_writel(__raw_readl(ptr) & ~EEPROM_DATO, ptr); \ __raw_writel 37 arch/mips/sgi-ip22/ip22-nvram.c __raw_writel(__raw_readl(ptr) & ~EEPROM_ECLK, ptr); \ __raw_writel 38 arch/mips/sgi-ip22/ip22-nvram.c __raw_writel(__raw_readl(ptr) & ~EEPROM_EPROT, ptr); \ __raw_writel 40 arch/mips/sgi-ip22/ip22-nvram.c __raw_writel(__raw_readl(ptr) | EEPROM_CSEL, ptr); \ __raw_writel 41 arch/mips/sgi-ip22/ip22-nvram.c __raw_writel(__raw_readl(ptr) | EEPROM_ECLK, ptr); }) __raw_writel 45 arch/mips/sgi-ip22/ip22-nvram.c __raw_writel(__raw_readl(ptr) & ~EEPROM_ECLK, ptr); \ __raw_writel 46 arch/mips/sgi-ip22/ip22-nvram.c __raw_writel(__raw_readl(ptr) & ~EEPROM_CSEL, ptr); \ __raw_writel 47 arch/mips/sgi-ip22/ip22-nvram.c __raw_writel(__raw_readl(ptr) | EEPROM_EPROT, ptr); \ __raw_writel 48 arch/mips/sgi-ip22/ip22-nvram.c __raw_writel(__raw_readl(ptr) | EEPROM_ECLK, ptr); }) __raw_writel 64 arch/mips/sgi-ip22/ip22-nvram.c __raw_writel(__raw_readl(ctrl) | EEPROM_DATO, ctrl); __raw_writel 66 arch/mips/sgi-ip22/ip22-nvram.c __raw_writel(__raw_readl(ctrl) & ~EEPROM_DATO, ctrl); __raw_writel 67 arch/mips/sgi-ip22/ip22-nvram.c __raw_writel(__raw_readl(ctrl) & ~EEPROM_ECLK, ctrl); __raw_writel 69 arch/mips/sgi-ip22/ip22-nvram.c __raw_writel(__raw_readl(ctrl) | EEPROM_ECLK, ctrl); __raw_writel 74 arch/mips/sgi-ip22/ip22-nvram.c __raw_writel(__raw_readl(ctrl) & ~EEPROM_DATO, ctrl); __raw_writel 82 arch/mips/sgi-ip22/ip22-nvram.c __raw_writel(__raw_readl(ctrl) & ~EEPROM_EPROT, ctrl); __raw_writel 88 arch/mips/sgi-ip22/ip22-nvram.c __raw_writel(__raw_readl(ctrl) & ~EEPROM_ECLK, ctrl); __raw_writel 90 arch/mips/sgi-ip22/ip22-nvram.c __raw_writel(__raw_readl(ctrl) | EEPROM_ECLK, ctrl); __raw_writel 66 arch/mips/txx9/generic/irq_tx4939.c __raw_writel((__raw_readl(lvlp) & ~(0xff << ofs)) __raw_writel 84 arch/mips/txx9/generic/irq_tx4939.c __raw_writel((__raw_readl(lvlp) & ~(0xff << ofs)) __raw_writel 98 arch/mips/txx9/generic/irq_tx4939.c __raw_writel((TXx9_IRSCR_EIClrE | (irq_nr & 0xf)) __raw_writel 141 arch/mips/txx9/generic/irq_tx4939.c __raw_writel(cr, crp); __raw_writel 172 arch/mips/txx9/generic/irq_tx4939.c __raw_writel(0, &tx4939_ircptr->den.r); __raw_writel 173 arch/mips/txx9/generic/irq_tx4939.c __raw_writel(0, &tx4939_ircptr->maskint.r); __raw_writel 174 arch/mips/txx9/generic/irq_tx4939.c __raw_writel(0, &tx4939_ircptr->maskext.r); __raw_writel 184 arch/mips/txx9/generic/irq_tx4939.c __raw_writel(0, &tx4939_ircptr->msk.r); __raw_writel 186 arch/mips/txx9/generic/irq_tx4939.c __raw_writel(0, &tx4939_ircptr->lvl[i].r); __raw_writel 189 arch/mips/txx9/generic/irq_tx4939.c __raw_writel(0, &tx4939_ircptr->dm[i].r); __raw_writel 191 arch/mips/txx9/generic/irq_tx4939.c __raw_writel(0, &tx4939_ircptr->dm2[i].r); __raw_writel 193 arch/mips/txx9/generic/irq_tx4939.c __raw_writel(TXx9_IRCER_ICE, &tx4939_ircptr->den.r); __raw_writel 194 arch/mips/txx9/generic/irq_tx4939.c __raw_writel(irc_elevel, &tx4939_ircptr->msk.r); __raw_writel 404 arch/mips/txx9/generic/setup.c __raw_writel(TXx9_TMWTMR_WDIS | TXx9_TMWTMR_TWC, &tmrptr->wtmr); __raw_writel 405 arch/mips/txx9/generic/setup.c __raw_writel(0, &tmrptr->tcr); __raw_writel 407 arch/mips/txx9/generic/setup.c __raw_writel(TXx9_TMWTMR_TWIE, &tmrptr->wtmr); __raw_writel 408 arch/mips/txx9/generic/setup.c __raw_writel(1, &tmrptr->cpra); /* immediate */ __raw_writel 409 arch/mips/txx9/generic/setup.c __raw_writel(TXx9_TMTCR_TCE | TXx9_TMTCR_CCDE | TXx9_TMTCR_TMODE_WDOG, __raw_writel 484 arch/mips/txx9/generic/setup.c __raw_writel(c, early_txx9_sio_port + TXX9_SITFIFO); __raw_writel 93 arch/mips/txx9/generic/setup_tx3927.c __raw_writel(0, &tx3927_pioptr->maskcpu); __raw_writel 94 arch/mips/txx9/generic/setup_tx3927.c __raw_writel(0, &tx3927_pioptr->maskext); __raw_writel 216 arch/mips/txx9/generic/setup_tx4927.c __raw_writel(0, &tx4927_pioptr->maskcpu); __raw_writel 217 arch/mips/txx9/generic/setup_tx4927.c __raw_writel(0, &tx4927_pioptr->maskext); __raw_writel 242 arch/mips/txx9/generic/setup_tx4938.c __raw_writel(0, &tx4938_pioptr->maskcpu); __raw_writel 243 arch/mips/txx9/generic/setup_tx4938.c __raw_writel(0, &tx4938_pioptr->maskext); __raw_writel 144 arch/mips/txx9/jmr3927/setup.c __raw_writel(0x0000f000, &tx3927_pioptr->dir); __raw_writel 22 arch/nds32/include/asm/io.h #define __raw_writel __raw_writel __raw_writel 69 arch/nds32/include/asm/io.h #define writel_relaxed(v,c) ((void)__raw_writel((__force u32)cpu_to_le32(v),(c))) __raw_writel 51 arch/parisc/include/asm/ide.h __raw_writel(*(u32 *)addr, port); __raw_writel 207 arch/parisc/include/asm/io.h __raw_writel((__u32 __force) cpu_to_le32(l), addr); __raw_writel 29 arch/parisc/lib/io.c __raw_writel(*(u32 *)src, dst); __raw_writel 114 arch/parisc/lib/io.c __raw_writel(val32, addr); __raw_writel 210 arch/parisc/lib/iomap.c __raw_writel(datum, addr); __raw_writel 220 arch/parisc/lib/iomap.c __raw_writel(datum, addr); __raw_writel 266 arch/parisc/lib/iomap.c __raw_writel(*(u32 *)s, addr); __raw_writel 80 arch/powerpc/kvm/book3s_xive.c __raw_writel(vcpu->arch.xive_cam_word, tima + TM_QW1_OS + TM_WORD2); __raw_writel 44 arch/riscv/include/asm/io.h #define __raw_writel __raw_writel __raw_writel 107 arch/riscv/include/asm/io.h #define writel_cpu(v,c) ((void)__raw_writel((__force u32)cpu_to_le32(v),(c))) __raw_writel 66 arch/sh/boards/board-magicpanelr2.c __raw_writel(0x36db0400, CS2BCR); __raw_writel 68 arch/sh/boards/board-magicpanelr2.c __raw_writel(0x000003c0, CS2WCR); __raw_writel 72 arch/sh/boards/board-magicpanelr2.c __raw_writel(0x00000200, CS4BCR); __raw_writel 74 arch/sh/boards/board-magicpanelr2.c __raw_writel(0x00100981, CS4WCR); __raw_writel 78 arch/sh/boards/board-magicpanelr2.c __raw_writel(0x00000200, CS5ABCR); __raw_writel 80 arch/sh/boards/board-magicpanelr2.c __raw_writel(0x00100981, CS5AWCR); __raw_writel 84 arch/sh/boards/board-magicpanelr2.c __raw_writel(0x00000200, CS5BBCR); __raw_writel 86 arch/sh/boards/board-magicpanelr2.c __raw_writel(0x00100981, CS5BWCR); __raw_writel 90 arch/sh/boards/board-magicpanelr2.c __raw_writel(0x00000200, CS6ABCR); __raw_writel 92 arch/sh/boards/board-magicpanelr2.c __raw_writel(0x001009C1, CS6AWCR); __raw_writel 132 arch/sh/boards/board-sh2007.c __raw_writel(CS5BCR_D, CS5BCR); __raw_writel 133 arch/sh/boards/board-sh2007.c __raw_writel(CS5WCR_D, CS5WCR); __raw_writel 134 arch/sh/boards/board-sh2007.c __raw_writel(CS5PCR_D, CS5PCR); __raw_writel 67 arch/sh/boards/mach-cayman/irq.c __raw_writel(mask, reg); __raw_writel 85 arch/sh/boards/mach-cayman/irq.c __raw_writel(mask, reg); __raw_writel 68 arch/sh/boards/mach-dreamcast/rtc.c __raw_writel((adj & 0xffff0000) >> 16, AICA_RTC_SECS_H); __raw_writel 69 arch/sh/boards/mach-dreamcast/rtc.c __raw_writel((adj & 0xffff), AICA_RTC_SECS_L); __raw_writel 501 arch/sh/boards/mach-kfr2r09/setup.c __raw_writel(0x36db0400, BSC_CS0BCR); __raw_writel 502 arch/sh/boards/mach-kfr2r09/setup.c __raw_writel(0x00000500, BSC_CS0WCR); __raw_writel 505 arch/sh/boards/mach-kfr2r09/setup.c __raw_writel(0x36db0400, BSC_CS4BCR); __raw_writel 506 arch/sh/boards/mach-kfr2r09/setup.c __raw_writel(0x00000500, BSC_CS4WCR); __raw_writel 89 arch/sh/boards/mach-landisk/gio.c __raw_writel(data, addr); __raw_writel 78 arch/sh/boards/mach-microdev/irq.c __raw_writel(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTDSB_REG); __raw_writel 101 arch/sh/boards/mach-microdev/irq.c __raw_writel(priorities, priorityReg); __raw_writel 104 arch/sh/boards/mach-microdev/irq.c __raw_writel(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTENB_REG); __raw_writel 126 arch/sh/boards/mach-microdev/irq.c __raw_writel(~0ul, MICRODEV_FPGA_INTDSB_REG); __raw_writel 467 arch/sh/boards/mach-migor/setup.c __raw_writel(0x00003400, BSC_CS4BCR); __raw_writel 468 arch/sh/boards/mach-migor/setup.c __raw_writel(0x00110080, BSC_CS4WCR); __raw_writel 484 arch/sh/boards/mach-migor/setup.c __raw_writel((__raw_readl(BSC_CS6ABCR) & ~0x0600) | 0x0200, BSC_CS6ABCR); __raw_writel 131 arch/sh/boards/mach-rsk/devices-rsk7203.c __raw_writel(0x36db0400, 0xfffc0008); /* CS1BCR */ __raw_writel 47 arch/sh/boards/mach-se/7780/irq.c __raw_writel(0xAAAA0000, INTC_ICR1); __raw_writel 28 arch/sh/boards/mach-sh7763rdp/irq.c __raw_writel(1 << 25, INTC_INT2MSKCR); __raw_writel 31 arch/sh/boards/mach-sh7763rdp/irq.c __raw_writel((__raw_readl(INTC_INT2PRI7) & 0xFF00FFFF) | 0x000F0000, __raw_writel 35 arch/sh/boards/mach-sh7763rdp/irq.c __raw_writel(1 << 17, INTC_INT2MSKCR1); __raw_writel 38 arch/sh/boards/mach-sh7763rdp/irq.c __raw_writel(1 << 16, INTC_INT2MSKCR1); __raw_writel 41 arch/sh/boards/mach-sh7763rdp/irq.c __raw_writel(1 << 8, INTC_INT2MSKCR); __raw_writel 204 arch/sh/boards/mach-sh7763rdp/setup.c __raw_writel(__raw_readl(MSTPCR1) & ~0x8, MSTPCR1); __raw_writel 222 arch/sh/boards/mach-x3proto/setup.c __raw_writel(__raw_readl(0xfe410000) | (1 << 21), 0xfe410000); __raw_writel 42 arch/sh/boot/romimage/mmcif-sh7724.c __raw_writel(__raw_readl(MSTPCR2) & ~0x20000000, MSTPCR2); __raw_writel 75 arch/sh/boot/romimage/mmcif-sh7724.c __raw_writel(__raw_readl(MSTPCR2) | 0x20000000, MSTPCR2); __raw_writel 43 arch/sh/drivers/dma/dma-pvr2.c __raw_writel(0, PVR2_DMA_LMMODE0); __raw_writel 60 arch/sh/drivers/dma/dma-pvr2.c __raw_writel(chan->dar, PVR2_DMA_ADDR); __raw_writel 61 arch/sh/drivers/dma/dma-pvr2.c __raw_writel(chan->count, PVR2_DMA_COUNT); __raw_writel 62 arch/sh/drivers/dma/dma-pvr2.c __raw_writel(chan->mode & DMA_MODE_MASK, PVR2_DMA_MODE); __raw_writel 117 arch/sh/drivers/dma/dma-sh.c __raw_writel(chcr, (dma_base_addr(chan->chan) + CHCR)); __raw_writel 151 arch/sh/drivers/dma/dma-sh.c __raw_writel(chcr, (dma_base_addr(chan->chan) + CHCR)); __raw_writel 168 arch/sh/drivers/dma/dma-sh.c __raw_writel(chcr, (dma_base_addr(chan->chan) + CHCR)); __raw_writel 188 arch/sh/drivers/dma/dma-sh.c __raw_writel(chcr, (dma_base_addr(chan->chan) + CHCR)); __raw_writel 219 arch/sh/drivers/dma/dma-sh.c __raw_writel(chan->sar, (dma_base_addr(chan->chan) + SAR)); __raw_writel 222 arch/sh/drivers/dma/dma-sh.c __raw_writel(chan->dar, (dma_base_addr(chan->chan) + DAR)); __raw_writel 224 arch/sh/drivers/dma/dma-sh.c __raw_writel(chan->count >> calc_xmit_shift(chan), __raw_writel 90 arch/sh/drivers/dma/dmabrg.c __raw_writel(dcr & ~0x00ff0003, DMABRGCR); /* ack all */ __raw_writel 114 arch/sh/drivers/dma/dmabrg.c __raw_writel(dcr, DMABRGCR); __raw_writel 122 arch/sh/drivers/dma/dmabrg.c __raw_writel(dcr, DMABRGCR); __raw_writel 168 arch/sh/drivers/dma/dmabrg.c __raw_writel(0, DMABRGCR); __raw_writel 169 arch/sh/drivers/dma/dmabrg.c __raw_writel(0, DMACHCR0); __raw_writel 170 arch/sh/drivers/dma/dmabrg.c __raw_writel(0x94000000, DMARSRA); /* enable DMABRG in DMAC 0 */ __raw_writel 174 arch/sh/drivers/dma/dmabrg.c __raw_writel(or | DMAOR_BRG | DMAOR_DMEN, DMAOR); __raw_writel 173 arch/sh/drivers/pci/pci-sh4.h __raw_writel(val, chan->reg_base + reg); __raw_writel 87 arch/sh/drivers/pci/pci-sh5.h #define SH5PCI_WRITE(reg,val) __raw_writel((u32)(val),PCISH5_ICR_REG(reg)) __raw_writel 96 arch/sh/drivers/pci/pci-sh7751.c __raw_writel(reg, SH7751_BCR1); __raw_writel 127 arch/sh/drivers/pci/pci-sh7780.c __raw_writel(cmd, hose->reg_base + SH4_PCIAINT); __raw_writel 140 arch/sh/drivers/pci/pci-sh7780.c __raw_writel(cmd, hose->reg_base + SH4_PCIINT); __raw_writel 154 arch/sh/drivers/pci/pci-sh7780.c __raw_writel(SH4_PCIINTM_SDIM, hose->reg_base + SH4_PCIINTM); __raw_writel 169 arch/sh/drivers/pci/pci-sh7780.c __raw_writel(0, hose->reg_base + SH4_PCIAINT); __raw_writel 200 arch/sh/drivers/pci/pci-sh7780.c __raw_writel(SH4_PCIAINT_MBKN | SH4_PCIAINT_TBTO | SH4_PCIAINT_MBTO | \ __raw_writel 205 arch/sh/drivers/pci/pci-sh7780.c __raw_writel(SH4_PCIINTM_TTADIM | SH4_PCIINTM_TMTOIM | \ __raw_writel 231 arch/sh/drivers/pci/pci-sh7780.c __raw_writel(tmp, hose->reg_base + SH4_PCICR); __raw_writel 241 arch/sh/drivers/pci/pci-sh7780.c __raw_writel(tmp, hose->reg_base + SH4_PCICR); __raw_writel 258 arch/sh/drivers/pci/pci-sh7780.c __raw_writel(PCIECR_ENBL, PCIECR); __raw_writel 261 arch/sh/drivers/pci/pci-sh7780.c __raw_writel(SH4_PCICR_PREFIX | SH4_PCICR_PRST | PCICR_ENDIANNESS, __raw_writel 297 arch/sh/drivers/pci/pci-sh7780.c __raw_writel(SH4_PCICR_PREFIX | PCICR_ENDIANNESS, __raw_writel 308 arch/sh/drivers/pci/pci-sh7780.c __raw_writel(memphys + SZ_512M, chan->reg_base + SH4_PCILAR1); __raw_writel 309 arch/sh/drivers/pci/pci-sh7780.c __raw_writel((((memsize - SZ_512M) - SZ_1M) & 0x1ff00000) | 1, __raw_writel 316 arch/sh/drivers/pci/pci-sh7780.c __raw_writel(0, chan->reg_base + SH4_PCILAR1); __raw_writel 317 arch/sh/drivers/pci/pci-sh7780.c __raw_writel(0, chan->reg_base + SH4_PCILSR1); __raw_writel 324 arch/sh/drivers/pci/pci-sh7780.c __raw_writel(memphys, chan->reg_base + SH4_PCILAR0); __raw_writel 325 arch/sh/drivers/pci/pci-sh7780.c __raw_writel(((memsize - SZ_1M) & 0x1ff00000) | 1, __raw_writel 338 arch/sh/drivers/pci/pci-sh7780.c __raw_writel(0, chan->reg_base + SH7780_PCICSCR0); __raw_writel 339 arch/sh/drivers/pci/pci-sh7780.c __raw_writel(0, chan->reg_base + SH7780_PCICSAR0); __raw_writel 340 arch/sh/drivers/pci/pci-sh7780.c __raw_writel(0, chan->reg_base + SH7780_PCICSCR1); __raw_writel 341 arch/sh/drivers/pci/pci-sh7780.c __raw_writel(0, chan->reg_base + SH7780_PCICSAR1); __raw_writel 368 arch/sh/drivers/pci/pci-sh7780.c __raw_writel(((roundup_pow_of_two(size) / SZ_256K) - 1) << 18, __raw_writel 370 arch/sh/drivers/pci/pci-sh7780.c __raw_writel(res->start, chan->reg_base + SH7780_PCIMBR(i - 1)); __raw_writel 376 arch/sh/drivers/pci/pci-sh7780.c __raw_writel(0, chan->reg_base + PCI_BASE_ADDRESS_0); __raw_writel 377 arch/sh/drivers/pci/pci-sh7780.c __raw_writel(0, chan->reg_base + SH7780_PCIIOBR); __raw_writel 378 arch/sh/drivers/pci/pci-sh7780.c __raw_writel(0, chan->reg_base + SH7780_PCIIOBMR); __raw_writel 388 arch/sh/drivers/pci/pci-sh7780.c __raw_writel(SH4_PCICR_PREFIX | SH4_PCICR_CFIN | SH4_PCICR_FTO | __raw_writel 568 arch/sh/drivers/pci/pcie-sh7786.h __raw_writel(val, chan->reg_base + reg); __raw_writel 147 arch/sh/drivers/superhyway/ops-sh4-202.c __raw_writel((tmp >> 32) & 0xffffffff, base); __raw_writel 148 arch/sh/drivers/superhyway/ops-sh4-202.c __raw_writel(tmp & 0xffffffff, base + sizeof(u32)); __raw_writel 47 arch/sh/include/asm/io.h #define writel_relaxed(v,c) ((void)__raw_writel((__force u32)ioswabl(v),c)) __raw_writel 164 arch/sh/include/asm/mmu_context.h __raw_writel(MMU_CONTROL_INIT, MMUCR); __raw_writel 179 arch/sh/include/asm/mmu_context.h __raw_writel(cr, MMUCR); __raw_writel 17 arch/sh/include/asm/mmu_context_32.h __raw_writel(asid, MMU_PTEAEX); __raw_writel 53 arch/sh/include/asm/mmu_context_32.h __raw_writel((unsigned long)pgd, MMU_TTB); __raw_writel 81 arch/sh/include/asm/watchdog.h __raw_writel((WTCNT_HIGH << 24) | (__u32)val, WTCNT); __raw_writel 93 arch/sh/include/asm/watchdog.h __raw_writel((WTBST_HIGH << 24) | (__u32)val, WTBST); __raw_writel 114 arch/sh/include/asm/watchdog.h __raw_writel((WTCSR_HIGH << 24) | (__u32)val, WTCSR); __raw_writel 21 arch/sh/include/mach-common/mach/magicpanelr2.h #define SETBITS_OUTL(mask, reg) __raw_writel(__raw_readl(reg) | mask, reg) __raw_writel 24 arch/sh/include/mach-common/mach/magicpanelr2.h #define CLRBITS_OUTL(mask, reg) __raw_writel(__raw_readl(reg) & ~mask, reg) __raw_writel 62 arch/sh/kernel/cpu/init.c __raw_writel(__raw_readl(CPUOPM) & ~CPUOPM_RABD, CPUOPM); __raw_writel 91 arch/sh/kernel/cpu/init.c __raw_writel(expmask, EXPMASK); __raw_writel 156 arch/sh/kernel/cpu/init.c __raw_writel(0, addr); __raw_writel 189 arch/sh/kernel/cpu/init.c __raw_writel(flags, SH_CCR); __raw_writel 95 arch/sh/kernel/cpu/irq/intc-sh5.c __raw_writel(bitmask, reg); __raw_writel 112 arch/sh/kernel/cpu/irq/intc-sh5.c __raw_writel(bitmask, reg); __raw_writel 139 arch/sh/kernel/cpu/irq/intc-sh5.c __raw_writel(-1, INTC_INTDSB_0); __raw_writel 140 arch/sh/kernel/cpu/irq/intc-sh5.c __raw_writel(-1, INTC_INTDSB_1); __raw_writel 143 arch/sh/kernel/cpu/irq/intc-sh5.c __raw_writel( NO_PRIORITY, reg); __raw_writel 168 arch/sh/kernel/cpu/irq/intc-sh5.c __raw_writel(INTC_ICR_IRLM, reg); __raw_writel 176 arch/sh/kernel/cpu/irq/intc-sh5.c __raw_writel(data, reg); __raw_writel 49 arch/sh/kernel/cpu/sh2/probe.c if (j2_ccr_base) __raw_writel(0x80000303, j2_ccr_base + 4*cpu); __raw_writel 94 arch/sh/kernel/cpu/sh2/smp-j2.c __raw_writel(entry_point, initpc); __raw_writel 95 arch/sh/kernel/cpu/sh2/smp-j2.c __raw_writel(1, release); __raw_writel 122 arch/sh/kernel/cpu/sh2/smp-j2.c __raw_writel(val | (1U<<28), j2_ipi_trigger + cpu); __raw_writel 31 arch/sh/kernel/cpu/sh3/probe.c __raw_writel(data0&~(SH_CACHE_VALID|SH_CACHE_UPDATED), addr0); __raw_writel 33 arch/sh/kernel/cpu/sh3/probe.c __raw_writel(data1&~(SH_CACHE_VALID|SH_CACHE_UPDATED), addr1); __raw_writel 38 arch/sh/kernel/cpu/sh3/probe.c __raw_writel(data0, addr0); __raw_writel 41 arch/sh/kernel/cpu/sh3/probe.c __raw_writel(data2, addr1); __raw_writel 45 arch/sh/kernel/cpu/sh3/probe.c __raw_writel(data0&~SH_CACHE_VALID, addr0); __raw_writel 46 arch/sh/kernel/cpu/sh3/probe.c __raw_writel(data2&~SH_CACHE_VALID, addr1); __raw_writel 94 arch/sh/kernel/cpu/sh3/probe.c __raw_writel(CCR_CACHE_32KB, CCR3_REG); __raw_writel 96 arch/sh/kernel/cpu/sh3/probe.c __raw_writel(CCR_CACHE_16KB, CCR3_REG); __raw_writel 123 arch/sh/kernel/cpu/sh4/clock-sh4-202.c __raw_writel(frqcr3, CPG2_FRQCR3); __raw_writel 45 arch/sh/kernel/cpu/sh4/sq.c __raw_writel(0, P4SEG_STORE_QUE + 0); \ __raw_writel 46 arch/sh/kernel/cpu/sh4/sq.c __raw_writel(0, P4SEG_STORE_QUE + 8); \ __raw_writel 124 arch/sh/kernel/cpu/sh4/sq.c __raw_writel(((map->addr >> 26) << 2) & 0x1c, SQ_QACR0); __raw_writel 125 arch/sh/kernel/cpu/sh4/sq.c __raw_writel(((map->addr >> 26) << 2) & 0x1c, SQ_QACR1); __raw_writel 133 arch/sh/kernel/cpu/sh4a/clock-sh7724.c __raw_writel(value, FRQCRA); __raw_writel 23 arch/sh/kernel/cpu/sh4a/intc-shx3.c __raw_writel(irq2evt(irq), INTACKCLR); __raw_writel 238 arch/sh/kernel/cpu/sh4a/perf_event.c __raw_writel(tmp, PPC_CCBR(idx)); __raw_writel 248 arch/sh/kernel/cpu/sh4a/perf_event.c __raw_writel(tmp, PPC_PMCAT); __raw_writel 252 arch/sh/kernel/cpu/sh4a/perf_event.c __raw_writel(tmp, PPC_CCBR(idx)); __raw_writel 254 arch/sh/kernel/cpu/sh4a/perf_event.c __raw_writel(__raw_readl(PPC_CCBR(idx)) | CCBR_DUC, PPC_CCBR(idx)); __raw_writel 262 arch/sh/kernel/cpu/sh4a/perf_event.c __raw_writel(__raw_readl(PPC_CCBR(i)) & ~CCBR_DUC, PPC_CCBR(i)); __raw_writel 270 arch/sh/kernel/cpu/sh4a/perf_event.c __raw_writel(__raw_readl(PPC_CCBR(i)) | CCBR_DUC, PPC_CCBR(i)); __raw_writel 424 arch/sh/kernel/cpu/sh4a/setup-sh7723.c __raw_writel(L2_CACHE_ENABLE, RAMCR); __raw_writel 844 arch/sh/kernel/cpu/sh4a/setup-sh7724.c __raw_writel(L2_CACHE_ENABLE, RAMCR); __raw_writel 1216 arch/sh/kernel/cpu/sh4a/setup-sh7724.c __raw_writel(sh7724_rstandby_state.mmselr, 0xff800020); /* MMSELR */ __raw_writel 1217 arch/sh/kernel/cpu/sh4a/setup-sh7724.c __raw_writel(sh7724_rstandby_state.cs0bcr, 0xfec10004); /* CS0BCR */ __raw_writel 1218 arch/sh/kernel/cpu/sh4a/setup-sh7724.c __raw_writel(sh7724_rstandby_state.cs4bcr, 0xfec10010); /* CS4BCR */ __raw_writel 1219 arch/sh/kernel/cpu/sh4a/setup-sh7724.c __raw_writel(sh7724_rstandby_state.cs5abcr, 0xfec10014); /* CS5ABCR */ __raw_writel 1220 arch/sh/kernel/cpu/sh4a/setup-sh7724.c __raw_writel(sh7724_rstandby_state.cs5bbcr, 0xfec10018); /* CS5BBCR */ __raw_writel 1221 arch/sh/kernel/cpu/sh4a/setup-sh7724.c __raw_writel(sh7724_rstandby_state.cs6abcr, 0xfec1001c); /* CS6ABCR */ __raw_writel 1222 arch/sh/kernel/cpu/sh4a/setup-sh7724.c __raw_writel(sh7724_rstandby_state.cs6bbcr, 0xfec10020); /* CS6BBCR */ __raw_writel 1223 arch/sh/kernel/cpu/sh4a/setup-sh7724.c __raw_writel(sh7724_rstandby_state.cs4wcr, 0xfec10030); /* CS4WCR */ __raw_writel 1224 arch/sh/kernel/cpu/sh4a/setup-sh7724.c __raw_writel(sh7724_rstandby_state.cs5awcr, 0xfec10034); /* CS5AWCR */ __raw_writel 1225 arch/sh/kernel/cpu/sh4a/setup-sh7724.c __raw_writel(sh7724_rstandby_state.cs5bwcr, 0xfec10038); /* CS5BWCR */ __raw_writel 1226 arch/sh/kernel/cpu/sh4a/setup-sh7724.c __raw_writel(sh7724_rstandby_state.cs6awcr, 0xfec1003c); /* CS6AWCR */ __raw_writel 1227 arch/sh/kernel/cpu/sh4a/setup-sh7724.c __raw_writel(sh7724_rstandby_state.cs6bwcr, 0xfec10040); /* CS6BWCR */ __raw_writel 1261 arch/sh/kernel/cpu/sh4a/setup-sh7724.c __raw_writel(sh7724_rstandby_state.irdaclk, 0xa4150018); /* IRDACLKCR */ __raw_writel 1262 arch/sh/kernel/cpu/sh4a/setup-sh7724.c __raw_writel(sh7724_rstandby_state.spuclk, 0xa415003c); /* SPUCLKCR */ __raw_writel 585 arch/sh/kernel/cpu/sh4a/setup-sh7734.c __raw_writel(0xF0000000, INTC_INTMSK0); __raw_writel 588 arch/sh/kernel/cpu/sh4a/setup-sh7734.c __raw_writel(0x80000000, INTC_INTMSK1); __raw_writel 591 arch/sh/kernel/cpu/sh4a/setup-sh7734.c __raw_writel(__raw_readl(INTC_ICR0) & ~0x00800000, INTC_ICR0); __raw_writel 594 arch/sh/kernel/cpu/sh4a/setup-sh7734.c __raw_writel(__raw_readl(INTC_ICR0) | 0x00200000, INTC_ICR0); __raw_writel 604 arch/sh/kernel/cpu/sh4a/setup-sh7734.c __raw_writel(__raw_readl(INTC_ICR0) | 0x00800000, INTC_ICR0); __raw_writel 609 arch/sh/kernel/cpu/sh4a/setup-sh7734.c __raw_writel(0x80000000, INTC_INTMSKCLR1); __raw_writel 610 arch/sh/kernel/cpu/sh4a/setup-sh7734.c __raw_writel(0xf0000000, INTC_INTMSKCLR0); __raw_writel 614 arch/sh/kernel/cpu/sh4a/setup-sh7734.c __raw_writel(0x80000000, INTC_INTMSKCLR0); __raw_writel 1186 arch/sh/kernel/cpu/sh4a/setup-sh7757.c __raw_writel(0xff000000, INTC_INTMSK0); __raw_writel 1189 arch/sh/kernel/cpu/sh4a/setup-sh7757.c __raw_writel(0xc0000000, INTC_INTMSK1); __raw_writel 1190 arch/sh/kernel/cpu/sh4a/setup-sh7757.c __raw_writel(0xfffefffe, INTC_INTMSK2); __raw_writel 1193 arch/sh/kernel/cpu/sh4a/setup-sh7757.c __raw_writel(__raw_readl(INTC_ICR0) & ~0x00c00000, INTC_ICR0); __raw_writel 1196 arch/sh/kernel/cpu/sh4a/setup-sh7757.c __raw_writel(__raw_readl(INTC_ICR0) | 0x00200000, INTC_ICR0); __raw_writel 1206 arch/sh/kernel/cpu/sh4a/setup-sh7757.c __raw_writel(__raw_readl(INTC_ICR0) | 0x00400000, INTC_ICR0); __raw_writel 1211 arch/sh/kernel/cpu/sh4a/setup-sh7757.c __raw_writel(__raw_readl(INTC_ICR0) | 0x00800000, INTC_ICR0); __raw_writel 1216 arch/sh/kernel/cpu/sh4a/setup-sh7757.c __raw_writel(0x40000000, INTC_INTMSKCLR1); __raw_writel 1217 arch/sh/kernel/cpu/sh4a/setup-sh7757.c __raw_writel(0x0000fffe, INTC_INTMSKCLR2); __raw_writel 1221 arch/sh/kernel/cpu/sh4a/setup-sh7757.c __raw_writel(0x80000000, INTC_INTMSKCLR1); __raw_writel 1222 arch/sh/kernel/cpu/sh4a/setup-sh7757.c __raw_writel(0xfffe0000, INTC_INTMSKCLR2); __raw_writel 1226 arch/sh/kernel/cpu/sh4a/setup-sh7757.c __raw_writel(0x40000000, INTC_INTMSKCLR1); __raw_writel 1231 arch/sh/kernel/cpu/sh4a/setup-sh7757.c __raw_writel(0x80000000, INTC_INTMSKCLR1); __raw_writel 414 arch/sh/kernel/cpu/sh4a/setup-sh7763.c __raw_writel(0xff000000, INTC_INTMSK0); __raw_writel 417 arch/sh/kernel/cpu/sh4a/setup-sh7763.c __raw_writel(0xc0000000, INTC_INTMSK1); __raw_writel 418 arch/sh/kernel/cpu/sh4a/setup-sh7763.c __raw_writel(0xfffefffe, INTC_INTMSK2); __raw_writel 428 arch/sh/kernel/cpu/sh4a/setup-sh7763.c __raw_writel(__raw_readl(INTC_ICR0) | 0x00c00000, INTC_ICR0); __raw_writel 433 arch/sh/kernel/cpu/sh4a/setup-sh7763.c __raw_writel(0x40000000, INTC_INTMSKCLR1); __raw_writel 434 arch/sh/kernel/cpu/sh4a/setup-sh7763.c __raw_writel(0x0000fffe, INTC_INTMSKCLR2); __raw_writel 438 arch/sh/kernel/cpu/sh4a/setup-sh7763.c __raw_writel(0x80000000, INTC_INTMSKCLR1); __raw_writel 439 arch/sh/kernel/cpu/sh4a/setup-sh7763.c __raw_writel(0xfffe0000, INTC_INTMSKCLR2); __raw_writel 443 arch/sh/kernel/cpu/sh4a/setup-sh7763.c __raw_writel(0x40000000, INTC_INTMSKCLR1); __raw_writel 448 arch/sh/kernel/cpu/sh4a/setup-sh7763.c __raw_writel(0x80000000, INTC_INTMSKCLR1); __raw_writel 524 arch/sh/kernel/cpu/sh4a/setup-sh7770.c __raw_writel(0xff000000, INTC_INTMSK0); __raw_writel 527 arch/sh/kernel/cpu/sh4a/setup-sh7770.c __raw_writel(0xc0000000, INTC_INTMSK1); __raw_writel 528 arch/sh/kernel/cpu/sh4a/setup-sh7770.c __raw_writel(0xfffefffe, INTC_INTMSK2); __raw_writel 531 arch/sh/kernel/cpu/sh4a/setup-sh7770.c __raw_writel(__raw_readl(INTC_ICR0) & ~0x00c00000, INTC_ICR0); __raw_writel 534 arch/sh/kernel/cpu/sh4a/setup-sh7770.c __raw_writel(__raw_readl(INTC_ICR0) | 0x00200000, INTC_ICR0); __raw_writel 544 arch/sh/kernel/cpu/sh4a/setup-sh7770.c __raw_writel(__raw_readl(INTC_ICR0) | 0x00c00000, INTC_ICR0); __raw_writel 549 arch/sh/kernel/cpu/sh4a/setup-sh7770.c __raw_writel(0x40000000, INTC_INTMSKCLR1); __raw_writel 550 arch/sh/kernel/cpu/sh4a/setup-sh7770.c __raw_writel(0x0000fffe, INTC_INTMSKCLR2); __raw_writel 554 arch/sh/kernel/cpu/sh4a/setup-sh7770.c __raw_writel(0x80000000, INTC_INTMSKCLR1); __raw_writel 555 arch/sh/kernel/cpu/sh4a/setup-sh7770.c __raw_writel(0xfffe0000, INTC_INTMSKCLR2); __raw_writel 559 arch/sh/kernel/cpu/sh4a/setup-sh7770.c __raw_writel(0x40000000, INTC_INTMSKCLR1); __raw_writel 564 arch/sh/kernel/cpu/sh4a/setup-sh7770.c __raw_writel(0x80000000, INTC_INTMSKCLR1); __raw_writel 458 arch/sh/kernel/cpu/sh4a/setup-sh7780.c __raw_writel(0xff000000, INTC_INTMSK0); __raw_writel 461 arch/sh/kernel/cpu/sh4a/setup-sh7780.c __raw_writel(0xc0000000, INTC_INTMSK1); __raw_writel 462 arch/sh/kernel/cpu/sh4a/setup-sh7780.c __raw_writel(0xfffefffe, INTC_INTMSK2); __raw_writel 465 arch/sh/kernel/cpu/sh4a/setup-sh7780.c __raw_writel(__raw_readl(INTC_ICR0) & ~0x00c00000, INTC_ICR0); __raw_writel 468 arch/sh/kernel/cpu/sh4a/setup-sh7780.c __raw_writel(__raw_readl(INTC_ICR0) | 0x00200000, INTC_ICR0); __raw_writel 478 arch/sh/kernel/cpu/sh4a/setup-sh7780.c __raw_writel(__raw_readl(INTC_ICR0) | 0x00c00000, INTC_ICR0); __raw_writel 483 arch/sh/kernel/cpu/sh4a/setup-sh7780.c __raw_writel(0x40000000, INTC_INTMSKCLR1); __raw_writel 484 arch/sh/kernel/cpu/sh4a/setup-sh7780.c __raw_writel(0x0000fffe, INTC_INTMSKCLR2); __raw_writel 488 arch/sh/kernel/cpu/sh4a/setup-sh7780.c __raw_writel(0x80000000, INTC_INTMSKCLR1); __raw_writel 489 arch/sh/kernel/cpu/sh4a/setup-sh7780.c __raw_writel(0xfffe0000, INTC_INTMSKCLR2); __raw_writel 493 arch/sh/kernel/cpu/sh4a/setup-sh7780.c __raw_writel(0x40000000, INTC_INTMSKCLR1); __raw_writel 498 arch/sh/kernel/cpu/sh4a/setup-sh7780.c __raw_writel(0x80000000, INTC_INTMSKCLR1); __raw_writel 550 arch/sh/kernel/cpu/sh4a/setup-sh7785.c __raw_writel(0xff000000, INTC_INTMSK0); __raw_writel 553 arch/sh/kernel/cpu/sh4a/setup-sh7785.c __raw_writel(0xc0000000, INTC_INTMSK1); __raw_writel 554 arch/sh/kernel/cpu/sh4a/setup-sh7785.c __raw_writel(0xfffefffe, INTC_INTMSK2); __raw_writel 557 arch/sh/kernel/cpu/sh4a/setup-sh7785.c __raw_writel(__raw_readl(INTC_ICR0) & ~0x00c00000, INTC_ICR0); __raw_writel 560 arch/sh/kernel/cpu/sh4a/setup-sh7785.c __raw_writel(__raw_readl(INTC_ICR0) | 0x00200000, INTC_ICR0); __raw_writel 570 arch/sh/kernel/cpu/sh4a/setup-sh7785.c __raw_writel(__raw_readl(INTC_ICR0) | 0x00400000, INTC_ICR0); __raw_writel 575 arch/sh/kernel/cpu/sh4a/setup-sh7785.c __raw_writel(__raw_readl(INTC_ICR0) | 0x00800000, INTC_ICR0); __raw_writel 580 arch/sh/kernel/cpu/sh4a/setup-sh7785.c __raw_writel(0x40000000, INTC_INTMSKCLR1); __raw_writel 581 arch/sh/kernel/cpu/sh4a/setup-sh7785.c __raw_writel(0x0000fffe, INTC_INTMSKCLR2); __raw_writel 585 arch/sh/kernel/cpu/sh4a/setup-sh7785.c __raw_writel(0x80000000, INTC_INTMSKCLR1); __raw_writel 586 arch/sh/kernel/cpu/sh4a/setup-sh7785.c __raw_writel(0xfffe0000, INTC_INTMSKCLR2); __raw_writel 590 arch/sh/kernel/cpu/sh4a/setup-sh7785.c __raw_writel(0x40000000, INTC_INTMSKCLR1); __raw_writel 595 arch/sh/kernel/cpu/sh4a/setup-sh7785.c __raw_writel(0x80000000, INTC_INTMSKCLR1); __raw_writel 412 arch/sh/kernel/cpu/sh4a/setup-sh7786.c __raw_writel(val | EXT_CLOCK_MODE, USBCTL0); __raw_writel 439 arch/sh/kernel/cpu/sh4a/setup-sh7786.c __raw_writel(USBINITVAL1, USBINITREG1); __raw_writel 440 arch/sh/kernel/cpu/sh4a/setup-sh7786.c __raw_writel(USBINITVAL2, USBINITREG2); __raw_writel 445 arch/sh/kernel/cpu/sh4a/setup-sh7786.c __raw_writel(PHY_ENB | PLL_ENB, USBPCTL1); __raw_writel 449 arch/sh/kernel/cpu/sh4a/setup-sh7786.c __raw_writel(PHY_ENB | PLL_ENB | PHY_RST, USBPCTL1); __raw_writel 748 arch/sh/kernel/cpu/sh4a/setup-sh7786.c __raw_writel(0xff000000, INTC_INTMSK0); __raw_writel 751 arch/sh/kernel/cpu/sh4a/setup-sh7786.c __raw_writel(0xc0000000, INTC_INTMSK1); __raw_writel 752 arch/sh/kernel/cpu/sh4a/setup-sh7786.c __raw_writel(0xfffefffe, INTC_INTMSK2); __raw_writel 755 arch/sh/kernel/cpu/sh4a/setup-sh7786.c __raw_writel(__raw_readl(INTC_ICR0) & ~0x00c00000, INTC_ICR0); __raw_writel 765 arch/sh/kernel/cpu/sh4a/setup-sh7786.c __raw_writel(__raw_readl(INTC_ICR0) | 0x00400000, INTC_ICR0); __raw_writel 770 arch/sh/kernel/cpu/sh4a/setup-sh7786.c __raw_writel(__raw_readl(INTC_ICR0) | 0x00800000, INTC_ICR0); __raw_writel 775 arch/sh/kernel/cpu/sh4a/setup-sh7786.c __raw_writel(0x40000000, INTC_INTMSKCLR1); __raw_writel 776 arch/sh/kernel/cpu/sh4a/setup-sh7786.c __raw_writel(0x0000fffe, INTC_INTMSKCLR2); __raw_writel 780 arch/sh/kernel/cpu/sh4a/setup-sh7786.c __raw_writel(0x80000000, INTC_INTMSKCLR1); __raw_writel 781 arch/sh/kernel/cpu/sh4a/setup-sh7786.c __raw_writel(0xfffe0000, INTC_INTMSKCLR2); __raw_writel 785 arch/sh/kernel/cpu/sh4a/setup-sh7786.c __raw_writel(0x40000000, INTC_INTMSKCLR1); __raw_writel 790 arch/sh/kernel/cpu/sh4a/setup-sh7786.c __raw_writel(0x80000000, INTC_INTMSKCLR1); __raw_writel 36 arch/sh/kernel/cpu/sh4a/smp-shx3.c __raw_writel(x, 0xfe410080 + offs); /* C0INTICICLR..CnINTICICLR */ __raw_writel 51 arch/sh/kernel/cpu/sh4a/smp-shx3.c __raw_writel(__raw_readl(STBCR_REG(cpu)) | STBCR_LTSLP, STBCR_REG(cpu)); __raw_writel 86 arch/sh/kernel/cpu/sh4a/smp-shx3.c __raw_writel(entry_point, RESET_REG(cpu)); __raw_writel 88 arch/sh/kernel/cpu/sh4a/smp-shx3.c __raw_writel(virt_to_phys(entry_point), RESET_REG(cpu)); __raw_writel 91 arch/sh/kernel/cpu/sh4a/smp-shx3.c __raw_writel(STBCR_MSTP, STBCR_REG(cpu)); __raw_writel 97 arch/sh/kernel/cpu/sh4a/smp-shx3.c __raw_writel(STBCR_RESET | STBCR_LTSLP, STBCR_REG(cpu)); __raw_writel 111 arch/sh/kernel/cpu/sh4a/smp-shx3.c __raw_writel(1 << (message << 2), addr); /* C0INTICI..CnINTICI */ __raw_writel 116 arch/sh/kernel/cpu/sh4a/smp-shx3.c __raw_writel(STBCR_MSTP, STBCR_REG(cpu)); __raw_writel 119 arch/sh/kernel/cpu/sh4a/smp-shx3.c __raw_writel(STBCR_RESET, STBCR_REG(cpu)); __raw_writel 34 arch/sh/kernel/cpu/sh4a/ubc.c __raw_writel(UBC_CBR_CE | info->len | info->type, UBC_CBR(idx)); __raw_writel 35 arch/sh/kernel/cpu/sh4a/ubc.c __raw_writel(info->address, UBC_CAR(idx)); __raw_writel 40 arch/sh/kernel/cpu/sh4a/ubc.c __raw_writel(0, UBC_CBR(idx)); __raw_writel 41 arch/sh/kernel/cpu/sh4a/ubc.c __raw_writel(0, UBC_CAR(idx)); __raw_writel 50 arch/sh/kernel/cpu/sh4a/ubc.c __raw_writel(__raw_readl(UBC_CBR(i)) | UBC_CBR_CE, __raw_writel 59 arch/sh/kernel/cpu/sh4a/ubc.c __raw_writel(__raw_readl(UBC_CBR(i)) & ~UBC_CBR_CE, __raw_writel 82 arch/sh/kernel/cpu/sh4a/ubc.c __raw_writel(__raw_readl(UBC_CCMFR) & ~mask, UBC_CCMFR); __raw_writel 112 arch/sh/kernel/cpu/sh4a/ubc.c __raw_writel(0, UBC_CBCR); __raw_writel 115 arch/sh/kernel/cpu/sh4a/ubc.c __raw_writel(0, UBC_CAMR(i)); __raw_writel 116 arch/sh/kernel/cpu/sh4a/ubc.c __raw_writel(0, UBC_CBR(i)); __raw_writel 118 arch/sh/kernel/cpu/sh4a/ubc.c __raw_writel(UBC_CRR_BIE | UBC_CRR_PCB, UBC_CRR(i)); __raw_writel 248 arch/sh/kernel/dwarf.c __raw_writel(decoded_addr, val); __raw_writel 50 arch/sh/kernel/ftrace.c __raw_writel(ip + MCOUNT_INSN_SIZE, ftrace_nop); __raw_writel 57 arch/sh/kernel/ftrace.c __raw_writel(addr, ftrace_replaced_code); __raw_writel 277 arch/sh/kernel/ftrace.c __raw_writel(new_addr, ip); __raw_writel 368 arch/sh/kernel/ftrace.c __raw_writel(old, parent); __raw_writel 208 arch/sh/kernel/io_trapped.c __raw_writel(tmp, dst_addr); __raw_writel 67 arch/sh/kernel/iomap.c __raw_writel(cpu_to_be32(val), addr); __raw_writel 123 arch/sh/kernel/iomap.c __raw_writel(*src, addr); __raw_writel 31 arch/sh/mm/cache-j2.c __raw_writel(CACHE_ENABLE | ICACHE_FLUSH, j2_ccr_base + cpu); __raw_writel 38 arch/sh/mm/cache-j2.c __raw_writel(CACHE_ENABLE | DCACHE_FLUSH, j2_ccr_base + cpu); __raw_writel 45 arch/sh/mm/cache-j2.c __raw_writel(CACHE_ENABLE | CACHE_FLUSH, j2_ccr_base + cpu); __raw_writel 33 arch/sh/mm/cache-sh2.c __raw_writel(data, addr | (way << 12)); __raw_writel 49 arch/sh/mm/cache-sh2.c __raw_writel((v & CACHE_PHYSADDR_MASK), __raw_writel 67 arch/sh/mm/cache-sh2.c __raw_writel(ccr, SH_CCR); __raw_writel 80 arch/sh/mm/cache-sh2.c __raw_writel((v & CACHE_PHYSADDR_MASK), __raw_writel 34 arch/sh/mm/cache-sh2a.c __raw_writel(data, CACHE_OC_ADDRESS_ARRAY | addr); __raw_writel 43 arch/sh/mm/cache-sh2a.c __raw_writel((addr & CACHE_PHYSADDR_MASK), cache_addr | addr); __raw_writel 73 arch/sh/mm/cache-sh2a.c __raw_writel(data & ~SH_CACHE_UPDATED, v); __raw_writel 136 arch/sh/mm/cache-sh2a.c __raw_writel(__raw_readl(SH_CCR) | CCR_OCACHE_INVALIDATE, __raw_writel 170 arch/sh/mm/cache-sh2a.c __raw_writel(__raw_readl(SH_CCR) | CCR_ICACHE_INVALIDATE, __raw_writel 57 arch/sh/mm/cache-sh3.c __raw_writel(data, addr); __raw_writel 88 arch/sh/mm/cache-sh3.c __raw_writel(data, addr); __raw_writel 80 arch/sh/mm/cache-sh4.c __raw_writel(0, icacheaddr + (j * PAGE_SIZE)); __raw_writel 138 arch/sh/mm/cache-sh4.c __raw_writel(ccr, SH_CCR); __raw_writel 161 arch/sh/mm/cache-sh4.c __raw_writel(0, addr); addr += entry_offset; __raw_writel 162 arch/sh/mm/cache-sh4.c __raw_writel(0, addr); addr += entry_offset; __raw_writel 163 arch/sh/mm/cache-sh4.c __raw_writel(0, addr); addr += entry_offset; __raw_writel 164 arch/sh/mm/cache-sh4.c __raw_writel(0, addr); addr += entry_offset; __raw_writel 165 arch/sh/mm/cache-sh4.c __raw_writel(0, addr); addr += entry_offset; __raw_writel 166 arch/sh/mm/cache-sh4.c __raw_writel(0, addr); addr += entry_offset; __raw_writel 167 arch/sh/mm/cache-sh4.c __raw_writel(0, addr); addr += entry_offset; __raw_writel 168 arch/sh/mm/cache-sh4.c __raw_writel(0, addr); addr += entry_offset; __raw_writel 54 arch/sh/mm/cache-sh7705.c __raw_writel(data & ~v, addr); __raw_writel 121 arch/sh/mm/cache-sh7705.c __raw_writel(data, addr); __raw_writel 302 arch/sh/mm/pmb.c __raw_writel(pmbe->vpn | PMB_V, addr); __raw_writel 303 arch/sh/mm/pmb.c __raw_writel(pmbe->ppn | pmbe->flags | PMB_V, data); __raw_writel 32 arch/sh/mm/tlb-pteaex.c __raw_writel(vpn, MMU_PTEH); __raw_writel 35 arch/sh/mm/tlb-pteaex.c __raw_writel(get_asid(), MMU_PTEAEX); __raw_writel 47 arch/sh/mm/tlb-pteaex.c __raw_writel(pte.pte_high, MMU_PTEA); __raw_writel 56 arch/sh/mm/tlb-pteaex.c __raw_writel(pteval, MMU_PTEL); __raw_writel 73 arch/sh/mm/tlb-pteaex.c __raw_writel(page, MMU_UTLB_ADDRESS_ARRAY | MMU_PAGE_ASSOC_BIT); __raw_writel 74 arch/sh/mm/tlb-pteaex.c __raw_writel(asid, MMU_UTLB_ADDRESS_ARRAY2 | MMU_PAGE_ASSOC_BIT); __raw_writel 75 arch/sh/mm/tlb-pteaex.c __raw_writel(page, MMU_ITLB_ADDRESS_ARRAY | MMU_PAGE_ASSOC_BIT); __raw_writel 76 arch/sh/mm/tlb-pteaex.c __raw_writel(asid, MMU_ITLB_ADDRESS_ARRAY2 | MMU_PAGE_ASSOC_BIT); __raw_writel 98 arch/sh/mm/tlb-pteaex.c __raw_writel(0x0, MMU_UTLB_ADDRESS_ARRAY | (i << 8)); __raw_writel 101 arch/sh/mm/tlb-pteaex.c __raw_writel(0x0, MMU_ITLB_ADDRESS_ARRAY | (i << 8)); __raw_writel 42 arch/sh/mm/tlb-sh3.c __raw_writel(vpn, MMU_PTEH); __raw_writel 49 arch/sh/mm/tlb-sh3.c __raw_writel(pteval, MMU_PTEL); __raw_writel 76 arch/sh/mm/tlb-sh3.c __raw_writel(data, addr + (i << 8)); __raw_writel 93 arch/sh/mm/tlb-sh3.c __raw_writel(status, MMUCR); __raw_writel 30 arch/sh/mm/tlb-sh4.c __raw_writel(vpn, MMU_PTEH); __raw_writel 42 arch/sh/mm/tlb-sh4.c __raw_writel(pte.pte_high, MMU_PTEA); __raw_writel 48 arch/sh/mm/tlb-sh4.c __raw_writel(copy_ptea_attributes(pteval), MMU_PTEA); __raw_writel 58 arch/sh/mm/tlb-sh4.c __raw_writel(pteval, MMU_PTEL); __raw_writel 78 arch/sh/mm/tlb-sh4.c __raw_writel(data, addr); __raw_writel 100 arch/sh/mm/tlb-sh4.c __raw_writel(0x0, MMU_UTLB_ADDRESS_ARRAY | (i << 8)); __raw_writel 103 arch/sh/mm/tlb-sh4.c __raw_writel(0x0, MMU_ITLB_ADDRESS_ARRAY | (i << 8)); __raw_writel 43 arch/sh/mm/tlb-urb.c __raw_writel(status, MMUCR); __raw_writel 55 arch/sh/mm/tlb-urb.c __raw_writel(status, MMUCR); __raw_writel 89 arch/sh/mm/tlb-urb.c __raw_writel(status, MMUCR); __raw_writel 134 arch/sh/mm/tlbflush_32.c __raw_writel(__raw_readl(MMUCR) | MMUCR_TI, MMUCR); __raw_writel 19 arch/sparc/include/asm/io.h #define writel_be(__w, __addr) __raw_writel(__w, __addr) __raw_writel 84 arch/sparc/include/asm/io_64.h #define __raw_writel __raw_writel __raw_writel 322 arch/sparc/include/asm/io_64.h __raw_writel(l, addr); __raw_writel 427 arch/sparc/include/asm/io_64.h #define iowrite32be __raw_writel __raw_writel 49 arch/sparc/kernel/leon_pci_grpci1.c #define REGSTORE(a, v) (__raw_writel(cpu_to_be32(v), &(a))) __raw_writel 93 arch/sparc/kernel/leon_pci_grpci2.c #define REGSTORE(a, v) (__raw_writel(cpu_to_be32(v), &(a))) __raw_writel 46 arch/sparc/lib/PeeCeeI.c __raw_writel(*(u32 *)src, addr); __raw_writel 55 arch/sparc/lib/PeeCeeI.c __raw_writel(l, addr); __raw_writel 67 arch/sparc/lib/PeeCeeI.c __raw_writel(l, addr); __raw_writel 79 arch/sparc/lib/PeeCeeI.c __raw_writel(l, addr); __raw_writel 111 drivers/ata/ahci_brcm.c __raw_writel(val, addr); __raw_writel 97 drivers/ata/pata_imx.c __raw_writel(val, priv->host_regs + PATA_IMX_ATA_CONTROL); __raw_writel 186 drivers/ata/pata_imx.c __raw_writel(PATA_IMX_ATA_CTRL_FIFO_RST_B | __raw_writel 190 drivers/ata/pata_imx.c __raw_writel(PATA_IMX_ATA_INTR_ATA_INTRQ2, __raw_writel 214 drivers/ata/pata_imx.c __raw_writel(0, priv->host_regs + PATA_IMX_ATA_INT_EN); __raw_writel 230 drivers/ata/pata_imx.c __raw_writel(0, priv->host_regs + PATA_IMX_ATA_INT_EN); __raw_writel 248 drivers/ata/pata_imx.c __raw_writel(priv->ata_ctl, priv->host_regs + PATA_IMX_ATA_CONTROL); __raw_writel 250 drivers/ata/pata_imx.c __raw_writel(PATA_IMX_ATA_INTR_ATA_INTRQ2, __raw_writel 76 drivers/auxdisplay/img-ascii-lcd.c __raw_writel(val, ctx->base); __raw_writel 78 drivers/auxdisplay/img-ascii-lcd.c __raw_writel(val, ctx->base + 4); __raw_writel 126 drivers/bcma/host_soc.c __raw_writel((__force u32)(*buf), addr); __raw_writel 391 drivers/cdrom/gdrom.c __raw_writel(0x1fffff, GDROM_RESET_REG); __raw_writel 583 drivers/cdrom/gdrom.c __raw_writel(virt_to_phys(bio_data(req->bio)), GDROM_DMA_STARTADDR_REG); __raw_writel 584 drivers/cdrom/gdrom.c __raw_writel(block_cnt * GDROM_HARD_SECTOR, GDROM_DMA_LENGTH_REG); __raw_writel 585 drivers/cdrom/gdrom.c __raw_writel(1, GDROM_DMA_DIRECTION_REG); __raw_writel 586 drivers/cdrom/gdrom.c __raw_writel(1, GDROM_DMA_ENABLE_REG); __raw_writel 699 drivers/cdrom/gdrom.c __raw_writel(0x8843407F, GDROM_DMA_ACCESS_CTRL_REG); __raw_writel 700 drivers/cdrom/gdrom.c __raw_writel(9, GDROM_DMA_WAIT_REG); /* DMA word setting */ __raw_writel 57 drivers/char/hw_random/bcm2835-rng.c __raw_writel(val, priv->base + offset); __raw_writel 93 drivers/char/hw_random/mxc-rnga.c __raw_writel(ctrl | RNGA_CONTROL_CLEAR_INT, __raw_writel 107 drivers/char/hw_random/mxc-rnga.c __raw_writel(ctrl & ~RNGA_CONTROL_SLEEP, mxc_rng->mem + RNGA_CONTROL); __raw_writel 118 drivers/char/hw_random/mxc-rnga.c __raw_writel(ctrl | RNGA_CONTROL_GO, mxc_rng->mem + RNGA_CONTROL); __raw_writel 131 drivers/char/hw_random/mxc-rnga.c __raw_writel(ctrl & ~RNGA_CONTROL_GO, mxc_rng->mem + RNGA_CONTROL); __raw_writel 171 drivers/char/hw_random/omap-rng.c __raw_writel(val, priv->base + priv->pdata->regs[reg]); __raw_writel 172 drivers/clk/imx/clk-pllv2.c __raw_writel(dp_ctl | 0x1000L, pllbase + MXC_PLL_DP_CTL); __raw_writel 174 drivers/clk/imx/clk-pllv2.c __raw_writel(dp_op, pllbase + MXC_PLL_DP_OP); __raw_writel 175 drivers/clk/imx/clk-pllv2.c __raw_writel(dp_mfd, pllbase + MXC_PLL_DP_MFD); __raw_writel 176 drivers/clk/imx/clk-pllv2.c __raw_writel(dp_mfn, pllbase + MXC_PLL_DP_MFN); __raw_writel 204 drivers/clk/imx/clk-pllv2.c __raw_writel(reg, pllbase + MXC_PLL_DP_CTL); __raw_writel 231 drivers/clk/imx/clk-pllv2.c __raw_writel(reg, pllbase + MXC_PLL_DP_CTL); __raw_writel 763 drivers/clk/samsung/clk-exynos3250.c __raw_writel(tmp, reg_base + PWR_CTRL1); __raw_writel 769 drivers/clk/samsung/clk-exynos3250.c __raw_writel(0x0, reg_base + PWR_CTRL2); __raw_writel 836 drivers/clk/samsung/clk-exynos5250.c __raw_writel(tmp, reg_base + PWR_CTRL1); __raw_writel 846 drivers/clk/samsung/clk-exynos5250.c __raw_writel(tmp, reg_base + PWR_CTRL2); __raw_writel 170 drivers/clk/samsung/clk-s3c2412.c __raw_writel(0x00, reg_base + CLKSRC); __raw_writel 171 drivers/clk/samsung/clk-s3c2412.c __raw_writel(0x533C2412, reg_base + SWRST); __raw_writel 313 drivers/clk/samsung/clk-s3c2443.c __raw_writel(0x533c2443, reg_base + SWRST); __raw_writel 338 drivers/clk/tegra/clk-dfll.c __raw_writel(val, td->base + offs); __raw_writel 355 drivers/clk/tegra/clk-dfll.c __raw_writel(val, td->i2c_base + offs); __raw_writel 690 drivers/clk/tegra/clk-dfll.c __raw_writel(val, td->lut_base + i * 4); __raw_writel 728 drivers/clk/tegra/clk-dfll.c __raw_writel(val, td->i2c_controller_base + DFLL_I2C_CLK_DIVISOR); __raw_writel 72 drivers/clk/ti/clk-dra7-atl.c __raw_writel(val, cinfo->iobase + reg); __raw_writel 70 drivers/clocksource/mxs_timer.c __raw_writel(BM_TIMROT_TIMCTRLn_IRQ_EN, mxs_timrot_base + __raw_writel 76 drivers/clocksource/mxs_timer.c __raw_writel(BM_TIMROT_TIMCTRLn_IRQ_EN, mxs_timrot_base + __raw_writel 82 drivers/clocksource/mxs_timer.c __raw_writel(BM_TIMROT_TIMCTRLn_IRQ, mxs_timrot_base + __raw_writel 96 drivers/clocksource/mxs_timer.c __raw_writel(evt, mxs_timrot_base + HW_TIMROT_TIMCOUNTn(0)); __raw_writel 105 drivers/clocksource/mxs_timer.c __raw_writel(evt, mxs_timrot_base + HW_TIMROT_FIXED_COUNTn(0)); __raw_writel 134 drivers/clocksource/mxs_timer.c __raw_writel(0xffff, mxs_timrot_base + HW_TIMROT_TIMCOUNTn(1)); __raw_writel 136 drivers/clocksource/mxs_timer.c __raw_writel(0xffffffff, __raw_writel 244 drivers/clocksource/mxs_timer.c __raw_writel((timrot_is_v1() ? __raw_writel 252 drivers/clocksource/mxs_timer.c __raw_writel((timrot_is_v1() ? __raw_writel 260 drivers/clocksource/mxs_timer.c __raw_writel(0xffff, __raw_writel 263 drivers/clocksource/mxs_timer.c __raw_writel(0xffffffff, __raw_writel 99 drivers/clocksource/timer-ixp4xx.c __raw_writel(IXP4XX_OSST_TIMER_1_PEND, __raw_writel 116 drivers/clocksource/timer-ixp4xx.c __raw_writel((cycles & ~IXP4XX_OST_RELOAD_MASK) | val, __raw_writel 129 drivers/clocksource/timer-ixp4xx.c __raw_writel(val, tmr->base + IXP4XX_OSRT1_OFFSET); __raw_writel 138 drivers/clocksource/timer-ixp4xx.c __raw_writel(IXP4XX_OST_ENABLE | IXP4XX_OST_ONE_SHOT, __raw_writel 151 drivers/clocksource/timer-ixp4xx.c __raw_writel(val, tmr->base + IXP4XX_OSRT1_OFFSET); __raw_writel 163 drivers/clocksource/timer-ixp4xx.c __raw_writel(val, tmr->base + IXP4XX_OSRT1_OFFSET); __raw_writel 199 drivers/clocksource/timer-ixp4xx.c __raw_writel(0, tmr->base + IXP4XX_OSRT1_OFFSET); __raw_writel 202 drivers/clocksource/timer-ixp4xx.c __raw_writel(IXP4XX_OSST_TIMER_1_PEND, __raw_writel 206 drivers/clocksource/timer-ixp4xx.c __raw_writel(0, tmr->base + IXP4XX_OSTS_OFFSET); __raw_writel 38 drivers/clocksource/timer-vf-pit.c __raw_writel(PITTCTRL_TEN | PITTCTRL_TIE, clkevt_base + PITTCTRL); __raw_writel 43 drivers/clocksource/timer-vf-pit.c __raw_writel(0, clkevt_base + PITTCTRL); __raw_writel 48 drivers/clocksource/timer-vf-pit.c __raw_writel(PITTFLG_TIF, clkevt_base + PITTFLG); __raw_writel 59 drivers/clocksource/timer-vf-pit.c __raw_writel(0, clksrc_base + PITTCTRL); __raw_writel 60 drivers/clocksource/timer-vf-pit.c __raw_writel(~0UL, clksrc_base + PITLDVAL); __raw_writel 61 drivers/clocksource/timer-vf-pit.c __raw_writel(PITTCTRL_TEN, clksrc_base + PITTCTRL); __raw_writel 79 drivers/clocksource/timer-vf-pit.c __raw_writel(delta - 1, clkevt_base + PITLDVAL); __raw_writel 135 drivers/clocksource/timer-vf-pit.c __raw_writel(0, clkevt_base + PITTCTRL); __raw_writel 136 drivers/clocksource/timer-vf-pit.c __raw_writel(PITTFLG_TIF, clkevt_base + PITTFLG); __raw_writel 192 drivers/clocksource/timer-vf-pit.c __raw_writel(~PITMCR_MDIS, timer_base + PITMCR); __raw_writel 68 drivers/cpufreq/loongson1-cpufreq.c __raw_writel(__raw_readl(LS1X_CLK_PLL_DIV) | RST_CPU_EN | RST_CPU, __raw_writel 70 drivers/cpufreq/loongson1-cpufreq.c __raw_writel(__raw_readl(LS1X_CLK_PLL_DIV) & ~(RST_CPU_EN | RST_CPU), __raw_writel 40 drivers/cpufreq/s3c2410-cpufreq.c __raw_writel(clkdiv, S3C2410_CLKDIVN); __raw_writel 137 drivers/cpufreq/s3c2412-cpufreq.c __raw_writel(clkdiv, S3C2410_CLKDIVN); __raw_writel 160 drivers/cpufreq/s3c2412-cpufreq.c __raw_writel(refresh, S3C2412_REFRESH); __raw_writel 187 drivers/cpufreq/s3c2440-cpufreq.c __raw_writel(camdiv | CAMDIVN_HCLK_HALF, S3C2440_CAMDIVN); __raw_writel 188 drivers/cpufreq/s3c2440-cpufreq.c __raw_writel(clkdiv, S3C2410_CLKDIVN); __raw_writel 191 drivers/cpufreq/s3c2440-cpufreq.c __raw_writel(camdiv, S3C2440_CAMDIVN); __raw_writel 550 drivers/cpufreq/s3c24xx-cpufreq.c __raw_writel(val, S3C2410_LOCKTIME); __raw_writel 69 drivers/crypto/omap-aes.c __raw_writel(value, dd->io_base + offset); \ __raw_writel 75 drivers/crypto/omap-aes.c __raw_writel(value, dd->io_base + offset); __raw_writel 194 drivers/crypto/omap-des.c __raw_writel(value, dd->io_base + offset); \ __raw_writel 200 drivers/crypto/omap-des.c __raw_writel(value, dd->io_base + offset); __raw_writel 255 drivers/crypto/omap-sham.c __raw_writel(value, dd->io_base + offset); __raw_writel 199 drivers/crypto/qat/qat_common/adf_accel_devices.h __raw_writel(val, csr_base + csr_offset) __raw_writel 146 drivers/crypto/s5p-sss.c #define SSS_WRITE(dev, reg, val) __raw_writel((val), SSS_REG(dev, reg)) __raw_writel 149 drivers/crypto/s5p-sss.c #define SSS_AES_WRITE(dev, reg, val) __raw_writel((val), \ __raw_writel 620 drivers/crypto/s5p-sss.c __raw_writel(value, dd->io_hash_base + offset); __raw_writel 274 drivers/dma/at_hdmac_regs.h __raw_writel((val), (atchan)->ch_regs + ATC_##name##_OFFSET) __raw_writel 342 drivers/dma/at_hdmac_regs.h __raw_writel((val), (atdma)->regs + AT_DMA_##name) __raw_writel 260 drivers/dma/imx-dma.c __raw_writel(val, imxdma->base + offset); __raw_writel 264 drivers/dma/iop-adma.h __raw_writel(next_desc_addr, DMA_NDAR(chan)); __raw_writel 267 drivers/dma/iop-adma.h __raw_writel(next_desc_addr, AAU_ANDAR(chan)); __raw_writel 799 drivers/dma/iop-adma.h __raw_writel(dma_chan_ctrl, DMA_CCR(chan)); __raw_writel 811 drivers/dma/iop-adma.h __raw_writel(dma_chan_ctrl, DMA_CCR(chan)); __raw_writel 819 drivers/dma/iop-adma.h __raw_writel(dma_chan_ctrl, DMA_CCR(chan)); __raw_writel 826 drivers/dma/iop-adma.h __raw_writel(status, DMA_CSR(chan)); __raw_writel 833 drivers/dma/iop-adma.h __raw_writel(status, DMA_CSR(chan)); __raw_writel 852 drivers/dma/iop-adma.h __raw_writel(status, DMA_CSR(chan)); __raw_writel 52 drivers/dma/ipu/ipu_idmac.c __raw_writel(value, ipu->reg_ic + reg); __raw_writel 64 drivers/dma/ipu/ipu_idmac.c __raw_writel(value, ipu->reg_ipu + reg); __raw_writel 29 drivers/dma/ipu/ipu_irq.c __raw_writel(value, ipu->reg_ipu + reg); __raw_writel 75 drivers/dma/sh/shdmac.c __raw_writel(val, shdev->chan_reg + chan_pdata->chclr_offset); __raw_writel 80 drivers/dma/sh/shdmac.c __raw_writel(data, sh_dc->base + reg); __raw_writel 103 drivers/dma/sh/shdmac.c __raw_writel(data, addr); __raw_writel 112 drivers/dma/sh/shdmac.c __raw_writel(data, sh_dc->base + shdev->chcr_offset); __raw_writel 280 drivers/dma/ti/cppi41.c __raw_writel(val, mem); __raw_writel 309 drivers/dma/ti/edma.c __raw_writel(val, ecc->base + offset); __raw_writel 42 drivers/dma/txx9dmac.c __raw_writel((val), &(__dma_regs(dc)->name)) __raw_writel 47 drivers/dma/txx9dmac.c __raw_writel((val), &(__dma_regs32(dc)->name)) __raw_writel 115 drivers/dma/txx9dmac.c __raw_writel((val), &(__txx9dmac_regs(ddev)->name)) __raw_writel 120 drivers/dma/txx9dmac.c __raw_writel((val), &(__txx9dmac_regs32(ddev)->name)) __raw_writel 390 drivers/edac/cpc925_edac.c __raw_writel(apimask, pdata->vbase + REG_APIMASK_OFFSET); __raw_writel 397 drivers/edac/cpc925_edac.c __raw_writel(mccr, pdata->vbase + REG_MCCR_OFFSET); __raw_writel 632 drivers/edac/cpc925_edac.c __raw_writel(apimask, dev_info->vbase + REG_APIMASK_OFFSET); __raw_writel 685 drivers/edac/cpc925_edac.c __raw_writel(ht_errctrl, dev_info->vbase + REG_ERRCTRL_OFFSET); __raw_writel 696 drivers/edac/cpc925_edac.c __raw_writel(ht_errctrl, dev_info->vbase + REG_ERRCTRL_OFFSET); __raw_writel 727 drivers/edac/cpc925_edac.c __raw_writel(BRGCTRL_DETSERR, __raw_writel 731 drivers/edac/cpc925_edac.c __raw_writel(HT_LINKCTRL_DETECTED, __raw_writel 736 drivers/edac/cpc925_edac.c __raw_writel(BRGCTRL_SECBUSRESET, __raw_writel 740 drivers/edac/cpc925_edac.c __raw_writel(ERRCTRL_RSP_ERR, __raw_writel 744 drivers/edac/cpc925_edac.c __raw_writel(HT_LINKERR_DETECTED, __raw_writel 78 drivers/firmware/tegra/bpmp-tegra210.c __raw_writel(CH_MASK(channel->index), priv->arb_sema + CLR_OFFSET); __raw_writel 87 drivers/firmware/tegra/bpmp-tegra210.c __raw_writel(MA_ACKD(channel->index), priv->arb_sema + SET_OFFSET); __raw_writel 96 drivers/firmware/tegra/bpmp-tegra210.c __raw_writel(MA_ACKD(channel->index) ^ MA_FREE(channel->index), __raw_writel 106 drivers/firmware/tegra/bpmp-tegra210.c __raw_writel(SL_QUED(channel->index), priv->arb_sema + SET_OFFSET); __raw_writel 154 drivers/fpga/socfpga.c __raw_writel(value, priv->fpga_base_addr + reg_offset); __raw_writel 67 drivers/gpio/gpio-ixp4xx.c __raw_writel(BIT(d->hwirq), g->base + IXP4XX_REG_GPIS); __raw_writel 136 drivers/gpio/gpio-ixp4xx.c __raw_writel(val, g->base + int_reg); __raw_writel 138 drivers/gpio/gpio-ixp4xx.c __raw_writel(BIT(line), g->base + IXP4XX_REG_GPIS); __raw_writel 143 drivers/gpio/gpio-ixp4xx.c __raw_writel(val, g->base + int_reg); __raw_writel 148 drivers/gpio/gpio-ixp4xx.c __raw_writel(val, g->base + IXP4XX_REG_GPOE); __raw_writel 244 drivers/gpio/gpio-ixp4xx.c __raw_writel(0x0, g->base + IXP4XX_REG_GPCLK); __raw_writel 29 drivers/gpio/gpio-loongson1.c __raw_writel(__raw_readl(gpio_reg_base + GPIO_CFG) | BIT(offset), __raw_writel 41 drivers/gpio/gpio-loongson1.c __raw_writel(__raw_readl(gpio_reg_base + GPIO_CFG) & ~BIT(offset), __raw_writel 175 drivers/gpio/gpio-lpc32xx.c __raw_writel(val, group->reg_base + offset); __raw_writel 70 drivers/gpio/gpio-stp-xway.c #define xway_stp_w32(m, val, reg) __raw_writel(val, m + reg) __raw_writel 99 drivers/gpio/gpio-tegra.c __raw_writel(val, tgi->regs + reg); __raw_writel 30 drivers/gpio/gpio-xilinx.c # define xgpio_writereg(offset, val) __raw_writel(val, offset) __raw_writel 360 drivers/gpu/drm/omapdrm/dss/dispc.c __raw_writel(val, dispc->base + idx); __raw_writel 447 drivers/gpu/drm/omapdrm/dss/dsi.c __raw_writel(val, base + idx.idx); __raw_writel 97 drivers/gpu/drm/omapdrm/dss/dss.c __raw_writel(val, dss->base + idx.idx); __raw_writel 268 drivers/gpu/drm/omapdrm/dss/hdmi.h __raw_writel(val, base_addr + idx); __raw_writel 312 drivers/gpu/drm/omapdrm/dss/venc.c __raw_writel(val, venc->base + idx); __raw_writel 46 drivers/i2c/busses/i2c-au1550.c __raw_writel(v, a->psc_base + r); __raw_writel 59 drivers/i2c/busses/i2c-iop3xx.c __raw_writel(IOP3XX_ICR_UNIT_RESET, iop3xx_adap->ioaddr + CR_OFFSET); __raw_writel 60 drivers/i2c/busses/i2c-iop3xx.c __raw_writel(IOP3XX_ISR_CLEARBITS, iop3xx_adap->ioaddr + SR_OFFSET); __raw_writel 61 drivers/i2c/busses/i2c-iop3xx.c __raw_writel(0, iop3xx_adap->ioaddr + CR_OFFSET); __raw_writel 89 drivers/i2c/busses/i2c-iop3xx.c __raw_writel(cr, iop3xx_adap->ioaddr + CR_OFFSET); __raw_writel 100 drivers/i2c/busses/i2c-iop3xx.c __raw_writel(cr, iop3xx_adap->ioaddr + CR_OFFSET); __raw_writel 114 drivers/i2c/busses/i2c-iop3xx.c __raw_writel(sr, iop3xx_adap->ioaddr + SR_OFFSET); __raw_writel 242 drivers/i2c/busses/i2c-iop3xx.c __raw_writel(iic_cook_addr(msg), iop3xx_adap->ioaddr + DBR_OFFSET); __raw_writel 247 drivers/i2c/busses/i2c-iop3xx.c __raw_writel(cr, iop3xx_adap->ioaddr + CR_OFFSET); __raw_writel 261 drivers/i2c/busses/i2c-iop3xx.c __raw_writel(byte, iop3xx_adap->ioaddr + DBR_OFFSET); __raw_writel 269 drivers/i2c/busses/i2c-iop3xx.c __raw_writel(cr, iop3xx_adap->ioaddr + CR_OFFSET); __raw_writel 291 drivers/i2c/busses/i2c-iop3xx.c __raw_writel(cr, iop3xx_adap->ioaddr + CR_OFFSET); __raw_writel 403 drivers/i2c/busses/i2c-iop3xx.c __raw_writel(cr, adapter_data->ioaddr + CR_OFFSET); __raw_writel 60 drivers/i2c/busses/i2c-pmcmsp.c #define pmcmsptwi_writel __raw_writel __raw_writel 104 drivers/i2c/busses/i2c-sh7760.c __raw_writel(val, (unsigned long)cam->iobase + reg); __raw_writel 66 drivers/i2c/busses/i2c-xlr.c __raw_writel(val, base + reg); __raw_writel 94 drivers/ide/tx4939ide.c __raw_writel(val, base + tx4939ide_swizzlel(reg)); __raw_writel 73 drivers/iio/adc/lpc32xx_adc.c __raw_writel(LPC32XXAD_INTERNAL | (chan->address) | __raw_writel 77 drivers/iio/adc/lpc32xx_adc.c __raw_writel(LPC32XXAD_PDN_CTRL | LPC32XXAD_STROBE, __raw_writel 92 drivers/iio/adc/spear_adc.c __raw_writel(val, &st->adc_base_spear6xx->status); __raw_writel 105 drivers/iio/adc/spear_adc.c __raw_writel(SPEAR_ADC_CLK_LOW(clk_low) | SPEAR_ADC_CLK_HIGH(clk_high), __raw_writel 112 drivers/iio/adc/spear_adc.c __raw_writel(val, &st->adc_base_spear6xx->ch_ctrl[n]); __raw_writel 129 drivers/iio/adc/spear_adc.c __raw_writel(SPEAR600_ADC_SCAN_RATE_LO(rate), __raw_writel 131 drivers/iio/adc/spear_adc.c __raw_writel(SPEAR600_ADC_SCAN_RATE_HI(rate), __raw_writel 134 drivers/iio/adc/spear_adc.c __raw_writel(rate, &st->adc_base_spear3xx->scan_rate); __raw_writel 243 drivers/iio/adc/spear_adc.c __raw_writel(0, &st->adc_base_spear6xx->clk); __raw_writel 43 drivers/infiniband/hw/hns/hns_roce_common.h __raw_writel((__force u32)cpu_to_le32(value), (addr)) __raw_writel 209 drivers/infiniband/hw/mthca/mthca_cmd.c __raw_writel((__force u32) cpu_to_be32(in_param >> 32), ptr + offs[0]); __raw_writel 211 drivers/infiniband/hw/mthca/mthca_cmd.c __raw_writel((__force u32) cpu_to_be32(in_param & 0xfffffffful), ptr + offs[1]); __raw_writel 213 drivers/infiniband/hw/mthca/mthca_cmd.c __raw_writel((__force u32) cpu_to_be32(in_modifier), ptr + offs[2]); __raw_writel 215 drivers/infiniband/hw/mthca/mthca_cmd.c __raw_writel((__force u32) cpu_to_be32(out_param >> 32), ptr + offs[3]); __raw_writel 217 drivers/infiniband/hw/mthca/mthca_cmd.c __raw_writel((__force u32) cpu_to_be32(out_param & 0xfffffffful), ptr + offs[4]); __raw_writel 219 drivers/infiniband/hw/mthca/mthca_cmd.c __raw_writel((__force u32) cpu_to_be32(token << 16), ptr + offs[5]); __raw_writel 221 drivers/infiniband/hw/mthca/mthca_cmd.c __raw_writel((__force u32) cpu_to_be32((1 << HCR_GO_BIT) | __raw_writel 226 drivers/infiniband/hw/mthca/mthca_cmd.c __raw_writel((__force u32) 0, ptr + offs[7]); __raw_writel 257 drivers/infiniband/hw/mthca/mthca_cmd.c __raw_writel((__force u32) cpu_to_be32(in_param >> 32), dev->hcr + 0 * 4); __raw_writel 258 drivers/infiniband/hw/mthca/mthca_cmd.c __raw_writel((__force u32) cpu_to_be32(in_param & 0xfffffffful), dev->hcr + 1 * 4); __raw_writel 259 drivers/infiniband/hw/mthca/mthca_cmd.c __raw_writel((__force u32) cpu_to_be32(in_modifier), dev->hcr + 2 * 4); __raw_writel 260 drivers/infiniband/hw/mthca/mthca_cmd.c __raw_writel((__force u32) cpu_to_be32(out_param >> 32), dev->hcr + 3 * 4); __raw_writel 261 drivers/infiniband/hw/mthca/mthca_cmd.c __raw_writel((__force u32) cpu_to_be32(out_param & 0xfffffffful), dev->hcr + 4 * 4); __raw_writel 262 drivers/infiniband/hw/mthca/mthca_cmd.c __raw_writel((__force u32) cpu_to_be32(token << 16), dev->hcr + 5 * 4); __raw_writel 267 drivers/infiniband/hw/mthca/mthca_cmd.c __raw_writel((__force u32) cpu_to_be32((1 << HCR_GO_BIT) | __raw_writel 84 drivers/infiniband/hw/mthca/mthca_doorbell.h __raw_writel(((__force u32 *) &val)[0], dest); __raw_writel 85 drivers/infiniband/hw/mthca/mthca_doorbell.h __raw_writel(((__force u32 *) &val)[1], dest + 4); __raw_writel 97 drivers/infiniband/hw/mthca/mthca_doorbell.h __raw_writel(hi, dest); __raw_writel 98 drivers/infiniband/hw/mthca/mthca_doorbell.h __raw_writel(lo, dest + 4); __raw_writel 193 drivers/infiniband/hw/mthca/mthca_eq.c __raw_writel((__force u32) cpu_to_be32(ci), __raw_writel 748 drivers/infiniband/hw/mthca/mthca_mr.c __raw_writel((__force u32) mpt_entry.lkey, &fmr->mem.tavor.mpt->key); __raw_writel 649 drivers/infiniband/hw/qib/qib_diag.c __raw_writel(tmpbuf[plen - 1], piobuf + plen + 1); __raw_writel 657 drivers/infiniband/hw/qib/qib_diag.c __raw_writel(0xaebecede, piobuf + spcl_off); __raw_writel 3397 drivers/infiniband/hw/qib/qib_iba7220.c __raw_writel(0xaebecede, piobuf + spcl_off); __raw_writel 1453 drivers/infiniband/hw/qib/qib_iba7322.c __raw_writel(hdr[hdrwords - 1], piobuf + hdrwords + 1); __raw_writel 5246 drivers/infiniband/hw/qib/qib_iba7322.c __raw_writel(0xaebecede, piobuf + spcl_off); __raw_writel 55 drivers/infiniband/hw/qib/qib_pio_copy.c __raw_writel(*(const u32 *)src, dst); __raw_writel 62 drivers/infiniband/hw/qib/qib_pio_copy.c __raw_writel(*src++, dst++); __raw_writel 693 drivers/infiniband/hw/qib/qib_rc.c __raw_writel(hdrp[hwords - 1], piobuf + hwords + 1); __raw_writel 701 drivers/infiniband/hw/qib/qib_rc.c __raw_writel(0xaebecede, piobuf + spcl_off); __raw_writel 459 drivers/infiniband/hw/qib/qib_verbs.c __raw_writel(data, piobuf); __raw_writel 483 drivers/infiniband/hw/qib/qib_verbs.c __raw_writel(data, piobuf); __raw_writel 502 drivers/infiniband/hw/qib/qib_verbs.c __raw_writel(data, piobuf); __raw_writel 553 drivers/infiniband/hw/qib/qib_verbs.c __raw_writel(last, piobuf); __raw_writel 557 drivers/infiniband/hw/qib/qib_verbs.c __raw_writel(last, piobuf); __raw_writel 949 drivers/infiniband/hw/qib/qib_verbs.c __raw_writel(hdr[hdrwords - 1], piobuf + hdrwords - 1); __raw_writel 972 drivers/infiniband/hw/qib/qib_verbs.c __raw_writel(addr[dwords - 1], piobuf + dwords - 1); __raw_writel 985 drivers/infiniband/hw/qib/qib_verbs.c __raw_writel(0xaebecede, piobuf_orig + spcl_off); __raw_writel 70 drivers/input/keyboard/davinci_keyscan.c __raw_writel(DAVINCI_KEYSCAN_INT_ALL, __raw_writel 74 drivers/input/keyboard/davinci_keyscan.c __raw_writel(DAVINCI_KEYSCAN_INT_ALL, __raw_writel 78 drivers/input/keyboard/davinci_keyscan.c __raw_writel(pdata->strobe, __raw_writel 80 drivers/input/keyboard/davinci_keyscan.c __raw_writel(pdata->interval, __raw_writel 82 drivers/input/keyboard/davinci_keyscan.c __raw_writel(0x01, __raw_writel 99 drivers/input/keyboard/davinci_keyscan.c __raw_writel(DAVINCI_KEYSCAN_AUTODET | DAVINCI_KEYSCAN_KEYEN | __raw_writel 117 drivers/input/keyboard/davinci_keyscan.c __raw_writel(0x0, davinci_ks->base + DAVINCI_KEYSCAN_INTENA); __raw_writel 142 drivers/input/keyboard/davinci_keyscan.c __raw_writel(DAVINCI_KEYSCAN_INT_ALL, __raw_writel 147 drivers/input/keyboard/davinci_keyscan.c __raw_writel(0x1, davinci_ks->base + DAVINCI_KEYSCAN_INTENA); __raw_writel 151 drivers/input/keyboard/ep93xx_keypad.c __raw_writel(val, keypad->mmio_base + KEY_INIT); __raw_writel 58 drivers/input/keyboard/goldfish_events.c __raw_writel(PAGE_EVBITS | type, addr + REG_SET_PAGE); __raw_writel 81 drivers/input/keyboard/goldfish_events.c __raw_writel(PAGE_ABSDATA, addr + REG_SET_PAGE); __raw_writel 125 drivers/input/keyboard/goldfish_events.c __raw_writel(PAGE_NAME, addr + REG_SET_PAGE); __raw_writel 93 drivers/input/keyboard/omap4-keypad.c __raw_writel(value, __raw_writel 106 drivers/input/keyboard/omap4-keypad.c __raw_writel(value, __raw_writel 91 drivers/input/keyboard/pxa27x_keypad.c #define keypad_writel(off, v) __raw_writel((v), keypad->mmio_base + (off)) __raw_writel 33 drivers/input/keyboard/pxa930_rotary.c __raw_writel(sbcr | SBCR_ERSB, r->mmio_base + SBCR); __raw_writel 34 drivers/input/keyboard/pxa930_rotary.c __raw_writel(sbcr & ~SBCR_ERSB, r->mmio_base + SBCR); __raw_writel 69 drivers/input/mouse/pxa930_trkball.c __raw_writel(TBSBC_TBSBC, trkball->mmio_base + TBSBC); __raw_writel 70 drivers/input/mouse/pxa930_trkball.c __raw_writel(0, trkball->mmio_base + TBSBC); __raw_writel 80 drivers/input/mouse/pxa930_trkball.c __raw_writel(v, trkball->mmio_base + TBCR); __raw_writel 111 drivers/input/mouse/pxa930_trkball.c __raw_writel(TBSBC_TBSBC, trkball->mmio_base + TBSBC); __raw_writel 112 drivers/input/mouse/pxa930_trkball.c __raw_writel(0, trkball->mmio_base + TBSBC); __raw_writel 62 drivers/input/touchscreen/lpc32xx_ts.c __raw_writel((val), (dev)->tsc_base + (reg)) __raw_writel 263 drivers/iommu/omap-iommu.h __raw_writel(val, obj->regbase + offs); __raw_writel 67 drivers/irqchip/irq-ath79-misc.c __raw_writel(t | BIT(irq), base + AR71XX_RESET_REG_MISC_INT_ENABLE); __raw_writel 80 drivers/irqchip/irq-ath79-misc.c __raw_writel(t & ~BIT(irq), base + AR71XX_RESET_REG_MISC_INT_ENABLE); __raw_writel 93 drivers/irqchip/irq-ath79-misc.c __raw_writel(t & ~BIT(irq), base + AR71XX_RESET_REG_MISC_INT_STATUS); __raw_writel 125 drivers/irqchip/irq-ath79-misc.c __raw_writel(0, base + AR71XX_RESET_REG_MISC_INT_ENABLE); __raw_writel 126 drivers/irqchip/irq-ath79-misc.c __raw_writel(0, base + AR71XX_RESET_REG_MISC_INT_STATUS); __raw_writel 160 drivers/irqchip/irq-bcm6345-l1.c __raw_writel(intc->cpus[cpu_idx]->enable_cache[word], __raw_writel 172 drivers/irqchip/irq-bcm6345-l1.c __raw_writel(intc->cpus[cpu_idx]->enable_cache[word], __raw_writel 266 drivers/irqchip/irq-bcm6345-l1.c __raw_writel(0, cpu->map_base + reg_enable(intc, i)); __raw_writel 81 drivers/irqchip/irq-ixp4xx.c __raw_writel(val, ixi->irqbase + IXP4XX_ICMR2); __raw_writel 85 drivers/irqchip/irq-ixp4xx.c __raw_writel(val, ixi->irqbase + IXP4XX_ICMR); __raw_writel 101 drivers/irqchip/irq-ixp4xx.c __raw_writel(val, ixi->irqbase + IXP4XX_ICMR2); __raw_writel 105 drivers/irqchip/irq-ixp4xx.c __raw_writel(val, ixi->irqbase + IXP4XX_ICMR); __raw_writel 266 drivers/irqchip/irq-ixp4xx.c __raw_writel(0x0, ixi->irqbase + IXP4XX_ICLR); __raw_writel 269 drivers/irqchip/irq-ixp4xx.c __raw_writel(0x0, ixi->irqbase + IXP4XX_ICMR); __raw_writel 273 drivers/irqchip/irq-ixp4xx.c __raw_writel(0x0, ixi->irqbase + IXP4XX_ICLR2); __raw_writel 276 drivers/irqchip/irq-ixp4xx.c __raw_writel(0x0, ixi->irqbase + IXP4XX_ICMR2); __raw_writel 85 drivers/irqchip/irq-jcore-aic.c __raw_writel(0xffffffff, base + JCORE_AIC1_INTPRI_REG); __raw_writel 85 drivers/irqchip/irq-mxs.c __raw_writel(BV_ICOLL_LEVELACK_IRQLEVELACK__LEVEL0, __raw_writel 91 drivers/irqchip/irq-mxs.c __raw_writel(BM_ICOLL_INTR_ENABLE, __raw_writel 97 drivers/irqchip/irq-mxs.c __raw_writel(BM_ICOLL_INTR_ENABLE, __raw_writel 103 drivers/irqchip/irq-mxs.c __raw_writel(icoll_intr_bitshift(d, BM_ICOLL_INTR_ENABLE), __raw_writel 109 drivers/irqchip/irq-mxs.c __raw_writel(ASM9260_BM_CLEAR_BIT(d->hwirq), __raw_writel 113 drivers/irqchip/irq-mxs.c __raw_writel(icoll_intr_bitshift(d, BM_ICOLL_INTR_ENABLE), __raw_writel 138 drivers/irqchip/irq-mxs.c __raw_writel(irqnr, icoll_priv.vector); __raw_writel 140 drivers/mailbox/omap-mailbox.c __raw_writel(val, mdev->mbox_base + ofs); __raw_writel 32 drivers/media/pci/cx18/cx18-io.h __raw_writel(val, addr); __raw_writel 63 drivers/media/pci/ivtv/ivtv-firmware.c __raw_writel(*src, dst); __raw_writel 116 drivers/media/platform/davinci/dm355_ccdc.c __raw_writel(val, ccdc_cfg.base_addr + offset); __raw_writel 94 drivers/media/platform/davinci/dm644x_ccdc.c __raw_writel(val, ccdc_cfg.base_addr + offset); __raw_writel 143 drivers/media/platform/davinci/isif.c __raw_writel(val, isif_cfg.base_addr + offset); __raw_writel 158 drivers/media/platform/davinci/isif.c __raw_writel(val, isif_cfg.linear_tbl0_addr + offset); __raw_writel 160 drivers/media/platform/davinci/isif.c __raw_writel(val, isif_cfg.linear_tbl1_addr + offset); __raw_writel 126 drivers/media/platform/davinci/vpss.c __raw_writel(val, oper_cfg.vpss_regs_base0 + offset); __raw_writel 136 drivers/media/platform/davinci/vpss.c __raw_writel(val, oper_cfg.vpss_regs_base1 + offset); __raw_writel 148 drivers/media/platform/davinci/vpss.c __raw_writel(val, oper_cfg.vpss_regs_base0 + offset); __raw_writel 294 drivers/media/platform/omap3isp/isp.h __raw_writel(reg_value, isp->mmio_base[isp_mmio_range] + reg_offset); __raw_writel 960 drivers/media/platform/pxa_camera.c __raw_writel(__raw_readl(pcdev->base + CISR), pcdev->base + CISR); __raw_writel 964 drivers/media/platform/pxa_camera.c __raw_writel(cicr0, pcdev->base + CICR0); __raw_writel 974 drivers/media/platform/pxa_camera.c __raw_writel(cicr0, pcdev->base + CICR0); __raw_writel 1151 drivers/media/platform/pxa_camera.c __raw_writel(ciclk_per_pixel, pcdev->base + CITOR); __raw_writel 1159 drivers/media/platform/pxa_camera.c __raw_writel(0x3ff, pcdev->base + CICR0); __raw_writel 1172 drivers/media/platform/pxa_camera.c __raw_writel(pcdev->mclk_divisor | cicr4, pcdev->base + CICR4); __raw_writel 1201 drivers/media/platform/pxa_camera.c __raw_writel(cifr, pcdev->base + CIFR); __raw_writel 1223 drivers/media/platform/pxa_camera.c __raw_writel(status, pcdev->base + CISR); __raw_writel 1227 drivers/media/platform/pxa_camera.c __raw_writel(cicr0, pcdev->base + CICR0); __raw_writel 1305 drivers/media/platform/pxa_camera.c __raw_writel(cicr0 & ~CICR0_ENB, pcdev->base + CICR0); __raw_writel 1341 drivers/media/platform/pxa_camera.c __raw_writel(cicr1, pcdev->base + CICR1); __raw_writel 1342 drivers/media/platform/pxa_camera.c __raw_writel(cicr2, pcdev->base + CICR2); __raw_writel 1343 drivers/media/platform/pxa_camera.c __raw_writel(cicr3, pcdev->base + CICR3); __raw_writel 1344 drivers/media/platform/pxa_camera.c __raw_writel(cicr4, pcdev->base + CICR4); __raw_writel 1350 drivers/media/platform/pxa_camera.c __raw_writel(cicr0, pcdev->base + CICR0); __raw_writel 1837 drivers/media/platform/pxa_camera.c __raw_writel(reg->val, pcdev->base + reg->reg); __raw_writel 2223 drivers/media/platform/pxa_camera.c __raw_writel(0x3ff, pcdev->base + CICR0); __raw_writel 2271 drivers/media/platform/pxa_camera.c __raw_writel(pcdev->save_cicr[i++] & ~CICR0_ENB, pcdev->base + CICR0); __raw_writel 2272 drivers/media/platform/pxa_camera.c __raw_writel(pcdev->save_cicr[i++], pcdev->base + CICR1); __raw_writel 2273 drivers/media/platform/pxa_camera.c __raw_writel(pcdev->save_cicr[i++], pcdev->base + CICR2); __raw_writel 2274 drivers/media/platform/pxa_camera.c __raw_writel(pcdev->save_cicr[i++], pcdev->base + CICR3); __raw_writel 2275 drivers/media/platform/pxa_camera.c __raw_writel(pcdev->save_cicr[i++], pcdev->base + CICR4); __raw_writel 39 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c __raw_writel(v, r); \ __raw_writel 96 drivers/media/platform/sh_vou.c __raw_writel(value, vou_dev->base + reg); __raw_writel 102 drivers/media/platform/sh_vou.c __raw_writel(value, vou_dev->base + reg); __raw_writel 103 drivers/media/platform/sh_vou.c __raw_writel(value, vou_dev->base + reg + 0x1000); __raw_writel 109 drivers/media/platform/sh_vou.c __raw_writel(value, vou_dev->base + reg + 0x2000); __raw_writel 123 drivers/media/platform/sh_vou.c __raw_writel(value, vou_dev->base + reg); __raw_writel 177 drivers/media/rc/mtk-cir.c __raw_writel(tmp, ir->base + reg); __raw_writel 182 drivers/media/rc/mtk-cir.c __raw_writel(val, ir->base + reg); __raw_writel 248 drivers/memstick/host/jmb38x_ms.c __raw_writel(*(unsigned int *)(buf + off), __raw_writel 83 drivers/memstick/host/r592.c __raw_writel(cpu_to_be32(value), dev->mmio + address); __raw_writel 155 drivers/memstick/host/tifm_ms.c __raw_writel(*(unsigned int *)(buf + off), __raw_writel 108 drivers/misc/genwqe/card_utils.c __raw_writel((__force u32)cpu_to_be32(val), cd->mmio + byte_offs); __raw_writel 170 drivers/mmc/host/atmel-mci.c __raw_writel((value), (port)->regs + reg) __raw_writel 168 drivers/mmc/host/au1xmmc.c __raw_writel(val, HOST_CONFIG(host)); __raw_writel 176 drivers/mmc/host/au1xmmc.c __raw_writel(val | SD_CONFIG2_FF, HOST_CONFIG2(host)); __raw_writel 183 drivers/mmc/host/au1xmmc.c __raw_writel(val, HOST_CONFIG2(host)); __raw_writel 191 drivers/mmc/host/au1xmmc.c __raw_writel(val, HOST_CONFIG(host)); __raw_writel 203 drivers/mmc/host/au1xmmc.c __raw_writel(config2 | SD_CONFIG2_DF, HOST_CONFIG2(host)); __raw_writel 207 drivers/mmc/host/au1xmmc.c __raw_writel(STOP_CMD, HOST_CMD(host)); __raw_writel 302 drivers/mmc/host/au1xmmc.c __raw_writel(cmd->arg, HOST_CMDARG(host)); __raw_writel 308 drivers/mmc/host/au1xmmc.c __raw_writel((mmccmd | SD_CMD_GO), HOST_CMD(host)); __raw_writel 323 drivers/mmc/host/au1xmmc.c __raw_writel(SD_STATUS_CR, HOST_STATUS(host)); __raw_writel 363 drivers/mmc/host/au1xmmc.c __raw_writel(SD_STATUS_WC | SD_STATUS_RC, HOST_STATUS(host)); __raw_writel 425 drivers/mmc/host/au1xmmc.c __raw_writel((unsigned long)val, HOST_TXPORT(host)); __raw_writel 613 drivers/mmc/host/au1xmmc.c __raw_writel(config, HOST_CONFIG(host)); __raw_writel 638 drivers/mmc/host/au1xmmc.c __raw_writel(data->blksz - 1, HOST_BLKSIZE(host)); __raw_writel 725 drivers/mmc/host/au1xmmc.c __raw_writel(SD_ENABLE_CE, HOST_ENABLE(host)); __raw_writel 729 drivers/mmc/host/au1xmmc.c __raw_writel(SD_ENABLE_R | SD_ENABLE_CE, HOST_ENABLE(host)); __raw_writel 733 drivers/mmc/host/au1xmmc.c __raw_writel(~0, HOST_STATUS(host)); __raw_writel 736 drivers/mmc/host/au1xmmc.c __raw_writel(0, HOST_BLKSIZE(host)); __raw_writel 737 drivers/mmc/host/au1xmmc.c __raw_writel(0x001fffff, HOST_TIMEOUT(host)); __raw_writel 740 drivers/mmc/host/au1xmmc.c __raw_writel(SD_CONFIG2_EN, HOST_CONFIG2(host)); __raw_writel 743 drivers/mmc/host/au1xmmc.c __raw_writel(SD_CONFIG2_EN | SD_CONFIG2_FF, HOST_CONFIG2(host)); __raw_writel 747 drivers/mmc/host/au1xmmc.c __raw_writel(SD_CONFIG2_EN, HOST_CONFIG2(host)); __raw_writel 751 drivers/mmc/host/au1xmmc.c __raw_writel(AU1XMMC_INTERRUPTS, HOST_CONFIG(host)); __raw_writel 785 drivers/mmc/host/au1xmmc.c __raw_writel(config2, HOST_CONFIG2(host)); __raw_writel 844 drivers/mmc/host/au1xmmc.c __raw_writel(status, HOST_STATUS(host)); __raw_writel 1105 drivers/mmc/host/au1xmmc.c __raw_writel(0, HOST_ENABLE(host)); __raw_writel 1106 drivers/mmc/host/au1xmmc.c __raw_writel(0, HOST_CONFIG(host)); __raw_writel 1107 drivers/mmc/host/au1xmmc.c __raw_writel(0, HOST_CONFIG2(host)); __raw_writel 1151 drivers/mmc/host/au1xmmc.c __raw_writel(0, HOST_ENABLE(host)); __raw_writel 1152 drivers/mmc/host/au1xmmc.c __raw_writel(0, HOST_CONFIG(host)); __raw_writel 1153 drivers/mmc/host/au1xmmc.c __raw_writel(0, HOST_CONFIG2(host)); __raw_writel 1182 drivers/mmc/host/au1xmmc.c __raw_writel(0, HOST_CONFIG2(host)); __raw_writel 1183 drivers/mmc/host/au1xmmc.c __raw_writel(0, HOST_CONFIG(host)); __raw_writel 1184 drivers/mmc/host/au1xmmc.c __raw_writel(0xffffffff, HOST_STATUS(host)); __raw_writel 1185 drivers/mmc/host/au1xmmc.c __raw_writel(0, HOST_ENABLE(host)); __raw_writel 457 drivers/mmc/host/dw_mmc.h #define mci_fifo_writel(__value, __reg) __raw_writel(__reg, __value) __raw_writel 162 drivers/mmc/host/omap_hsmmc.c __raw_writel((val), (base) + OMAP_HSMMC_##reg) __raw_writel 643 drivers/mtd/nand/raw/brcmnand/brcmnand.c __raw_writel(val, ctrl->nand_fc + word * 4); __raw_writel 56 drivers/mtd/nand/raw/brcmnand/brcmnand.h __raw_writel(val, addr); __raw_writel 78 drivers/mtd/nand/raw/davinci_nand.c __raw_writel(value, info->base + offset); __raw_writel 99 drivers/mtd/nand/raw/txx9ndfmc.c __raw_writel(val, ndregaddr(dev, reg)); __raw_writel 118 drivers/mtd/nand/raw/txx9ndfmc.c __raw_writel(*buf++, ndfdtr); __raw_writel 273 drivers/mtd/nand/raw/vf610_nfc.c __raw_writel(swab32(val), dst + i); __raw_writel 798 drivers/net/can/kvaser_pciefd.c __raw_writel(data_last, can->reg_base + __raw_writel 802 drivers/net/can/kvaser_pciefd.c __raw_writel(0, can->reg_base + __raw_writel 219 drivers/net/can/ti_hecc.c __raw_writel(val, priv->hecc_ram + mbxno * 4); __raw_writel 230 drivers/net/can/ti_hecc.c __raw_writel(val, priv->mbx + mbxno * 0x10 + reg); __raw_writel 240 drivers/net/can/ti_hecc.c __raw_writel(val, priv->base + reg); __raw_writel 329 drivers/net/dsa/lantiq_gswip.c __raw_writel(val, priv->gswip + (offset * 4)); __raw_writel 358 drivers/net/dsa/lantiq_gswip.c __raw_writel(val, priv->mdio + (offset * 4)); __raw_writel 378 drivers/net/dsa/lantiq_gswip.c __raw_writel(val, priv->mii + (offset * 4)); __raw_writel 82 drivers/net/ethernet/aeroflex/greth.c #define GRETH_REGSAVE(a, v) (__raw_writel(cpu_to_be32(v), &(a))) __raw_writel 157 drivers/net/ethernet/aeroflex/greth.c __raw_writel(cpu_to_be32(val), bd); __raw_writel 78 drivers/net/ethernet/broadcom/genet/bcmgenet.c __raw_writel(value, offset); __raw_writel 699 drivers/net/ethernet/broadcom/genet/bcmgenet.h __raw_writel(val, priv->base + offset + off); \ __raw_writel 233 drivers/net/ethernet/cadence/macb_main.c __raw_writel(value, bp->regs + offset); __raw_writel 254 drivers/net/ethernet/cadence/macb_main.c __raw_writel(value, addr + MACB_NCR); __raw_writel 258 drivers/net/ethernet/cadence/macb_main.c __raw_writel(0, addr + MACB_NCR); __raw_writel 1241 drivers/net/ethernet/calxeda/xgmac.c __raw_writel(DMA_INTR_DEFAULT_MASK, priv->base + XGMAC_DMA_INTR_ENA); __raw_writel 1389 drivers/net/ethernet/calxeda/xgmac.c __raw_writel(intr_status, priv->base + XGMAC_DMA_STATUS); __raw_writel 1421 drivers/net/ethernet/calxeda/xgmac.c __raw_writel(DMA_INTR_ABNORMAL, priv->base + XGMAC_DMA_INTR_ENA); __raw_writel 183 drivers/net/ethernet/cirrus/ep93xx_eth.c #define wrl(ep, off, val) __raw_writel((val), (ep)->base_addr + (off)) __raw_writel 33 drivers/net/ethernet/freescale/enetc/enetc_pf.c __raw_writel(upper, hw->port + ENETC_PSIPMAR0(si)); __raw_writel 207 drivers/net/ethernet/freescale/fs_enet/fs_enet.h #define __cbd_out32(addr, x) __raw_writel(x, addr) __raw_writel 49 drivers/net/ethernet/freescale/fs_enet/mac-fec.c #define __fs_out32(addr, x) __raw_writel(x, addr) __raw_writel 45 drivers/net/ethernet/freescale/fs_enet/mac-scc.c #define __fs_out32(addr, x) __raw_writel(x, addr) __raw_writel 84 drivers/net/ethernet/lantiq_xrx200.c __raw_writel(val, priv->pmac_reg + offset); __raw_writel 60 drivers/net/ethernet/mediatek/mtk_eth_soc.c __raw_writel(val, eth->base + reg); __raw_writel 130 drivers/net/ethernet/mellanox/mlx4/catas.c __raw_writel((__force u32)cpu_to_be32(comm_flags), __raw_writel 282 drivers/net/ethernet/mellanox/mlx4/cmd.c __raw_writel((__force u32) cpu_to_be32(val), __raw_writel 482 drivers/net/ethernet/mellanox/mlx4/cmd.c __raw_writel((__force u32) cpu_to_be32(in_param >> 32), hcr + 0); __raw_writel 483 drivers/net/ethernet/mellanox/mlx4/cmd.c __raw_writel((__force u32) cpu_to_be32(in_param & 0xfffffffful), hcr + 1); __raw_writel 484 drivers/net/ethernet/mellanox/mlx4/cmd.c __raw_writel((__force u32) cpu_to_be32(in_modifier), hcr + 2); __raw_writel 485 drivers/net/ethernet/mellanox/mlx4/cmd.c __raw_writel((__force u32) cpu_to_be32(out_param >> 32), hcr + 3); __raw_writel 486 drivers/net/ethernet/mellanox/mlx4/cmd.c __raw_writel((__force u32) cpu_to_be32(out_param & 0xfffffffful), hcr + 4); __raw_writel 487 drivers/net/ethernet/mellanox/mlx4/cmd.c __raw_writel((__force u32) cpu_to_be32(token << 16), hcr + 5); __raw_writel 492 drivers/net/ethernet/mellanox/mlx4/cmd.c __raw_writel((__force u32) cpu_to_be32((1 << HCR_GO_BIT) | __raw_writel 2200 drivers/net/ethernet/mellanox/mlx4/cmd.c __raw_writel((__force u32) cpu_to_be32(reply), __raw_writel 2227 drivers/net/ethernet/mellanox/mlx4/cmd.c __raw_writel((__force u32) cpu_to_be32(reply), __raw_writel 2340 drivers/net/ethernet/mellanox/mlx4/cmd.c __raw_writel((__force u32) 0, &priv->mfunc.comm->slave_read); __raw_writel 2341 drivers/net/ethernet/mellanox/mlx4/cmd.c __raw_writel((__force u32) 0, &priv->mfunc.comm->slave_write); __raw_writel 2401 drivers/net/ethernet/mellanox/mlx4/cmd.c __raw_writel((__force u32) 0, __raw_writel 2403 drivers/net/ethernet/mellanox/mlx4/cmd.c __raw_writel((__force u32) 0, __raw_writel 2568 drivers/net/ethernet/mellanox/mlx4/cmd.c __raw_writel((__force u32)cpu_to_be32(slave_read), __raw_writel 99 drivers/net/ethernet/mellanox/mlx4/eq.c __raw_writel((__force u32) cpu_to_be32((eq->cons_index & 0xffffff) | __raw_writel 758 drivers/net/ethernet/mellanox/mlx5/core/eq.c __raw_writel((__force u32)cpu_to_be32(val), addr); __raw_writel 67 drivers/net/ethernet/mellanox/mlx5/core/lib/eq.h __raw_writel((__force u32)cpu_to_be32(val), addr); __raw_writel 362 drivers/net/ethernet/myricom/myri10ge/myri10ge.c __raw_writel((__force __u32) val, (__force void __iomem *)p); __raw_writel 1031 drivers/net/ethernet/netronome/nfp/nfpcore/nfp6000_pcie.c __raw_writel(*rdptr32++, wrptr32++); __raw_writel 81 drivers/net/ethernet/sfc/falcon/io.h __raw_writel((__force u32)value, efx->membase + reg); __raw_writel 126 drivers/net/ethernet/sfc/falcon/io.h __raw_writel((__force u32)value->u32[0], membase + addr); __raw_writel 127 drivers/net/ethernet/sfc/falcon/io.h __raw_writel((__force u32)value->u32[1], membase + addr + 4); __raw_writel 93 drivers/net/ethernet/sfc/io.h __raw_writel((__force u32)value, efx->membase + reg); __raw_writel 138 drivers/net/ethernet/sfc/io.h __raw_writel((__force u32)value->u32[0], membase + addr); __raw_writel 139 drivers/net/ethernet/sfc/io.h __raw_writel((__force u32)value->u32[1], membase + addr + 4); __raw_writel 319 drivers/net/ethernet/xscale/ixp4xx_eth.c __raw_writel(RX_SNAPSHOT_LOCKED, ®s->channel[ch].ch_event); __raw_writel 365 drivers/net/ethernet/xscale/ixp4xx_eth.c __raw_writel(TX_SNAPSHOT_LOCKED, ®s->channel[ch].ch_event); __raw_writel 393 drivers/net/ethernet/xscale/ixp4xx_eth.c __raw_writel(0, ®s->channel[ch].ch_control); __raw_writel 397 drivers/net/ethernet/xscale/ixp4xx_eth.c __raw_writel(MASTER_MODE, ®s->channel[ch].ch_control); __raw_writel 406 drivers/net/ethernet/xscale/ixp4xx_eth.c __raw_writel(TX_SNAPSHOT_LOCKED | RX_SNAPSHOT_LOCKED, __raw_writel 449 drivers/net/ethernet/xscale/ixp4xx_eth.c __raw_writel(cmd & 0xFF, &mdio_regs->mdio_command[0]); __raw_writel 450 drivers/net/ethernet/xscale/ixp4xx_eth.c __raw_writel(cmd >> 8, &mdio_regs->mdio_command[1]); __raw_writel 452 drivers/net/ethernet/xscale/ixp4xx_eth.c __raw_writel(((phy_id << 5) | location) & 0xFF, __raw_writel 454 drivers/net/ethernet/xscale/ixp4xx_eth.c __raw_writel((phy_id >> 3) | (write << 2) | 0x80 /* GO */, __raw_writel 528 drivers/net/ethernet/xscale/ixp4xx_eth.c __raw_writel(DEFAULT_CORE_CNTRL, &mdio_regs->core_control); __raw_writel 567 drivers/net/ethernet/xscale/ixp4xx_eth.c __raw_writel(DEFAULT_TX_CNTRL0 & ~TX_CNTRL0_HALFDUPLEX, __raw_writel 570 drivers/net/ethernet/xscale/ixp4xx_eth.c __raw_writel(DEFAULT_TX_CNTRL0 | TX_CNTRL0_HALFDUPLEX, __raw_writel 927 drivers/net/ethernet/xscale/ixp4xx_eth.c __raw_writel(allmulti[i], &port->regs->mcast_addr[i]); __raw_writel 928 drivers/net/ethernet/xscale/ixp4xx_eth.c __raw_writel(allmulti[i], &port->regs->mcast_mask[i]); __raw_writel 930 drivers/net/ethernet/xscale/ixp4xx_eth.c __raw_writel(DEFAULT_RX_CNTRL0 | RX_CNTRL0_ADDR_FLTR_EN, __raw_writel 936 drivers/net/ethernet/xscale/ixp4xx_eth.c __raw_writel(DEFAULT_RX_CNTRL0 & ~RX_CNTRL0_ADDR_FLTR_EN, __raw_writel 952 drivers/net/ethernet/xscale/ixp4xx_eth.c __raw_writel(addr[i], &port->regs->mcast_addr[i]); __raw_writel 953 drivers/net/ethernet/xscale/ixp4xx_eth.c __raw_writel(~diffs[i], &port->regs->mcast_mask[i]); __raw_writel 956 drivers/net/ethernet/xscale/ixp4xx_eth.c __raw_writel(DEFAULT_RX_CNTRL0 | RX_CNTRL0_ADDR_FLTR_EN, __raw_writel 1229 drivers/net/ethernet/xscale/ixp4xx_eth.c __raw_writel(dev->dev_addr[i], &port->regs->hw_addr[i]); __raw_writel 1230 drivers/net/ethernet/xscale/ixp4xx_eth.c __raw_writel(0x08, &port->regs->random_seed); __raw_writel 1231 drivers/net/ethernet/xscale/ixp4xx_eth.c __raw_writel(0x12, &port->regs->partial_empty_threshold); __raw_writel 1232 drivers/net/ethernet/xscale/ixp4xx_eth.c __raw_writel(0x30, &port->regs->partial_full_threshold); __raw_writel 1233 drivers/net/ethernet/xscale/ixp4xx_eth.c __raw_writel(0x08, &port->regs->tx_start_bytes); __raw_writel 1234 drivers/net/ethernet/xscale/ixp4xx_eth.c __raw_writel(0x15, &port->regs->tx_deferral); __raw_writel 1235 drivers/net/ethernet/xscale/ixp4xx_eth.c __raw_writel(0x08, &port->regs->tx_2part_deferral[0]); __raw_writel 1236 drivers/net/ethernet/xscale/ixp4xx_eth.c __raw_writel(0x07, &port->regs->tx_2part_deferral[1]); __raw_writel 1237 drivers/net/ethernet/xscale/ixp4xx_eth.c __raw_writel(0x80, &port->regs->slot_time); __raw_writel 1238 drivers/net/ethernet/xscale/ixp4xx_eth.c __raw_writel(0x01, &port->regs->int_clock_threshold); __raw_writel 1249 drivers/net/ethernet/xscale/ixp4xx_eth.c __raw_writel(TX_CNTRL1_RETRIES, &port->regs->tx_control[1]); __raw_writel 1250 drivers/net/ethernet/xscale/ixp4xx_eth.c __raw_writel(DEFAULT_TX_CNTRL0, &port->regs->tx_control[0]); __raw_writel 1251 drivers/net/ethernet/xscale/ixp4xx_eth.c __raw_writel(0, &port->regs->rx_control[1]); __raw_writel 1252 drivers/net/ethernet/xscale/ixp4xx_eth.c __raw_writel(DEFAULT_RX_CNTRL0, &port->regs->rx_control[0]); __raw_writel 1454 drivers/net/ethernet/xscale/ixp4xx_eth.c __raw_writel(DEFAULT_CORE_CNTRL | CORE_RESET, __raw_writel 1457 drivers/net/ethernet/xscale/ixp4xx_eth.c __raw_writel(DEFAULT_CORE_CNTRL, &port->regs->core_control); __raw_writel 64 drivers/net/phy/mdio-bcm-unimac.c __raw_writel(val, priv->base + offset); __raw_writel 36 drivers/net/wireless/ath/wil6210/fw.c __raw_writel(val, d++); __raw_writel 176 drivers/net/wireless/ath/wil6210/main.c __raw_writel(*s++, d++); __raw_writel 183 drivers/net/wireless/ath/wil6210/main.c __raw_writel(tmp, d); __raw_writel 87 drivers/net/wireless/intersil/p54/p54pci.h #define P54P_WRITE(r, val) __raw_writel((__force u32)(__le32)(val), &priv->map->r) __raw_writel 123 drivers/net/wireless/intersil/prism54/islpci_dev.c __raw_writel(*fw_ptr, dev_fw_ptr); __raw_writel 100 drivers/parisc/ccio-dma.c #define WRITE_U32(value, addr) __raw_writel(value, addr) __raw_writel 1462 drivers/parisc/ccio-dma.c __raw_writel(((parent->start)>>16) | 0xffff0000, __raw_writel 1464 drivers/parisc/ccio-dma.c __raw_writel(((parent->end)>>16) | 0xffff0000, __raw_writel 1468 drivers/parisc/ccio-dma.c __raw_writel(((parent->start)>>16) | 0xffff0000, __raw_writel 1470 drivers/parisc/ccio-dma.c __raw_writel(((parent->end)>>16) | 0xffff0000, __raw_writel 195 drivers/parisc/dino.c __raw_writel(v, base_addr + DINO_PCI_ADDR); __raw_writel 230 drivers/parisc/dino.c __raw_writel(v & 0xffffff00, base_addr + DINO_PCI_ADDR); __raw_writel 234 drivers/parisc/dino.c __raw_writel(v, base_addr + DINO_PCI_ADDR); __raw_writel 270 drivers/parisc/dino.c __raw_writel((u32) addr, d->base_addr + DINO_PCI_ADDR); \ __raw_writel 287 drivers/parisc/dino.c __raw_writel((u32) addr, d->base_addr + DINO_PCI_ADDR); \ __raw_writel 315 drivers/parisc/dino.c __raw_writel(dino_dev->imr, dino_dev->hba.base_addr+DINO_IMR); __raw_writel 336 drivers/parisc/dino.c __raw_writel( dino_dev->imr, dino_dev->hba.base_addr+DINO_IMR); __raw_writel 523 drivers/parisc/dino.c __raw_writel(1 << i, base_addr + DINO_IO_ADDR_EN); __raw_writel 684 drivers/parisc/dino.c __raw_writel(0x00000005, __raw_writel 689 drivers/parisc/dino.c __raw_writel(0x00000000, dino_dev->hba.base_addr+DINO_GMASK); __raw_writel 690 drivers/parisc/dino.c __raw_writel(0x00000001, dino_dev->hba.base_addr+DINO_IO_FBB_EN); __raw_writel 691 drivers/parisc/dino.c __raw_writel(0x00000000, dino_dev->hba.base_addr+DINO_ICR); __raw_writel 701 drivers/parisc/dino.c __raw_writel( brdg_feat, dino_dev->hba.base_addr+DINO_BRDG_FEAT); __raw_writel 708 drivers/parisc/dino.c __raw_writel(0x00000000, dino_dev->hba.base_addr+DINO_IO_ADDR_EN); __raw_writel 710 drivers/parisc/dino.c __raw_writel(0x00000000, dino_dev->hba.base_addr+DINO_DAMODE); __raw_writel 711 drivers/parisc/dino.c __raw_writel(0x00222222, dino_dev->hba.base_addr+DINO_PCIROR); __raw_writel 712 drivers/parisc/dino.c __raw_writel(0x00222222, dino_dev->hba.base_addr+DINO_PCIWOR); __raw_writel 714 drivers/parisc/dino.c __raw_writel(0x00000040, dino_dev->hba.base_addr+DINO_MLTIM); __raw_writel 715 drivers/parisc/dino.c __raw_writel(0x00000080, dino_dev->hba.base_addr+DINO_IO_CONTROL); __raw_writel 716 drivers/parisc/dino.c __raw_writel(0x0000008c, dino_dev->hba.base_addr+DINO_TLTIM); __raw_writel 719 drivers/parisc/dino.c __raw_writel(0x0000007e, dino_dev->hba.base_addr+DINO_PAMR); __raw_writel 720 drivers/parisc/dino.c __raw_writel(0x0000007f, dino_dev->hba.base_addr+DINO_PAPR); __raw_writel 721 drivers/parisc/dino.c __raw_writel(0x00000000, dino_dev->hba.base_addr+DINO_PAMR); __raw_writel 728 drivers/parisc/dino.c __raw_writel(0x0000004f, dino_dev->hba.base_addr+DINO_PCICMD); __raw_writel 856 drivers/parisc/dino.c __raw_writel(eim, dino_dev->hba.base_addr+DINO_IAR0); __raw_writel 207 drivers/parisc/iosapic.c __raw_writel(data, addr); __raw_writel 133 drivers/parisc/lba_pci.c #define WRITE_U32(value, addr) __raw_writel(value, addr) __raw_writel 127 drivers/pcmcia/pxa2xx_base.c __raw_writel(val, MCMEM(sock)); __raw_writel 143 drivers/pcmcia/pxa2xx_base.c __raw_writel(val, MCIO(sock)); __raw_writel 159 drivers/pcmcia/pxa2xx_base.c __raw_writel(val, MCATT(sock)); __raw_writel 229 drivers/pcmcia/pxa2xx_base.c __raw_writel(mecr, MECR); __raw_writel 296 drivers/phy/ti/phy-ti-pipe3.c __raw_writel(data, addr + offset); __raw_writel 51 drivers/pinctrl/samsung/pinctrl-exynos-arm.c __raw_writel(tmp, clk_base + S5P_OTHERS); __raw_writel 41 drivers/power/avs/smartreflex.c __raw_writel(value, (sr->base + offset)); __raw_writel 70 drivers/power/avs/smartreflex.c __raw_writel(reg_val, (sr->base + offset)); __raw_writel 64 drivers/ptp/ptp_ixp46x.c __raw_writel(lo, ®s->systime_lo); __raw_writel 65 drivers/ptp/ptp_ixp46x.c __raw_writel(hi, ®s->systime_hi); __raw_writel 113 drivers/ptp/ptp_ixp46x.c __raw_writel(ack, ®s->event); __raw_writel 142 drivers/ptp/ptp_ixp46x.c __raw_writel(addend, ®s->addend); __raw_writel 301 drivers/ptp/ptp_ixp46x.c __raw_writel(DEFAULT_ADDEND, &ixp_clock.regs->addend); __raw_writel 302 drivers/ptp/ptp_ixp46x.c __raw_writel(1, &ixp_clock.regs->trgt_lo); __raw_writel 303 drivers/ptp/ptp_ixp46x.c __raw_writel(0, &ixp_clock.regs->trgt_hi); __raw_writel 304 drivers/ptp/ptp_ixp46x.c __raw_writel(TTIPEND, &ixp_clock.regs->event); __raw_writel 122 drivers/pwm/pwm-atmel-tcb.c __raw_writel(cmr, regs + ATMEL_TC_REG(group, CMR)); __raw_writel 181 drivers/pwm/pwm-atmel-tcb.c __raw_writel(cmr, regs + ATMEL_TC_REG(group, CMR)); __raw_writel 188 drivers/pwm/pwm-atmel-tcb.c __raw_writel(ATMEL_TC_SWTRG | ATMEL_TC_CLKDIS, __raw_writel 192 drivers/pwm/pwm-atmel-tcb.c __raw_writel(ATMEL_TC_SWTRG, regs + __raw_writel 266 drivers/pwm/pwm-atmel-tcb.c __raw_writel(cmr, regs + ATMEL_TC_REG(group, CMR)); __raw_writel 269 drivers/pwm/pwm-atmel-tcb.c __raw_writel(tcbpwm->duty, regs + ATMEL_TC_REG(group, RA)); __raw_writel 271 drivers/pwm/pwm-atmel-tcb.c __raw_writel(tcbpwm->duty, regs + ATMEL_TC_REG(group, RB)); __raw_writel 273 drivers/pwm/pwm-atmel-tcb.c __raw_writel(tcbpwm->period, regs + ATMEL_TC_REG(group, RC)); __raw_writel 276 drivers/pwm/pwm-atmel-tcb.c __raw_writel(ATMEL_TC_CLKEN | ATMEL_TC_SWTRG, __raw_writel 74 drivers/pwm/pwm-brcmstb.c __raw_writel(value, p->base + offset); __raw_writel 32 drivers/rtc/rtc-ds1286.c __raw_writel(data, &priv->rtcregs[reg]); __raw_writel 45 drivers/rtc/rtc-lpc32xx.c __raw_writel((val), (dev)->rtc_base + (reg)) __raw_writel 88 drivers/rtc/rtc-msm6242.c __raw_writel(val, &priv->regs[reg]); __raw_writel 125 drivers/rtc/rtc-pl030.c __raw_writel(0, rtc->base + RTC_CR); __raw_writel 126 drivers/rtc/rtc-pl030.c __raw_writel(0, rtc->base + RTC_EOI); __raw_writel 74 drivers/rtc/rtc-pxa.c __raw_writel((value), (pxa_rtc)->base + (reg)) __raw_writel 79 drivers/rtc/rtc-rp5c01.c __raw_writel(val, &priv->regs[reg]); __raw_writel 49 drivers/rtc/rtc-tx4939.c __raw_writel(cmd, &rtcreg->ctl); __raw_writel 75 drivers/rtc/rtc-tx4939.c __raw_writel(0, &rtcreg->adr); __raw_writel 77 drivers/rtc/rtc-tx4939.c __raw_writel(buf[i], &rtcreg->dat); __raw_writel 101 drivers/rtc/rtc-tx4939.c __raw_writel(2, &rtcreg->adr); __raw_writel 127 drivers/rtc/rtc-tx4939.c __raw_writel(0, &rtcreg->adr); __raw_writel 129 drivers/rtc/rtc-tx4939.c __raw_writel(buf[i], &rtcreg->dat); __raw_writel 153 drivers/rtc/rtc-tx4939.c __raw_writel(2, &rtcreg->adr); __raw_writel 212 drivers/rtc/rtc-tx4939.c __raw_writel(pos++, &rtcreg->adr); __raw_writel 228 drivers/rtc/rtc-tx4939.c __raw_writel(pos++, &rtcreg->adr); __raw_writel 229 drivers/rtc/rtc-tx4939.c __raw_writel(*buf++, &rtcreg->dat); __raw_writel 177 drivers/scsi/lpfc/lpfc_sli.c __raw_writel(*((uint32_t *)(tmp + i)), __raw_writel 3669 drivers/scsi/mpt3sas/mpt3sas_base.c __raw_writel((u32)(b), addr); __raw_writel 3670 drivers/scsi/mpt3sas/mpt3sas_base.c __raw_writel((u32)(b >> 32), (addr + 4)); __raw_writel 276 drivers/scsi/ncr53c8xx.h #define writel_b2l __raw_writel __raw_writel 280 drivers/scsi/ncr53c8xx.h #define writel_raw __raw_writel __raw_writel 98 drivers/scsi/zalon.c __raw_writel(CMD_RESET, zalon + IO_MODULE_IO_COMMAND); __raw_writel 101 drivers/scsi/zalon.c __raw_writel(IOIIDATA_MINT5EN | IOIIDATA_PACKEN | IOIIDATA_PREFETCHEN, __raw_writel 115 drivers/scsi/zalon.c __raw_writel(gsc_irq.txn_addr | gsc_irq.txn_data, zalon + IO_MODULE_EIM); __raw_writel 430 drivers/sh/clk/cpg.c __raw_writel(0, clk->mapping->base); __raw_writel 441 drivers/sh/clk/cpg.c __raw_writel((value << 16) | 0x3, clk->mapping->base); __raw_writel 452 drivers/sh/clk/cpg.c __raw_writel(0, clk->mapping->base); __raw_writel 454 drivers/sh/clk/cpg.c __raw_writel(idx << 16, clk->mapping->base); __raw_writel 118 drivers/sh/intc/access.c __raw_writel(intc_set_field_from_handle(0, data, h), ptr); __raw_writel 159 drivers/sh/intc/access.c __raw_writel(value, ptr); __raw_writel 108 drivers/sh/intc/chip.c __raw_writel(0xffffffff ^ value, addr); __raw_writel 53 drivers/sh/intc/userimask.c __raw_writel(0xa5 << 24 | level << 4, uimask); __raw_writel 98 drivers/sh/maple/maple.c __raw_writel(MAPLE_MAGIC, MAPLE_RESET); __raw_writel 100 drivers/sh/maple/maple.c __raw_writel(1, MAPLE_TRIGTYPE); __raw_writel 109 drivers/sh/maple/maple.c __raw_writel(MAPLE_2MBPS | MAPLE_TIMEOUT(0xFFFF), MAPLE_SPEED); __raw_writel 110 drivers/sh/maple/maple.c __raw_writel(virt_to_phys(maple_sendbuf), MAPLE_DMAADDR); __raw_writel 111 drivers/sh/maple/maple.c __raw_writel(1, MAPLE_ENABLE); __raw_writel 279 drivers/sh/maple/maple.c __raw_writel(0, MAPLE_ENABLE); __raw_writel 454 drivers/sh/maple/maple.c __raw_writel(0, MAPLE_ENABLE); __raw_writel 640 drivers/sh/maple/maple.c __raw_writel(0, MAPLE_ENABLE); __raw_writel 800 drivers/sh/maple/maple.c __raw_writel(0, MAPLE_ENABLE); __raw_writel 81 drivers/soc/bcm/brcmstb/pm/pm-mips.c __raw_writel(val, base + (idx << 2)) __raw_writel 140 drivers/soc/bcm/brcmstb/pm/pm-mips.c __raw_writel(tmp, base + AON_CTRL_HOST_MISC_CMDS); __raw_writel 143 drivers/soc/bcm/brcmstb/pm/pm-mips.c __raw_writel(0, base + AON_CTRL_PM_INITIATE); __raw_writel 145 drivers/soc/bcm/brcmstb/pm/pm-mips.c __raw_writel(BSP_CLOCK_STOP | PM_INITIATE, __raw_writel 164 drivers/soc/bcm/brcmstb/pm/pm-mips.c __raw_writel(0x10, base + AON_CTRL_PM_CPU_WAIT_COUNT); __raw_writel 168 drivers/soc/bcm/brcmstb/pm/pm-mips.c __raw_writel(PM_COLD_CONFIG, base + AON_CTRL_PM_CTRL); __raw_writel 171 drivers/soc/bcm/brcmstb/pm/pm-mips.c __raw_writel((PM_COLD_CONFIG | PM_PWR_DOWN), base + __raw_writel 196 drivers/soc/bcm/brcmstb/pm/pm-mips.c __raw_writel(tmp, ctrl.aon_ctrl_base + AON_CTRL_RESET_CTRL); __raw_writel 206 drivers/soc/bcm/brcmstb/pm/pm-mips.c __raw_writel(tmp, ctrl.memcs[i].ddr_phy_base + __raw_writel 209 drivers/soc/bcm/brcmstb/pm/pm-mips.c __raw_writel(tmp, ctrl.memcs[i].ddr_phy_base + __raw_writel 237 drivers/soc/bcm/brcmstb/pm/pm-mips.c __raw_writel(s3_context.memc0_rts[i], memc_arb_base); __raw_writel 169 drivers/soc/ixp4xx/ixp4xx-npe.c __raw_writel(data, &npe->regs->exec_data); __raw_writel 170 drivers/soc/ixp4xx/ixp4xx-npe.c __raw_writel(addr, &npe->regs->exec_addr); __raw_writel 171 drivers/soc/ixp4xx/ixp4xx-npe.c __raw_writel(cmd, &npe->regs->exec_status_cmd); __raw_writel 176 drivers/soc/ixp4xx/ixp4xx-npe.c __raw_writel(addr, &npe->regs->exec_addr); __raw_writel 177 drivers/soc/ixp4xx/ixp4xx-npe.c __raw_writel(cmd, &npe->regs->exec_status_cmd); __raw_writel 199 drivers/soc/ixp4xx/ixp4xx-npe.c __raw_writel(CMD_NPE_CLR_PIPE, &npe->regs->exec_status_cmd); __raw_writel 200 drivers/soc/ixp4xx/ixp4xx-npe.c __raw_writel(CMD_NPE_START, &npe->regs->exec_status_cmd); __raw_writel 205 drivers/soc/ixp4xx/ixp4xx-npe.c __raw_writel(CMD_NPE_STOP, &npe->regs->exec_status_cmd); __raw_writel 206 drivers/soc/ixp4xx/ixp4xx-npe.c __raw_writel(CMD_NPE_CLR_PIPE, &npe->regs->exec_status_cmd); /*FIXME?*/ __raw_writel 229 drivers/soc/ixp4xx/ixp4xx-npe.c __raw_writel(CMD_NPE_CLR_PIPE, &npe->regs->exec_status_cmd); __raw_writel 239 drivers/soc/ixp4xx/ixp4xx-npe.c __raw_writel(CMD_NPE_STEP, &npe->regs->exec_status_cmd); __raw_writel 292 drivers/soc/ixp4xx/ixp4xx-npe.c __raw_writel(ctl & 0x3F00FFFF, &npe->regs->messaging_control); __raw_writel 297 drivers/soc/ixp4xx/ixp4xx-npe.c __raw_writel(0, &npe->regs->exec_count); __raw_writel 319 drivers/soc/ixp4xx/ixp4xx-npe.c __raw_writel(RESET_MBOX_STAT, &npe->regs->mailbox_status); __raw_writel 361 drivers/soc/ixp4xx/ixp4xx-npe.c __raw_writel(CMD_NPE_CLR_PIPE, &npe->regs->exec_status_cmd); __raw_writel 363 drivers/soc/ixp4xx/ixp4xx-npe.c __raw_writel(exec_count, &npe->regs->exec_count); __raw_writel 372 drivers/soc/ixp4xx/ixp4xx-npe.c __raw_writel(CMD_CLR_PROFILE_CNT, &npe->regs->exec_status_cmd); __raw_writel 374 drivers/soc/ixp4xx/ixp4xx-npe.c __raw_writel(0, &npe->regs->exec_count); __raw_writel 375 drivers/soc/ixp4xx/ixp4xx-npe.c __raw_writel(0, &npe->regs->action_points[0]); __raw_writel 376 drivers/soc/ixp4xx/ixp4xx-npe.c __raw_writel(0, &npe->regs->action_points[1]); __raw_writel 377 drivers/soc/ixp4xx/ixp4xx-npe.c __raw_writel(0, &npe->regs->action_points[2]); __raw_writel 378 drivers/soc/ixp4xx/ixp4xx-npe.c __raw_writel(0, &npe->regs->action_points[3]); __raw_writel 379 drivers/soc/ixp4xx/ixp4xx-npe.c __raw_writel(0, &npe->regs->watch_count); __raw_writel 400 drivers/soc/ixp4xx/ixp4xx-npe.c __raw_writel(ctl, &npe->regs->messaging_control); __raw_writel 418 drivers/soc/ixp4xx/ixp4xx-npe.c __raw_writel(send[0], &npe->regs->in_out_fifo); __raw_writel 425 drivers/soc/ixp4xx/ixp4xx-npe.c __raw_writel(send[1], &npe->regs->in_out_fifo); __raw_writel 36 drivers/soc/ixp4xx/ixp4xx-qmgr.c __raw_writel(val, &qmgr_regs->acc[queue][0]); __raw_writel 128 drivers/soc/ixp4xx/ixp4xx-qmgr.c __raw_writel((__raw_readl(reg) & ~(7 << bit)) | (src << bit), __raw_writel 146 drivers/soc/ixp4xx/ixp4xx-qmgr.c __raw_writel(0xFFFFFFFF, &qmgr_regs->irqstat[0]); __raw_writel 171 drivers/soc/ixp4xx/ixp4xx-qmgr.c __raw_writel(0xFFFFFFFF, &qmgr_regs->irqstat[1]); __raw_writel 191 drivers/soc/ixp4xx/ixp4xx-qmgr.c __raw_writel(req_bitmap, &qmgr_regs->irqstat[half]); /* ACK */ __raw_writel 210 drivers/soc/ixp4xx/ixp4xx-qmgr.c __raw_writel(__raw_readl(&qmgr_regs->irqen[half]) | mask, __raw_writel 222 drivers/soc/ixp4xx/ixp4xx-qmgr.c __raw_writel(__raw_readl(&qmgr_regs->irqen[half]) & ~mask, __raw_writel 224 drivers/soc/ixp4xx/ixp4xx-qmgr.c __raw_writel(mask, &qmgr_regs->irqstat[half]); /* clear */ __raw_writel 311 drivers/soc/ixp4xx/ixp4xx-qmgr.c __raw_writel(cfg | (addr << 14), &qmgr_regs->sram[queue]); __raw_writel 361 drivers/soc/ixp4xx/ixp4xx-qmgr.c __raw_writel(0, &qmgr_regs->sram[queue]); __raw_writel 399 drivers/soc/ixp4xx/ixp4xx-qmgr.c __raw_writel(0x33333333, &qmgr_regs->stat1[i]); __raw_writel 400 drivers/soc/ixp4xx/ixp4xx-qmgr.c __raw_writel(0, &qmgr_regs->irqsrc[i]); __raw_writel 403 drivers/soc/ixp4xx/ixp4xx-qmgr.c __raw_writel(0, &qmgr_regs->stat2[i]); __raw_writel 404 drivers/soc/ixp4xx/ixp4xx-qmgr.c __raw_writel(0xFFFFFFFF, &qmgr_regs->irqstat[i]); /* clear */ __raw_writel 405 drivers/soc/ixp4xx/ixp4xx-qmgr.c __raw_writel(0, &qmgr_regs->irqen[i]); __raw_writel 408 drivers/soc/ixp4xx/ixp4xx-qmgr.c __raw_writel(0xFFFFFFFF, &qmgr_regs->statne_h); __raw_writel 409 drivers/soc/ixp4xx/ixp4xx-qmgr.c __raw_writel(0, &qmgr_regs->statf_h); __raw_writel 412 drivers/soc/ixp4xx/ixp4xx-qmgr.c __raw_writel(0, &qmgr_regs->sram[i]); __raw_writel 62 drivers/soc/renesas/rmobile-sysc.c __raw_writel(mask, rmobile_pd->base + SPDCR); __raw_writel 86 drivers/soc/renesas/rmobile-sysc.c __raw_writel(mask, rmobile_pd->base + SWUCR); __raw_writel 229 drivers/spi/spi-atmel.c __raw_writel((value), (port)->regs + SPI_##reg) __raw_writel 124 drivers/spi/spi-bcm63xx-hsspi.c __raw_writel(reg, bs->regs + HSSPI_GLOBAL_CTRL_REG); __raw_writel 135 drivers/spi/spi-bcm63xx-hsspi.c __raw_writel(CLK_CTRL_ACCUM_RST_ON_LOOP | reg, __raw_writel 143 drivers/spi/spi-bcm63xx-hsspi.c __raw_writel(reg, bs->regs + HSSPI_PROFILE_SIGNAL_CTRL_REG(profile)); __raw_writel 151 drivers/spi/spi-bcm63xx-hsspi.c __raw_writel(reg, bs->regs + HSSPI_GLOBAL_CTRL_REG); __raw_writel 182 drivers/spi/spi-bcm63xx-hsspi.c __raw_writel(1 << MODE_CTRL_MULTIDATA_WR_SIZE_SHIFT | __raw_writel 198 drivers/spi/spi-bcm63xx-hsspi.c __raw_writel(HSSPI_PINGx_CMD_DONE(0), __raw_writel 202 drivers/spi/spi-bcm63xx-hsspi.c __raw_writel(!chip_select << PINGPONG_CMD_SS_SHIFT | __raw_writel 235 drivers/spi/spi-bcm63xx-hsspi.c __raw_writel(reg, bs->regs + __raw_writel 247 drivers/spi/spi-bcm63xx-hsspi.c __raw_writel(reg, bs->regs + HSSPI_GLOBAL_CTRL_REG); __raw_writel 305 drivers/spi/spi-bcm63xx-hsspi.c __raw_writel(reg, bs->regs + HSSPI_GLOBAL_CTRL_REG); __raw_writel 321 drivers/spi/spi-bcm63xx-hsspi.c __raw_writel(HSSPI_INT_CLEAR_ALL, bs->regs + HSSPI_INT_STATUS_REG); __raw_writel 322 drivers/spi/spi-bcm63xx-hsspi.c __raw_writel(0, bs->regs + HSSPI_INT_MASK_REG); __raw_writel 414 drivers/spi/spi-bcm63xx-hsspi.c __raw_writel(0, bs->regs + HSSPI_INT_MASK_REG); __raw_writel 417 drivers/spi/spi-bcm63xx-hsspi.c __raw_writel(HSSPI_INT_CLEAR_ALL, bs->regs + HSSPI_INT_STATUS_REG); __raw_writel 422 drivers/spi/spi-bcm63xx-hsspi.c __raw_writel(reg | GLOBAL_CTRL_CLK_GATE_SSOFF, __raw_writel 454 drivers/spi/spi-bcm63xx-hsspi.c __raw_writel(0, bs->regs + HSSPI_INT_MASK_REG); __raw_writel 161 drivers/spi/spi-dw.h __raw_writel(val, dws->regs + offset); __raw_writel 197 drivers/spi/spi-lantiq-ssc.c __raw_writel(val, spi->regbase + reg); __raw_writel 207 drivers/spi/spi-lantiq-ssc.c __raw_writel(val, spi->regbase + reg); __raw_writel 99 drivers/spi/spi-pxa2xx.h __raw_writel(val, drv_data->ioaddr + reg); __raw_writel 32 drivers/spi/spi-rb4xx.c __raw_writel(value, rbspi->base + reg); __raw_writel 92 drivers/spi/spi-txx9.c __raw_writel(val, c->membase + reg); __raw_writel 34 drivers/spi/spi-xtensa-xtfpga.c __raw_writel(val, spi->regs + addr); __raw_writel 239 drivers/spmi/spmi-pmic-arb.c __raw_writel(data, pmic_arb->wr_base + reg); __raw_writel 150 drivers/ssb/host_soc.c __raw_writel((__force u32)(*buf), addr); __raw_writel 72 drivers/staging/emxx_udc/emxx_udc.c __raw_writel(udata, address); __raw_writel 81 drivers/staging/emxx_udc/emxx_udc.c __raw_writel(reg_dt, address); __raw_writel 90 drivers/staging/emxx_udc/emxx_udc.c __raw_writel(reg_dt, address); __raw_writel 37 drivers/staging/netlogic/xlr_net.c __raw_writel(val, base + reg); __raw_writel 179 drivers/thermal/broadcom/brcmstb_thermal.c __raw_writel(val, priv->tmon_base + trip->enable_offs); __raw_writel 213 drivers/thermal/broadcom/brcmstb_thermal.c __raw_writel(orig, priv->tmon_base + trip->reg_offs); __raw_writel 441 drivers/tty/goldfish.c __raw_writel(ch, port->membase); __raw_writel 174 drivers/tty/mips_ejtag_fdc.c __raw_writel(data, priv->reg + offs); __raw_writel 349 drivers/tty/mips_ejtag_fdc.c __raw_writel(word.word, regs + REG_FDTX(c->index)); __raw_writel 1238 drivers/tty/mips_ejtag_fdc.c __raw_writel(word.word, __raw_writel 369 drivers/tty/serial/8250/8250_port.c __raw_writel(value, p->membase + (offset << p->regshift)); __raw_writel 380 drivers/tty/serial/8250/8250_port.c __raw_writel(value, up->port.membase + 0x28); __raw_writel 54 drivers/tty/serial/apbuart.h #define UART_PUT_CHAR(port, v) (__raw_writel(v, APBBASE_DATA_P(port))) __raw_writel 56 drivers/tty/serial/apbuart.h #define UART_PUT_STATUS(port, v)(__raw_writel(v, APBBASE_STATUS_P(port))) __raw_writel 58 drivers/tty/serial/apbuart.h #define UART_PUT_CTRL(port, v) (__raw_writel(v, APBBASE_CTRL_P(port))) __raw_writel 60 drivers/tty/serial/apbuart.h #define UART_PUT_SCAL(port, v) (__raw_writel(v, APBBASE_SCALAR_P(port))) __raw_writel 223 drivers/tty/serial/atmel_serial.c __raw_writel(value, port->membase + reg); __raw_writel 86 drivers/tty/serial/bcm63xx_uart.c __raw_writel(value, port->membase + offset); __raw_writel 129 drivers/tty/serial/lantiq.c __raw_writel((tmp & ~clear) | set, reg); __raw_writel 159 drivers/tty/serial/lantiq.c __raw_writel(ASCWHBSTATE_CLRREN, port->membase + LTQ_ASC_WHBSTATE); __raw_writel 263 drivers/tty/serial/lantiq.c __raw_writel(ASC_IRNCR_TIR, port->membase + LTQ_ASC_IRNCR); __raw_writel 292 drivers/tty/serial/lantiq.c __raw_writel(ASC_IRNCR_RIR, port->membase + LTQ_ASC_IRNCR); __raw_writel 363 drivers/tty/serial/lantiq.c __raw_writel(0, port->membase + LTQ_ASC_PISEL); __raw_writel 364 drivers/tty/serial/lantiq.c __raw_writel( __raw_writel 368 drivers/tty/serial/lantiq.c __raw_writel( __raw_writel 385 drivers/tty/serial/lantiq.c __raw_writel(ASC_IRNREN_RX | ASC_IRNREN_ERR | ASC_IRNREN_TX, __raw_writel 399 drivers/tty/serial/lantiq.c __raw_writel(0, port->membase + LTQ_ASC_CON); __raw_writel 493 drivers/tty/serial/lantiq.c __raw_writel(divisor, port->membase + LTQ_ASC_BG); __raw_writel 499 drivers/tty/serial/lantiq.c __raw_writel(ASCWHBSTATE_SETREN, port->membase + LTQ_ASC_WHBSTATE); __raw_writel 67 drivers/tty/serial/mux.c #define UART_PUT_CHAR(p, c) __raw_writel((c), (p)->membase + IO_DATA_REG_OFFSET) __raw_writel 79 drivers/tty/serial/pic32_uart.h __raw_writel(val, port->membase + reg); __raw_writel 72 drivers/tty/serial/pnx8xxx_uart.c __raw_writel(value, sport->port.membase + offset); __raw_writel 57 drivers/tty/serial/sa1100.c #define UART_PUT_UTCR0(sport,v) __raw_writel((v),(sport)->port.membase + UTCR0) __raw_writel 58 drivers/tty/serial/sa1100.c #define UART_PUT_UTCR1(sport,v) __raw_writel((v),(sport)->port.membase + UTCR1) __raw_writel 59 drivers/tty/serial/sa1100.c #define UART_PUT_UTCR2(sport,v) __raw_writel((v),(sport)->port.membase + UTCR2) __raw_writel 60 drivers/tty/serial/sa1100.c #define UART_PUT_UTCR3(sport,v) __raw_writel((v),(sport)->port.membase + UTCR3) __raw_writel 61 drivers/tty/serial/sa1100.c #define UART_PUT_UTSR0(sport,v) __raw_writel((v),(sport)->port.membase + UTSR0) __raw_writel 62 drivers/tty/serial/sa1100.c #define UART_PUT_UTSR1(sport,v) __raw_writel((v),(sport)->port.membase + UTSR1) __raw_writel 63 drivers/tty/serial/sa1100.c #define UART_PUT_CHAR(sport,v) __raw_writel((v),(sport)->port.membase + UTDR) __raw_writel 185 drivers/tty/serial/serial_txx9.c __raw_writel(value, up->port.membase + offset); __raw_writel 441 drivers/tty/serial/sirfsoc_uart.h #define wr_regl(port, reg, val) __raw_writel(val, portaddr(port, reg)) __raw_writel 92 drivers/usb/gadget/udc/at91_udc.c __raw_writel((val), (udc)->udp_baseaddr + (reg)) __raw_writel 352 drivers/usb/gadget/udc/at91_udc.c __raw_writel(csr, creg); __raw_writel 409 drivers/usb/gadget/udc/at91_udc.c __raw_writel(csr, creg); __raw_writel 443 drivers/usb/gadget/udc/at91_udc.c __raw_writel(csr, creg); __raw_writel 534 drivers/usb/gadget/udc/at91_udc.c __raw_writel(tmp, ep->creg); __raw_writel 570 drivers/usb/gadget/udc/at91_udc.c __raw_writel(0, ep->creg); __raw_writel 677 drivers/usb/gadget/udc/at91_udc.c __raw_writel(tmp, ep->creg); __raw_writel 769 drivers/usb/gadget/udc/at91_udc.c __raw_writel(csr, creg); __raw_writel 1019 drivers/usb/gadget/udc/at91_udc.c __raw_writel(csr, creg); __raw_writel 1031 drivers/usb/gadget/udc/at91_udc.c __raw_writel(csr, creg); __raw_writel 1073 drivers/usb/gadget/udc/at91_udc.c __raw_writel(csr, creg); __raw_writel 1100 drivers/usb/gadget/udc/at91_udc.c __raw_writel(csr | AT91_UDP_TXPKTRDY, creg); __raw_writel 1211 drivers/usb/gadget/udc/at91_udc.c __raw_writel(tmp, ep->creg); __raw_writel 1234 drivers/usb/gadget/udc/at91_udc.c __raw_writel(tmp, ep->creg); __raw_writel 1257 drivers/usb/gadget/udc/at91_udc.c __raw_writel(csr, creg); __raw_writel 1267 drivers/usb/gadget/udc/at91_udc.c __raw_writel(csr, creg); __raw_writel 1283 drivers/usb/gadget/udc/at91_udc.c __raw_writel(csr, creg); __raw_writel 1319 drivers/usb/gadget/udc/at91_udc.c __raw_writel(csr, creg); __raw_writel 1356 drivers/usb/gadget/udc/at91_udc.c __raw_writel(csr, creg); __raw_writel 1378 drivers/usb/gadget/udc/at91_udc.c __raw_writel(csr | AT91_UDP_FORCESTALL, creg); __raw_writel 1385 drivers/usb/gadget/udc/at91_udc.c __raw_writel(csr, creg); __raw_writel 247 drivers/usb/gadget/udc/fsl_udc_core.c __raw_writel(ctrl, &usb_sys_regs->control); __raw_writel 263 drivers/usb/gadget/udc/fsl_udc_core.c __raw_writel(ctrl, &usb_sys_regs->control); __raw_writel 331 drivers/usb/gadget/udc/fsl_udc_core.c __raw_writel(ctrl, &usb_sys_regs->control); __raw_writel 342 drivers/usb/gadget/udc/fsl_udc_core.c __raw_writel(tmp, &usb_sys_regs->snoop1); __raw_writel 344 drivers/usb/gadget/udc/fsl_udc_core.c __raw_writel(tmp, &usb_sys_regs->snoop2); __raw_writel 183 drivers/usb/gadget/udc/pxa27x_udc.h __raw_writel((value), ep->dev->regs + ofs_##reg(ep)) __raw_writel 191 drivers/usb/gadget/udc/pxa27x_udc.h __raw_writel((value), (udc)->regs + (reg)) __raw_writel 62 drivers/usb/host/ehci-omap.c __raw_writel(val, base + reg); __raw_writel 735 drivers/usb/host/ehci.h #define writel_be(val, addr) __raw_writel(val, (__force unsigned *)addr) __raw_writel 130 drivers/usb/host/ohci-nxp.c __raw_writel(tmp, usb_otg_stat_control); __raw_writel 146 drivers/usb/host/ohci-nxp.c __raw_writel(tmp, usb_otg_stat_control); __raw_writel 168 drivers/usb/host/ohci-pxa27x.c __raw_writel(uhcrhda, pxa_ohci->mmio_base + UHCRHDA); __raw_writel 169 drivers/usb/host/ohci-pxa27x.c __raw_writel(uhcrhdb, pxa_ohci->mmio_base + UHCRHDB); __raw_writel 257 drivers/usb/host/ohci-pxa27x.c __raw_writel(uhchr, pxa_ohci->mmio_base + UHCHR); __raw_writel 258 drivers/usb/host/ohci-pxa27x.c __raw_writel(uhcrhda, pxa_ohci->mmio_base + UHCRHDA); __raw_writel 265 drivers/usb/host/ohci-pxa27x.c __raw_writel(uhchr | UHCHR_FHR, pxa_ohci->mmio_base + UHCHR); __raw_writel 267 drivers/usb/host/ohci-pxa27x.c __raw_writel(uhchr & ~UHCHR_FHR, pxa_ohci->mmio_base + UHCHR); __raw_writel 292 drivers/usb/host/ohci-pxa27x.c __raw_writel(uhchr, pxa_ohci->mmio_base + UHCHR); __raw_writel 311 drivers/usb/host/ohci-pxa27x.c __raw_writel(uhchr, pxa_ohci->mmio_base + UHCHR); __raw_writel 312 drivers/usb/host/ohci-pxa27x.c __raw_writel(UHCHIE_UPRIE | UHCHIE_RWIE, pxa_ohci->mmio_base + UHCHIE); __raw_writel 337 drivers/usb/host/ohci-pxa27x.c __raw_writel(uhccoms, pxa_ohci->mmio_base + UHCCOMS); __raw_writel 250 drivers/usb/isp1760/isp1760-hcd.c __raw_writel(cpu_to_le32(*src), dst); __raw_writel 257 drivers/usb/isp1760/isp1760-hcd.c __raw_writel(*src, dst); __raw_writel 271 drivers/usb/isp1760/isp1760-hcd.c __raw_writel(cpu_to_le32(*src), dst); __raw_writel 273 drivers/usb/isp1760/isp1760-hcd.c __raw_writel(*src, dst); __raw_writel 58 drivers/usb/musb/davinci.c __raw_writel(phy_ctrl, USB_PHY_CTRL); __raw_writel 72 drivers/usb/musb/davinci.c __raw_writel(phy_ctrl, USB_PHY_CTRL); __raw_writel 388 drivers/usb/musb/davinci.c __raw_writel(phy_ctrl, USB_PHY_CTRL); __raw_writel 398 drivers/usb/musb/davinci.c __raw_writel(deepsleep, DM355_DEEPSLEEP); __raw_writel 437 drivers/usb/musb/davinci.c __raw_writel(deepsleep, DM355_DEEPSLEEP); __raw_writel 391 drivers/usb/musb/musb_core.c __raw_writel(data, addr + offset); __raw_writel 927 drivers/usb/phy/phy-fsl-usb.c __raw_writel(temp, &p_otg->dr_mem_map->control); __raw_writel 71 drivers/video/fbdev/atmel_lcdfb.c #define lcdc_writel(sinfo, reg, val) __raw_writel((val), (sinfo)->mmio+(reg)) __raw_writel 138 drivers/video/fbdev/da8xx-fb.c __raw_writel(val, da8xx_fb_reg_base + (addr)); __raw_writel 131 drivers/video/fbdev/ep93xx-fb.c __raw_writel(val, fbi->mmio_base + off); __raw_writel 150 drivers/video/fbdev/grvga.c __raw_writel(((info->var.yres - 1) << 16) | (info->var.xres - 1), __raw_writel 153 drivers/video/fbdev/grvga.c __raw_writel((info->var.lower_margin << 16) | (info->var.right_margin), __raw_writel 156 drivers/video/fbdev/grvga.c __raw_writel((info->var.vsync_len << 16) | (info->var.hsync_len), __raw_writel 159 drivers/video/fbdev/grvga.c __raw_writel(((info->var.yres + info->var.lower_margin + info->var.upper_margin + info->var.vsync_len - 1) << 16) | __raw_writel 181 drivers/video/fbdev/grvga.c __raw_writel((par->clk_sel << 6) | (func << 4) | 1, __raw_writel 214 drivers/video/fbdev/grvga.c __raw_writel((regno << 24) | (red << 16) | (green << 8) | blue, __raw_writel 248 drivers/video/fbdev/grvga.c __raw_writel(base_addr, __raw_writel 485 drivers/video/fbdev/grvga.c __raw_writel(physical_start, &par->regs->fb_pos); __raw_writel 486 drivers/video/fbdev/grvga.c __raw_writel(__raw_readl(&par->regs->status) | 1, /* Enable framebuffer */ __raw_writel 106 drivers/video/fbdev/mb862xx/mb862xxfb.h #define gdc_write __raw_writel __raw_writel 350 drivers/video/fbdev/mx3fb.c __raw_writel(value, mx3fb->reg_base + reg); __raw_writel 66 drivers/video/fbdev/nvidia/nv_local.h #define NV_WR32(p,i,d) (__raw_writel((d), (void __iomem *)(p) + (i))) __raw_writel 253 drivers/video/fbdev/omap2/omapfb/dss/dispc.c __raw_writel(val, dispc.base + idx); __raw_writel 444 drivers/video/fbdev/omap2/omapfb/dss/dsi.c __raw_writel(val, base + idx.idx); __raw_writel 115 drivers/video/fbdev/omap2/omapfb/dss/dss.c __raw_writel(val, dss.base + idx.idx); __raw_writel 250 drivers/video/fbdev/omap2/omapfb/dss/hdmi.h __raw_writel(val, base_addr + idx); __raw_writel 303 drivers/video/fbdev/omap2/omapfb/dss/venc.c __raw_writel(val, venc.base + idx); __raw_writel 85 drivers/video/fbdev/omap2/omapfb/omapfb-main.c __raw_writel(color, p); __raw_writel 73 drivers/video/fbdev/omap2/omapfb/vrfb.c __raw_writel(val, vrfb_base + SMS_ROT_CONTROL(ctx)); __raw_writel 78 drivers/video/fbdev/omap2/omapfb/vrfb.c __raw_writel(val, vrfb_base + SMS_ROT_SIZE(ctx)); __raw_writel 83 drivers/video/fbdev/omap2/omapfb/vrfb.c __raw_writel(val, vrfb_base + SMS_ROT_PHYSICAL_BA(ctx)); __raw_writel 113 drivers/video/fbdev/pxa3xx-gcu.c __raw_writel(val, priv->mmio_base + off); __raw_writel 104 drivers/video/fbdev/pxafb.c __raw_writel(val, fbi->mmio_base + off); __raw_writel 82 drivers/video/fbdev/riva/riva_hw.h #define NV_WR32(p,i,d) (__raw_writel((d), (void __iomem *)(p) + (i))) __raw_writel 47 drivers/video/fbdev/s3c-fb.c __raw_writel(v, r); \ __raw_writel 671 drivers/video/fbdev/tgafb.c __raw_writel(fgcolor, regs_base + TGA_FOREGROUND_REG); __raw_writel 672 drivers/video/fbdev/tgafb.c __raw_writel(bgcolor, regs_base + TGA_BACKGROUND_REG); __raw_writel 690 drivers/video/fbdev/tgafb.c __raw_writel((is8bpp __raw_writel 704 drivers/video/fbdev/tgafb.c __raw_writel(pixelmask, regs_base + TGA_PIXELMASK_REG); __raw_writel 717 drivers/video/fbdev/tgafb.c __raw_writel(mask << shift, fb_base + pos); __raw_writel 723 drivers/video/fbdev/tgafb.c __raw_writel(0xffffffff, regs_base + TGA_PIXELMASK_REG); __raw_writel 746 drivers/video/fbdev/tgafb.c __raw_writel(mask, fb_base + pos + j*bincr); __raw_writel 755 drivers/video/fbdev/tgafb.c __raw_writel(pixelmask, regs_base + TGA_PIXELMASK_REG); __raw_writel 766 drivers/video/fbdev/tgafb.c __raw_writel(mask, fb_base + pos); __raw_writel 771 drivers/video/fbdev/tgafb.c __raw_writel(0xffffffff, regs_base + TGA_PIXELMASK_REG); __raw_writel 785 drivers/video/fbdev/tgafb.c __raw_writel(pixelmask, regs_base + TGA_PIXELMASK_REG); __raw_writel 795 drivers/video/fbdev/tgafb.c __raw_writel(mask, fb_base + pos + j*bincr); __raw_writel 804 drivers/video/fbdev/tgafb.c __raw_writel(pixelmask, regs_base + TGA_PIXELMASK_REG); __raw_writel 816 drivers/video/fbdev/tgafb.c __raw_writel(mask, fb_base + pos); __raw_writel 822 drivers/video/fbdev/tgafb.c __raw_writel(0xffffffff, regs_base + TGA_PIXELMASK_REG); __raw_writel 826 drivers/video/fbdev/tgafb.c __raw_writel((is8bpp __raw_writel 868 drivers/video/fbdev/tgafb.c __raw_writel(color, fb_base + pos + j*4); __raw_writel 963 drivers/video/fbdev/tgafb.c __raw_writel(color, regs_base + TGA_BLOCK_COLOR0_REG); __raw_writel 964 drivers/video/fbdev/tgafb.c __raw_writel(color, regs_base + TGA_BLOCK_COLOR1_REG); __raw_writel 968 drivers/video/fbdev/tgafb.c __raw_writel(color, regs_base + TGA_BLOCK_COLOR0_REG); __raw_writel 969 drivers/video/fbdev/tgafb.c __raw_writel(color, regs_base + TGA_BLOCK_COLOR1_REG); __raw_writel 970 drivers/video/fbdev/tgafb.c __raw_writel(color, regs_base + TGA_BLOCK_COLOR2_REG); __raw_writel 971 drivers/video/fbdev/tgafb.c __raw_writel(color, regs_base + TGA_BLOCK_COLOR3_REG); __raw_writel 972 drivers/video/fbdev/tgafb.c __raw_writel(color, regs_base + TGA_BLOCK_COLOR4_REG); __raw_writel 973 drivers/video/fbdev/tgafb.c __raw_writel(color, regs_base + TGA_BLOCK_COLOR5_REG); __raw_writel 974 drivers/video/fbdev/tgafb.c __raw_writel(color, regs_base + TGA_BLOCK_COLOR6_REG); __raw_writel 975 drivers/video/fbdev/tgafb.c __raw_writel(color, regs_base + TGA_BLOCK_COLOR7_REG); __raw_writel 980 drivers/video/fbdev/tgafb.c __raw_writel(0xffffffff, regs_base + TGA_DATA_REG); __raw_writel 983 drivers/video/fbdev/tgafb.c __raw_writel((is8bpp __raw_writel 1007 drivers/video/fbdev/tgafb.c __raw_writel(data, fb_base + pos); __raw_writel 1020 drivers/video/fbdev/tgafb.c __raw_writel(fdata, fb_base + pos + j*Bpp); __raw_writel 1022 drivers/video/fbdev/tgafb.c __raw_writel(ldata, fb_base + pos + j*Bpp); __raw_writel 1029 drivers/video/fbdev/tgafb.c __raw_writel((is8bpp __raw_writel 1058 drivers/video/fbdev/tgafb.c __raw_writel(TGA_MODE_SBM_8BPP | TGA_MODE_COPY, tga_regs+TGA_MODE_REG); __raw_writel 1059 drivers/video/fbdev/tgafb.c __raw_writel(0, tga_regs+TGA_PIXELSHIFT_REG); __raw_writel 1071 drivers/video/fbdev/tgafb.c __raw_writel(spos, tga_regs+TGA_COPY64_SRC); __raw_writel 1073 drivers/video/fbdev/tgafb.c __raw_writel(dpos, tga_regs+TGA_COPY64_DST); __raw_writel 1081 drivers/video/fbdev/tgafb.c __raw_writel(spos, tga_regs+TGA_COPY64_SRC); __raw_writel 1083 drivers/video/fbdev/tgafb.c __raw_writel(dpos, tga_regs+TGA_COPY64_DST); __raw_writel 1091 drivers/video/fbdev/tgafb.c __raw_writel(TGA_MODE_SBM_8BPP|TGA_MODE_SIMPLE, tga_regs+TGA_MODE_REG); __raw_writel 1106 drivers/video/fbdev/tgafb.c __raw_writel(TGA_MODE_SBM_24BPP | TGA_MODE_COPY, tga_regs+TGA_MODE_REG); __raw_writel 1107 drivers/video/fbdev/tgafb.c __raw_writel(0, tga_regs+TGA_PIXELSHIFT_REG); __raw_writel 1119 drivers/video/fbdev/tgafb.c __raw_writel(0xffff, src); __raw_writel 1121 drivers/video/fbdev/tgafb.c __raw_writel(0xffff, dst); __raw_writel 1129 drivers/video/fbdev/tgafb.c __raw_writel(0xffff, src); __raw_writel 1131 drivers/video/fbdev/tgafb.c __raw_writel(0xffff, dst); __raw_writel 1139 drivers/video/fbdev/tgafb.c __raw_writel(TGA_MODE_SBM_24BPP|TGA_MODE_SIMPLE, tga_regs+TGA_MODE_REG); __raw_writel 1198 drivers/video/fbdev/tgafb.c __raw_writel(TGA_MODE_SBM_8BPP|TGA_MODE_COPY, tga_regs+TGA_MODE_REG); __raw_writel 1199 drivers/video/fbdev/tgafb.c __raw_writel(0, tga_regs+TGA_PIXELSHIFT_REG); __raw_writel 1214 drivers/video/fbdev/tgafb.c __raw_writel(sfb - tga_fb, tga_regs+TGA_COPY64_SRC); __raw_writel 1216 drivers/video/fbdev/tgafb.c __raw_writel(dfb - tga_fb, tga_regs+TGA_COPY64_DST); __raw_writel 1225 drivers/video/fbdev/tgafb.c __raw_writel(0xffffffff, sfb); __raw_writel 1227 drivers/video/fbdev/tgafb.c __raw_writel(0xffffffff, dfb); __raw_writel 1236 drivers/video/fbdev/tgafb.c __raw_writel(mask_last, sfb); __raw_writel 1238 drivers/video/fbdev/tgafb.c __raw_writel(mask_last, dfb); __raw_writel 1247 drivers/video/fbdev/tgafb.c __raw_writel(TGA_MODE_SBM_8BPP|TGA_MODE_SIMPLE, tga_regs+TGA_MODE_REG); __raw_writel 89 drivers/w1/masters/omap_hdq.c __raw_writel(val, hdq_data->hdq_base + offset); __raw_writel 97 drivers/w1/masters/omap_hdq.c __raw_writel(new_val, hdq_data->hdq_base + offset); __raw_writel 74 drivers/watchdog/lantiq_wdt.c __raw_writel(val, priv->membase + offset); __raw_writel 55 drivers/watchdog/m54xx_wdt.c __raw_writel(gms0, MCF_GPT_GMS0); __raw_writel 56 drivers/watchdog/m54xx_wdt.c __raw_writel(MCF_GPT_GCIR_PRE(heartbeat*(MCF_BUSCLK/0xffff)) | __raw_writel 59 drivers/watchdog/m54xx_wdt.c __raw_writel(gms0, MCF_GPT_GMS0); __raw_writel 69 drivers/watchdog/m54xx_wdt.c __raw_writel(gms0, MCF_GPT_GMS0); __raw_writel 78 drivers/watchdog/m54xx_wdt.c __raw_writel(gms0, MCF_GPT_GMS0); __raw_writel 46 drivers/watchdog/txx9wdt.c __raw_writel(TXx9_TMWTMR_TWIE | TXx9_TMWTMR_TWC, &txx9wdt_reg->wtmr); __raw_writel 54 drivers/watchdog/txx9wdt.c __raw_writel(WD_TIMER_CLK * wdt_dev->timeout, &txx9wdt_reg->cpra); __raw_writel 55 drivers/watchdog/txx9wdt.c __raw_writel(WD_TIMER_CCD, &txx9wdt_reg->ccdr); __raw_writel 56 drivers/watchdog/txx9wdt.c __raw_writel(0, &txx9wdt_reg->tisr); /* clear pending interrupt */ __raw_writel 57 drivers/watchdog/txx9wdt.c __raw_writel(TXx9_TMTCR_TCE | TXx9_TMTCR_CCDE | TXx9_TMTCR_TMODE_WDOG, __raw_writel 59 drivers/watchdog/txx9wdt.c __raw_writel(TXx9_TMWTMR_TWIE | TXx9_TMWTMR_TWC, &txx9wdt_reg->wtmr); __raw_writel 67 drivers/watchdog/txx9wdt.c __raw_writel(TXx9_TMWTMR_WDIS, &txx9wdt_reg->wtmr); __raw_writel 68 drivers/watchdog/txx9wdt.c __raw_writel(__raw_readl(&txx9wdt_reg->tcr) & ~TXx9_TMTCR_TCE, __raw_writel 123 include/asm-generic/io.h #ifndef __raw_writel __raw_writel 124 include/asm-generic/io.h #define __raw_writel __raw_writel __raw_writel 225 include/asm-generic/io.h __raw_writel(__cpu_to_le32(value), addr); __raw_writel 299 include/asm-generic/io.h __raw_writel(__cpu_to_le32(value), addr); __raw_writel 420 include/asm-generic/io.h __raw_writel(*buf++, addr); __raw_writel 523 include/asm-generic/io.h __raw_writel(cpu_to_le32(value), PCI_IOBASE + addr); __raw_writel 333 include/linux/atmel-ssc.h #define ssc_writel(base, reg, value) __raw_writel((value), base + SSC_##reg) __raw_writel 557 include/linux/fb.h #define fb_writel __raw_writel __raw_writel 79 include/linux/mlx4/doorbell.h __raw_writel((__force u32) val[0], dest); __raw_writel 80 include/linux/mlx4/doorbell.h __raw_writel((__force u32) val[1], dest + 4); __raw_writel 55 include/linux/mlx5/doorbell.h __raw_writel((__force u32) val[0], dest); __raw_writel 56 include/linux/mlx5/doorbell.h __raw_writel((__force u32) val[1], dest + 4); __raw_writel 88 include/linux/mmc/sh_mmcif.h __raw_writel(val, addr + reg); __raw_writel 87 include/linux/mtd/doc2000.h __raw_writel(data, addr + reg); __raw_writel 418 include/linux/mtd/map.h __raw_writel(datum.x[0], map->virt + ofs); __raw_writel 87 include/linux/phy/omap_usb.h __raw_writel(data, addr + offset); __raw_writel 234 include/linux/pxa2xx_ssp.h __raw_writel(val, dev->mmio_base + reg); __raw_writel 322 lib/iomap.c __raw_writel(*src, addr); __raw_writel 28 lib/iomap_copy.c __raw_writel(*src++, dst++); __raw_writel 60 sound/atmel/ac97c.c __raw_writel((val), (chip)->regs + AC97C_##reg) __raw_writel 99 sound/mips/hal2.c __raw_writel(val, reg); __raw_writel 103 sound/parisc/harmony.c __raw_writel(v, h->iobase + r); __raw_writel 20 sound/pci/mixart/mixart_hwdep.h #define writel_be(data,addr) __raw_writel((__force u32)cpu_to_be32(data),addr) __raw_writel 28 sound/pci/mixart/mixart_hwdep.h #define writel_le(data,addr) __raw_writel((__force u32)cpu_to_le32(data),addr) __raw_writel 172 sound/sh/aica.c __raw_writel(0xea000002, SPU_MEMORY_BASE); __raw_writel 71 sound/soc/atmel/atmel-pcm.h #define ssc_writex(base, reg, value) __raw_writel((value), (base) + (reg)) __raw_writel 79 sound/soc/au1x/ac97c.c __raw_writel(v, ctx->mmio + reg); __raw_writel 77 sound/soc/au1x/i2sc.c __raw_writel(v, ctx->mmio + reg); __raw_writel 78 sound/soc/au1x/psc-ac97.c __raw_writel(PSC_AC97EVNT_CD, AC97_EVNT(pscdata)); __raw_writel 85 sound/soc/au1x/psc-ac97.c __raw_writel(PSC_AC97CDC_RD | PSC_AC97CDC_INDX(reg), __raw_writel 98 sound/soc/au1x/psc-ac97.c __raw_writel(PSC_AC97EVNT_CD, AC97_EVNT(pscdata)); __raw_writel 118 sound/soc/au1x/psc-ac97.c __raw_writel(PSC_AC97EVNT_CD, AC97_EVNT(pscdata)); __raw_writel 125 sound/soc/au1x/psc-ac97.c __raw_writel(PSC_AC97CDC_INDX(reg) | (val & 0xffff), __raw_writel 136 sound/soc/au1x/psc-ac97.c __raw_writel(PSC_AC97EVNT_CD, AC97_EVNT(pscdata)); __raw_writel 148 sound/soc/au1x/psc-ac97.c __raw_writel(PSC_AC97RST_SNC, AC97_RST(pscdata)); __raw_writel 151 sound/soc/au1x/psc-ac97.c __raw_writel(0, AC97_RST(pscdata)); __raw_writel 161 sound/soc/au1x/psc-ac97.c __raw_writel(0, AC97_CFG(au1xpsc_ac97_workdata)); __raw_writel 163 sound/soc/au1x/psc-ac97.c __raw_writel(PSC_CTRL_DISABLE, PSC_CTRL(pscdata)); __raw_writel 167 sound/soc/au1x/psc-ac97.c __raw_writel(PSC_AC97RST_RST, AC97_RST(pscdata)); __raw_writel 170 sound/soc/au1x/psc-ac97.c __raw_writel(0, AC97_RST(pscdata)); __raw_writel 174 sound/soc/au1x/psc-ac97.c __raw_writel(PSC_CTRL_ENABLE, PSC_CTRL(pscdata)); __raw_writel 188 sound/soc/au1x/psc-ac97.c __raw_writel(pscdata->cfg | PSC_AC97CFG_DE_ENABLE, AC97_CFG(pscdata)); __raw_writel 251 sound/soc/au1x/psc-ac97.c __raw_writel(r & ~PSC_AC97CFG_DE_ENABLE, AC97_CFG(pscdata)); __raw_writel 263 sound/soc/au1x/psc-ac97.c __raw_writel(r, AC97_CFG(pscdata)); __raw_writel 267 sound/soc/au1x/psc-ac97.c __raw_writel(r | PSC_AC97CFG_DE_ENABLE, AC97_CFG(pscdata)); __raw_writel 299 sound/soc/au1x/psc-ac97.c __raw_writel(AC97PCR_CLRFIFO(stype), AC97_PCR(pscdata)); __raw_writel 301 sound/soc/au1x/psc-ac97.c __raw_writel(AC97PCR_START(stype), AC97_PCR(pscdata)); __raw_writel 306 sound/soc/au1x/psc-ac97.c __raw_writel(AC97PCR_STOP(stype), AC97_PCR(pscdata)); __raw_writel 312 sound/soc/au1x/psc-ac97.c __raw_writel(AC97PCR_CLRFIFO(stype), AC97_PCR(pscdata)); __raw_writel 397 sound/soc/au1x/psc-ac97.c __raw_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd)); __raw_writel 399 sound/soc/au1x/psc-ac97.c __raw_writel(0, PSC_SEL(wd)); __raw_writel 401 sound/soc/au1x/psc-ac97.c __raw_writel(PSC_SEL_PS_AC97MODE | sel, PSC_SEL(wd)); __raw_writel 431 sound/soc/au1x/psc-ac97.c __raw_writel(0, AC97_CFG(wd)); __raw_writel 433 sound/soc/au1x/psc-ac97.c __raw_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd)); __raw_writel 449 sound/soc/au1x/psc-ac97.c __raw_writel(0, AC97_CFG(wd)); __raw_writel 451 sound/soc/au1x/psc-ac97.c __raw_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd)); __raw_writel 462 sound/soc/au1x/psc-ac97.c __raw_writel(wd->pm[0] | PSC_SEL_PS_AC97MODE, PSC_SEL(wd)); __raw_writel 149 sound/soc/au1x/psc-i2s.c __raw_writel(PSC_CTRL_ENABLE, PSC_CTRL(pscdata)); __raw_writel 159 sound/soc/au1x/psc-i2s.c __raw_writel(0, I2S_CFG(pscdata)); __raw_writel 161 sound/soc/au1x/psc-i2s.c __raw_writel(pscdata->cfg | PSC_I2SCFG_DE_ENABLE, I2S_CFG(pscdata)); __raw_writel 173 sound/soc/au1x/psc-i2s.c __raw_writel(0, I2S_CFG(pscdata)); __raw_writel 174 sound/soc/au1x/psc-i2s.c __raw_writel(PSC_CTRL_SUSPEND, PSC_CTRL(pscdata)); __raw_writel 194 sound/soc/au1x/psc-i2s.c __raw_writel(I2SPCR_CLRFIFO(stype), I2S_PCR(pscdata)); __raw_writel 196 sound/soc/au1x/psc-i2s.c __raw_writel(I2SPCR_START(stype), I2S_PCR(pscdata)); __raw_writel 205 sound/soc/au1x/psc-i2s.c __raw_writel(I2SPCR_STOP(stype), I2S_PCR(pscdata)); __raw_writel 217 sound/soc/au1x/psc-i2s.c __raw_writel(I2SPCR_STOP(stype), I2S_PCR(pscdata)); __raw_writel 228 sound/soc/au1x/psc-i2s.c __raw_writel(0, I2S_CFG(pscdata)); __raw_writel 230 sound/soc/au1x/psc-i2s.c __raw_writel(PSC_CTRL_SUSPEND, PSC_CTRL(pscdata)); __raw_writel 321 sound/soc/au1x/psc-i2s.c __raw_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd)); __raw_writel 323 sound/soc/au1x/psc-i2s.c __raw_writel(PSC_SEL_PS_I2SMODE | sel, PSC_SEL(wd)); __raw_writel 324 sound/soc/au1x/psc-i2s.c __raw_writel(0, I2S_CFG(wd)); __raw_writel 350 sound/soc/au1x/psc-i2s.c __raw_writel(0, I2S_CFG(wd)); __raw_writel 352 sound/soc/au1x/psc-i2s.c __raw_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd)); __raw_writel 366 sound/soc/au1x/psc-i2s.c __raw_writel(0, I2S_CFG(wd)); __raw_writel 368 sound/soc/au1x/psc-i2s.c __raw_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd)); __raw_writel 379 sound/soc/au1x/psc-i2s.c __raw_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd)); __raw_writel 381 sound/soc/au1x/psc-i2s.c __raw_writel(0, PSC_SEL(wd)); __raw_writel 383 sound/soc/au1x/psc-i2s.c __raw_writel(wd->pm[0], PSC_SEL(wd)); __raw_writel 127 sound/soc/cirrus/ep93xx-ac97.c __raw_writel(val, info->regs + reg); __raw_writel 98 sound/soc/cirrus/ep93xx-i2s.c __raw_writel(val, info->regs + reg); __raw_writel 155 sound/soc/mxs/mxs-saif.c __raw_writel(scr, master_saif->base + SAIF_CTRL); __raw_writel 197 sound/soc/mxs/mxs-saif.c __raw_writel(scr, master_saif->base + SAIF_CTRL); __raw_writel 222 sound/soc/mxs/mxs-saif.c __raw_writel(BM_SAIF_CTRL_CLKGATE, __raw_writel 224 sound/soc/mxs/mxs-saif.c __raw_writel(BM_SAIF_CTRL_RUN, __raw_writel 250 sound/soc/mxs/mxs-saif.c __raw_writel(BM_SAIF_CTRL_SFTRST, __raw_writel 254 sound/soc/mxs/mxs-saif.c __raw_writel(BM_SAIF_CTRL_CLKGATE, __raw_writel 279 sound/soc/mxs/mxs-saif.c __raw_writel(BM_SAIF_CTRL_RUN, __raw_writel 306 sound/soc/mxs/mxs-saif.c __raw_writel(BM_SAIF_CTRL_SFTRST, __raw_writel 308 sound/soc/mxs/mxs-saif.c __raw_writel(BM_SAIF_CTRL_CLKGATE, __raw_writel 368 sound/soc/mxs/mxs-saif.c __raw_writel(scr | scr0, saif->base + SAIF_CTRL); __raw_writel 388 sound/soc/mxs/mxs-saif.c __raw_writel(BM_SAIF_CTRL_SFTRST, __raw_writel 392 sound/soc/mxs/mxs-saif.c __raw_writel(BM_SAIF_CTRL_CLKGATE, __raw_writel 498 sound/soc/mxs/mxs-saif.c __raw_writel(scr, saif->base + SAIF_CTRL); __raw_writel 508 sound/soc/mxs/mxs-saif.c __raw_writel(BM_SAIF_CTRL_FIFO_ERROR_IRQ_EN, __raw_writel 553 sound/soc/mxs/mxs-saif.c __raw_writel(BM_SAIF_CTRL_RUN, __raw_writel 558 sound/soc/mxs/mxs-saif.c __raw_writel(BM_SAIF_CTRL_RUN, __raw_writel 569 sound/soc/mxs/mxs-saif.c __raw_writel(0, saif->base + SAIF_DATA); __raw_writel 570 sound/soc/mxs/mxs-saif.c __raw_writel(0, saif->base + SAIF_DATA); __raw_writel 606 sound/soc/mxs/mxs-saif.c __raw_writel(BM_SAIF_CTRL_RUN, __raw_writel 613 sound/soc/mxs/mxs-saif.c __raw_writel(BM_SAIF_CTRL_RUN, __raw_writel 688 sound/soc/mxs/mxs-saif.c __raw_writel(BM_SAIF_STAT_FIFO_UNDERFLOW_IRQ, __raw_writel 694 sound/soc/mxs/mxs-saif.c __raw_writel(BM_SAIF_STAT_FIFO_OVERFLOW_IRQ, __raw_writel 41 sound/soc/pxa/mmp-sspa.c __raw_writel(val, sspa->mmio_base + reg); __raw_writel 69 sound/soc/pxa/pxa-ssp.c __raw_writel(sscr0, ssp->mmio_base + SSCR0); __raw_writel 77 sound/soc/pxa/pxa-ssp.c __raw_writel(sscr0, ssp->mmio_base + SSCR0); __raw_writel 162 sound/soc/pxa/pxa-ssp.c __raw_writel(sssr, ssp->mmio_base + SSSR); __raw_writel 163 sound/soc/pxa/pxa-ssp.c __raw_writel(priv->cr0 & ~SSCR0_SSE, ssp->mmio_base + SSCR0); __raw_writel 164 sound/soc/pxa/pxa-ssp.c __raw_writel(priv->cr1, ssp->mmio_base + SSCR1); __raw_writel 165 sound/soc/pxa/pxa-ssp.c __raw_writel(priv->to, ssp->mmio_base + SSTO); __raw_writel 166 sound/soc/pxa/pxa-ssp.c __raw_writel(priv->psp, ssp->mmio_base + SSPSP); __raw_writel 316 sound/soc/sh/fsi.c __raw_writel(data, reg); __raw_writel 136 sound/soc/sh/siu.h __raw_writel(val, addr); __raw_writel 169 sound/soc/ti/davinci-i2s.c __raw_writel(val, dev->base + reg); __raw_writel 131 sound/soc/ti/davinci-mcasp.c __raw_writel(__raw_readl(reg) | val, reg); __raw_writel 138 sound/soc/ti/davinci-mcasp.c __raw_writel((__raw_readl(reg) & ~(val)), reg); __raw_writel 145 sound/soc/ti/davinci-mcasp.c __raw_writel((__raw_readl(reg) & ~mask) | val, reg); __raw_writel 151 sound/soc/ti/davinci-mcasp.c __raw_writel(val, mcasp->base + offset); __raw_writel 56 sound/soc/txx9/txx9aclc-ac97.c __raw_writel(dat, base + ACREGACC); __raw_writel 57 sound/soc/txx9/txx9aclc-ac97.c __raw_writel(ACINT_REGACCRDY, base + ACINTEN); __raw_writel 59 sound/soc/txx9/txx9aclc-ac97.c __raw_writel(ACINT_REGACCRDY, base + ACINTDIS); __raw_writel 73 sound/soc/txx9/txx9aclc-ac97.c __raw_writel(ACINT_REGACCRDY, base + ACINTDIS); __raw_writel 84 sound/soc/txx9/txx9aclc-ac97.c __raw_writel(((reg | (ac97->num << 7)) << ACREGACC_REG_SHIFT) | __raw_writel 87 sound/soc/txx9/txx9aclc-ac97.c __raw_writel(ACINT_REGACCRDY, base + ACINTEN); __raw_writel 92 sound/soc/txx9/txx9aclc-ac97.c __raw_writel(ACINT_REGACCRDY, base + ACINTDIS); __raw_writel 101 sound/soc/txx9/txx9aclc-ac97.c __raw_writel(ACCTL_ENLINK, base + ACCTLDIS); __raw_writel 103 sound/soc/txx9/txx9aclc-ac97.c __raw_writel(ACCTL_ENLINK, base + ACCTLEN); __raw_writel 105 sound/soc/txx9/txx9aclc-ac97.c __raw_writel(ready, base + ACINTEN); __raw_writel 113 sound/soc/txx9/txx9aclc-ac97.c __raw_writel(ACINT_REGACCRDY, base + ACINTSTS); __raw_writel 114 sound/soc/txx9/txx9aclc-ac97.c __raw_writel(ready, base + ACINTDIS); __raw_writel 129 sound/soc/txx9/txx9aclc-ac97.c __raw_writel(__raw_readl(base + ACINTMSTS), base + ACINTDIS); __raw_writel 145 sound/soc/txx9/txx9aclc-ac97.c __raw_writel(ACCTL_ENLINK, drvdata->base + ACCTLDIS); __raw_writel 175 sound/soc/txx9/txx9aclc.c __raw_writel(ctlbit, base + ACCTLEN); __raw_writel 225 sound/soc/txx9/txx9aclc.c __raw_writel(ctlbit, base + ACCTLDIS); __raw_writel 229 sound/soc/txx9/txx9aclc.c __raw_writel(ctlbit, base + ACCTLEN); __raw_writel 391 sound/soc/txx9/txx9aclc.c __raw_writel(ACCTL_AUDODMA | ACCTL_AUDIDMA, base + ACCTLDIS); __raw_writel 393 sound/soc/txx9/txx9aclc.c __raw_writel(__raw_readl(base + ACAUDIDAT), base + ACAUDODAT);