__raw_readw 257 arch/alpha/include/asm/io.h extern u16 __raw_readw(const volatile void __iomem *addr); __raw_readw 425 arch/alpha/include/asm/io.h u16 ret = __raw_readw(addr); __raw_readw 503 arch/alpha/include/asm/io.h #define readw_relaxed(addr) __raw_readw(addr) __raw_readw 28 arch/alpha/include/asm/vga.h return __raw_readw((volatile const u16 __iomem *) addr); __raw_readw 141 arch/alpha/kernel/io.c EXPORT_SYMBOL(__raw_readw); __raw_readw 158 arch/alpha/kernel/io.c u16 ret = __raw_readw(addr); __raw_readw 451 arch/alpha/kernel/io.c *(u16 *)to = __raw_readw(from); __raw_readw 605 arch/alpha/kernel/io.c u16 tmp = __raw_readw(ios++); __raw_readw 44 arch/arc/include/asm/io.h #define ioread16be(p) ({ u16 __v = be16_to_cpu((__force __be16)__raw_readw(p)); __iormb(); __v; }) __raw_readw 67 arch/arc/include/asm/io.h #define __raw_readw __raw_readw __raw_readw 229 arch/arc/include/asm/io.h __raw_readw(c)); __r; }) __raw_readw 74 arch/arm/include/asm/io.h #define __raw_readw __raw_readw __raw_readw 260 arch/arm/include/asm/io.h __raw_readw(__io(p))); __iormb(); __v; }) __raw_readw 293 arch/arm/include/asm/io.h __raw_readw(c)); __r; }) __raw_readw 422 arch/arm/include/asm/io.h #define ioread16be(p) ({ __u16 __v = be16_to_cpu((__force __be16)__raw_readw(p)); __iormb(); __v; }) __raw_readw 86 arch/arm/mach-ebsa110/io.c return __raw_readw(a); __raw_readw 97 arch/arm/mach-ebsa110/io.c ret = __raw_readw(a); __raw_readw 98 arch/arm/mach-ebsa110/io.c ret |= __raw_readw(a + 4) << 16; __raw_readw 265 arch/arm/mach-ebsa110/io.c return __raw_readw((void __iomem *)ISAIO_BASE + offset); __raw_readw 280 arch/arm/mach-ebsa110/io.c return __raw_readw(a) | __raw_readw(a + 4) << 16; __raw_readw 72 arch/arm/mach-ep93xx/snappercl15.c return !!(__raw_readw(NAND_CTRL_ADDR(chip)) & SNAPPERCL15_NAND_RDY); __raw_readw 344 arch/arm/mach-ixp4xx/goramo_mlr.c return __raw_readw(flash + addr); __raw_readw 346 arch/arm/mach-ixp4xx/goramo_mlr.c return __raw_readw(flash + (addr ^ 2)); __raw_readw 179 arch/arm/mach-ixp4xx/include/mach/io.h return __raw_readw(p); __raw_readw 396 arch/arm/mach-ixp4xx/include/mach/io.h return le16_to_cpu((__force __le16)__raw_readw(addr)); __raw_readw 184 arch/arm/mach-omap1/clock.c dsor = 1 << (3 & (__raw_readw(DSP_CKCTL) >> clk->rate_offset)); __raw_readw 237 arch/arm/mach-omap1/clock.c regval = __raw_readw(DSP_CKCTL); __raw_readw 357 arch/arm/mach-omap1/clock.c ratio_bits |= __raw_readw(clk->enable_reg) & ~0xfd; __raw_readw 397 arch/arm/mach-omap1/clock.c ratio_bits = __raw_readw(clk->enable_reg) & ~1; __raw_readw 465 arch/arm/mach-omap1/clock.c regval16 = __raw_readw(clk->enable_reg); __raw_readw 486 arch/arm/mach-omap1/clock.c regval16 = __raw_readw(clk->enable_reg); __raw_readw 597 arch/arm/mach-omap1/clock.c regval32 = __raw_readw(clk->enable_reg); __raw_readw 195 arch/arm/mach-omap1/dma.c val = __raw_readw(addr); __raw_readw 197 arch/arm/mach-omap1/dma.c val |= __raw_readw(addr + 2) << 16; __raw_readw 153 arch/arm/mach-omap1/io.c return __raw_readw(OMAP1_IO_ADDRESS(pa)); __raw_readw 54 arch/arm/mach-omap1/mcbsp.c __raw_writew(__raw_readw(DSP_RSTCT2) | DPS_RSTCT2_PER_EN | __raw_readw 151 arch/arm/mach-omap1/pm.h #define DSP_SAVE(x) dsp_sleep_save[DSP_SLEEP_SAVE_##x] = __raw_readw(x) __raw_readw 52 arch/arm/mach-omap1/reset.c rs = __raw_readw(OMAP1_IO_ADDRESS(ARM_SYSST)); __raw_readw 625 arch/arm/mach-pxa/balloon3.c ver = __raw_readw(BALLOON3_FPGA_VER); __raw_readw 126 arch/arm/mach-pxa/lpd270.c pending = __raw_readw(LPD270_INT_STATUS) & lpd270_irq_enabled; __raw_readw 134 arch/arm/mach-pxa/lpd270.c pending = __raw_readw(LPD270_INT_STATUS) & __raw_readw 105 arch/arm/mach-pxa/zeus.c return __raw_readw(ZEUS_CPLD_ISA_IRQ) & zeus_irq_enabled_mask; __raw_readw 484 arch/arm/mach-pxa/zeus.c u16 cpld_state = __raw_readw(ZEUS_CPLD_CONTROL); __raw_readw 865 arch/arm/mach-pxa/zeus.c system_rev = __raw_readw(ZEUS_CPLD_VERSION); __raw_readw 59 arch/arm64/include/asm/io.h #define __raw_readw __raw_readw __raw_readw 120 arch/arm64/include/asm/io.h #define readw_relaxed(c) ({ u16 __r = le16_to_cpu((__force __le16)__raw_readw(c)); __r; }) __raw_readw 187 arch/arm64/include/asm/io.h #define ioread16be(p) ({ __u16 __v = be16_to_cpu((__force __be16)__raw_readw(p)); __iormb(__v); __v; }) __raw_readw 17 arch/h8300/include/asm/io.h #define __raw_readw __raw_readw __raw_readw 167 arch/hexagon/include/asm/io.h #define readw_relaxed __raw_readw __raw_readw 170 arch/m68k/coldfire/intc-2.c pa = __raw_readw(MCFEPORT_EPPAR); __raw_readw 154 arch/m68k/coldfire/intc-simr.c pa = __raw_readw(MCFEPORT_EPPAR); __raw_readw 48 arch/m68k/coldfire/intc.c imr = __raw_readw(MCFSIM_IMR); __raw_readw 55 arch/m68k/coldfire/intc.c imr = __raw_readw(MCFSIM_IMR); __raw_readw 62 arch/m68k/coldfire/intc.c imr = __raw_readw(MCFSIM_IMR); __raw_readw 80 arch/m68k/coldfire/pci.c *value = le16_to_cpu(__raw_readw(addr)); __raw_readw 104 arch/m68k/coldfire/pit.c pcsr = __raw_readw(TA(MCFPIT_PCSR)); __raw_readw 129 arch/m68k/coldfire/pit.c pcntr = __raw_readw(TA(MCFPIT_PCNTR)); __raw_readw 44 arch/m68k/coldfire/timers.c #define __raw_readtrr __raw_readw __raw_readw 100 arch/m68k/coldfire/timers.c tcn = __raw_readw(TA(MCFTIMER_TCN)); __raw_readw 69 arch/m68k/include/asm/io_no.h return __raw_readw(addr); __raw_readw 70 arch/m68k/include/asm/io_no.h return __le16_to_cpu(__raw_readw(addr)); __raw_readw 102 arch/m68k/include/asm/io_no.h #define readw __raw_readw __raw_readw 115 arch/m68k/include/asm/mcfgpio.h #define mcfgpio_read(port) __raw_readw(port) __raw_readw 53 arch/microblaze/include/asm/io.h #define in_be16(a) __raw_readw(a) __raw_readw 63 arch/microblaze/include/asm/io.h #define in_le16(a) __le16_to_cpu(__raw_readw(a)) __raw_readw 56 arch/mips/alchemy/devboards/bcsr.c r = __raw_readw(bcsr_regs[reg].raddr); __raw_readw 79 arch/mips/alchemy/devboards/bcsr.c r = __raw_readw(bcsr_regs[reg].raddr); __raw_readw 93 arch/mips/alchemy/devboards/bcsr.c unsigned short bisr = __raw_readw(bcsr_virt + BCSR_REG_INTSTAT); __raw_readw 497 arch/mips/include/asm/io.h be16_to_cpu(__raw_readw((__force unsigned *)(addr))) __raw_readw 106 arch/mips/pci/ops-tx4927.c return __raw_readw((void __iomem *)&pcicptr->g2pcfgdata + offset); __raw_readw 314 arch/mips/txx9/rbtx4939/setup.c r.x[0] = __raw_readw(map->virt + ofs); __raw_readw 37 arch/nds32/include/asm/io.h #define __raw_readw __raw_readw __raw_readw 65 arch/nds32/include/asm/io.h #define readw_relaxed(c) ({ u16 __v = le16_to_cpu((__force __le16)__raw_readw(c)); __v; }) __raw_readw 27 arch/parisc/include/asm/ide.h *(u16 *)addr = __raw_readw(port); __raw_readw 186 arch/parisc/include/asm/io.h return le16_to_cpu((__le16 __force) __raw_readw(addr)); __raw_readw 73 arch/parisc/lib/io.c *(u16 *)dst = __raw_readw(src); __raw_readw 88 arch/parisc/lib/io.c *(u16 *)dst = __raw_readw(src); __raw_readw 165 arch/parisc/lib/iomap.c return __raw_readw(addr); __raw_readw 234 arch/parisc/lib/iomap.c *(u16 *)dst = __raw_readw(addr); __raw_readw 49 arch/powerpc/kvm/book3s_xive.c #define __x_readw __raw_readw __raw_readw 346 arch/powerpc/sysdev/xive/native.c ack = be16_to_cpu(__raw_readw(xive_tima + TM_SPC_ACK_HV_REG)); __raw_readw 592 arch/powerpc/sysdev/xive/spapr.c ack = be16_to_cpu(__raw_readw(xive_tima + TM_SPC_ACK_OS_REG)); __raw_readw 67 arch/riscv/include/asm/io.h #define __raw_readw __raw_readw __raw_readw 102 arch/riscv/include/asm/io.h #define readw_cpu(c) ({ u16 __r = le16_to_cpu((__force __le16)__raw_readw(c)); __r; }) __raw_readw 103 arch/sh/boards/board-polaris.c wcr = __raw_readw(WCR2); __raw_readw 109 arch/sh/boards/board-polaris.c bcr_mask = __raw_readw(BCR2); __raw_readw 155 arch/sh/boards/board-urquell.c __raw_writew(__raw_readw(UBOARDREG(IRL2MSKR)) & ~0x00000001, __raw_readw 175 arch/sh/boards/board-urquell.c return __raw_readw(UBOARDREG(MDSWMR)); __raw_readw 478 arch/sh/boards/mach-ap325rxa/setup.c __raw_writew(__raw_readw(PORT_MSELCRB) & ~0x0001, PORT_MSELCRB); __raw_readw 1121 arch/sh/boards/mach-ecovec24/setup.c __raw_writew((__raw_readw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA); __raw_readw 1191 arch/sh/boards/mach-ecovec24/setup.c __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA); __raw_readw 1201 arch/sh/boards/mach-ecovec24/setup.c __raw_writew((__raw_readw(IODRIVEA) & ~0x00c0) | 0x0080 , IODRIVEA); __raw_readw 1344 arch/sh/boards/mach-ecovec24/setup.c __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000, __raw_readw 64 arch/sh/boards/mach-highlander/irq-r7780mp.c if ((__raw_readw(0xa4000700) & 0xf000) == 0x2000) { __raw_readw 57 arch/sh/boards/mach-highlander/irq-r7780rp.c if (__raw_readw(0xa5000600)) { __raw_readw 66 arch/sh/boards/mach-highlander/irq-r7785rp.c if ((__raw_readw(0xa4000158) & 0xf000) != 0x1000) __raw_readw 24 arch/sh/boards/mach-highlander/psw.c l = __raw_readw(PA_DBSW); __raw_readw 313 arch/sh/boards/mach-highlander/setup.c __raw_writew(__raw_readw(PA_IVDRCTL) | (1 << IVDR_CK_ON), PA_IVDRCTL); __raw_readw 319 arch/sh/boards/mach-highlander/setup.c __raw_writew(__raw_readw(PA_IVDRCTL) & ~(1 << IVDR_CK_ON), PA_IVDRCTL); __raw_readw 351 arch/sh/boards/mach-highlander/setup.c u16 ver = __raw_readw(PA_VERREG); __raw_readw 383 arch/sh/boards/mach-highlander/setup.c __raw_writew(__raw_readw(PA_IVDRCTL) | 0x01, PA_IVDRCTL); /* Si13112 */ __raw_readw 55 arch/sh/boards/mach-hp6xx/pm.c frqcr = __raw_readw(FRQCR); __raw_readw 64 arch/sh/boards/mach-hp6xx/pm.c mcr = __raw_readw(MCR); __raw_readw 85 arch/sh/boards/mach-hp6xx/pm.c frqcr = __raw_readw(FRQCR); __raw_readw 160 arch/sh/boards/mach-hp6xx/setup.c v = __raw_readw(SCPCR); __raw_readw 462 arch/sh/boards/mach-kfr2r09/setup.c __raw_writew((__raw_readw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB); __raw_readw 596 arch/sh/boards/mach-kfr2r09/setup.c __raw_writew((__raw_readw(DRVCRB) & ~0x0003) | 0x0001, DRVCRB); __raw_readw 100 arch/sh/boards/mach-landisk/gio.c data = __raw_readw(addr); __raw_readw 568 arch/sh/boards/mach-migor/setup.c __raw_writew(__raw_readw(PORT_MSELCRB) | 0x2000, PORT_MSELCRB); /* D15->D8 */ __raw_readw 581 arch/sh/boards/mach-migor/setup.c __raw_writew(__raw_readw(PORT_MSELCRA) | 1, PORT_MSELCRA); __raw_readw 133 arch/sh/boards/mach-r2d/irq.c switch (__raw_readw(PA_VERREG) & 0xf0) { __raw_readw 151 arch/sh/boards/mach-r2d/irq.c __raw_readw(PA_VERREG)); __raw_readw 271 arch/sh/boards/mach-r2d/setup.c u16 ver = __raw_readw(PA_VERREG); __raw_readw 74 arch/sh/boards/mach-sdk7780/setup.c u16 ver = __raw_readw(FPGA_FPVERR); __raw_readw 75 arch/sh/boards/mach-sdk7780/setup.c u16 dateStamp = __raw_readw(FPGA_FPDATER); __raw_readw 37 arch/sh/boards/mach-se/7206/irq.c val = __raw_readw(INTC_IPR01); __raw_readw 41 arch/sh/boards/mach-se/7206/irq.c msk0 = __raw_readw(INTMSK0); __raw_readw 42 arch/sh/boards/mach-se/7206/irq.c msk1 = __raw_readw(INTMSK1); __raw_readw 68 arch/sh/boards/mach-se/7206/irq.c val = __raw_readw(INTC_IPR01); __raw_readw 73 arch/sh/boards/mach-se/7206/irq.c msk0 = __raw_readw(INTMSK0); __raw_readw 74 arch/sh/boards/mach-se/7206/irq.c msk1 = __raw_readw(INTMSK1); __raw_readw 100 arch/sh/boards/mach-se/7206/irq.c sts0 = __raw_readw(INTSTS0); __raw_readw 101 arch/sh/boards/mach-se/7206/irq.c sts1 = __raw_readw(INTSTS1); __raw_readw 143 arch/sh/boards/mach-se/7206/irq.c __raw_writew(__raw_readw(INTC_ICR1) | 0x000b, INTC_ICR1); /* ICR1 */ __raw_readw 38 arch/sh/boards/mach-se/7721/irq.c __raw_writew(__raw_readw(0xa4050118) & ~0x00ff, 0xa4050118); __raw_readw 179 arch/sh/boards/mach-se/7722/setup.c __raw_writew(__raw_readw(PORT_HIZCRA) & ~0x4000, PORT_HIZCRA); __raw_readw 180 arch/sh/boards/mach-se/7722/setup.c __raw_writew(__raw_readw(PORT_HIZCRC) & ~0xc000, PORT_HIZCRC); __raw_readw 75 arch/sh/boards/mach-se/7724/irq.c __raw_writew(__raw_readw(set.mraddr) | 0x0001 << bit, set.mraddr); __raw_readw 83 arch/sh/boards/mach-se/7724/irq.c __raw_writew(__raw_readw(set.mraddr) & ~(0x0001 << bit), set.mraddr); __raw_readw 96 arch/sh/boards/mach-se/7724/irq.c unsigned short intv = __raw_readw(set.sraddr); __raw_readw 617 arch/sh/boards/mach-se/7724/setup.c if (!__raw_readw(EEPROM_STAT)) __raw_readw 643 arch/sh/boards/mach-se/7724/setup.c mac = __raw_readw(EEPROM_DATA); __raw_readw 679 arch/sh/boards/mach-se/7724/setup.c u16 sw = __raw_readw(SW4140); /* select camera, monitor */ __raw_readw 695 arch/sh/boards/mach-se/7724/setup.c fpga_out = __raw_readw(FPGA_OUT); __raw_readw 717 arch/sh/boards/mach-se/7724/setup.c __raw_writew((__raw_readw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB); __raw_readw 780 arch/sh/boards/mach-se/7724/setup.c __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA); __raw_readw 26 arch/sh/boards/mach-se/7780/irq.c __raw_writew((__raw_readw(FPGA_INTMSK1) | 0x0002), FPGA_INTMSK1); __raw_readw 97 arch/sh/boards/mach-se/7780/setup.c __raw_writew(__raw_readw(GPIO_PHCR)&0xfff3, GPIO_PHCR); __raw_readw 163 arch/sh/boards/mach-sh7763rdp/setup.c if (__raw_readw(CPLD_BOARD_ID_ERV_REG) == 0xECB1) __raw_readw 169 arch/sh/boards/mach-sh7763rdp/setup.c __raw_writew((__raw_readw(PORT_PSEL2) & 0xFFC3), PORT_PSEL2); __raw_readw 171 arch/sh/boards/mach-sh7763rdp/setup.c __raw_writew(__raw_readw(PORT_PICR) & 0xFC0F, PORT_PICR); __raw_readw 178 arch/sh/boards/mach-sh7763rdp/setup.c __raw_writew(__raw_readw(PORT_PJCR) & 0x0003, PORT_PJCR); __raw_readw 180 arch/sh/boards/mach-sh7763rdp/setup.c __raw_writew(__raw_readw(PORT_PICR) & 0xF3FF, PORT_PICR); __raw_readw 184 arch/sh/boards/mach-sh7763rdp/setup.c __raw_writew((__raw_readw(PORT_PSEL2) & 0x00C0), PORT_PSEL2); __raw_readw 186 arch/sh/boards/mach-sh7763rdp/setup.c __raw_writew((__raw_readw(PORT_PSEL3) & 0x0700), PORT_PSEL3); __raw_readw 190 arch/sh/boards/mach-sh7763rdp/setup.c __raw_writew((__raw_readw(PORT_PSEL1) & 0xFFF0) | 0x0004, PORT_PSEL1); __raw_readw 192 arch/sh/boards/mach-sh7763rdp/setup.c __raw_writew(__raw_readw(PORT_PSEL4) | 0x4000, PORT_PSEL4); __raw_readw 195 arch/sh/boards/mach-sh7763rdp/setup.c __raw_writew((__raw_readw(PORT_PSEL1) & ~0xff00) | 0x2400, PORT_PSEL1); __raw_readw 205 arch/sh/boards/mach-sh7763rdp/setup.c __raw_writew(__raw_readw(PORT_PACR) & ~0x3000, PORT_PACR); __raw_readw 206 arch/sh/boards/mach-sh7763rdp/setup.c __raw_writew(__raw_readw(PORT_PCCR) & ~0xCFC3, PORT_PCCR); __raw_readw 35 arch/sh/boards/mach-x3proto/gpio.c data = __raw_readw(KEYCTLR); __raw_readw 45 arch/sh/boards/mach-x3proto/gpio.c return !!(__raw_readw(KEYDETR) & (1 << gpio)); __raw_readw 69 arch/sh/boards/mach-x3proto/gpio.c mask = __raw_readw(KEYDETR); __raw_readw 74 arch/sh/boards/mach-x3proto/ilsel.c tmp = __raw_readw(addr); __raw_readw 150 arch/sh/boards/mach-x3proto/ilsel.c tmp = __raw_readw(addr); __raw_readw 48 arch/sh/boot/romimage/mmcif-sh7724.c __raw_writew(__raw_readw(PTXCR) & ~0x000f, PTXCR); __raw_readw 51 arch/sh/boot/romimage/mmcif-sh7724.c __raw_writew(__raw_readw(PSELA) & ~0x2000, PSELA); __raw_readw 54 arch/sh/boot/romimage/mmcif-sh7724.c __raw_writew(__raw_readw(PSELE) & ~0x3000, PSELE); __raw_readw 57 arch/sh/boot/romimage/mmcif-sh7724.c __raw_writew(__raw_readw(HIZCRC) & ~0x0620, HIZCRC); __raw_readw 60 arch/sh/boot/romimage/mmcif-sh7724.c __raw_writew(__raw_readw(DRVCRA) | 0x3000, DRVCRA); __raw_readw 27 arch/sh/cchips/hd6446x/hd64461.c nimr = __raw_readw(HD64461_NIMR); __raw_readw 38 arch/sh/cchips/hd6446x/hd64461.c nimr = __raw_readw(HD64461_NIMR); __raw_readw 62 arch/sh/cchips/hd6446x/hd64461.c unsigned short intv = __raw_readw(HD64461_NIRR); __raw_readw 257 arch/sh/drivers/dma/dma-sh.c #define dmaor_read_reg(n) __raw_readw(dma_find_base((n)*6)) __raw_readw 93 arch/sh/drivers/pci/pci-sh5.h #define SH5PCI_READ_SHORT(reg) __raw_readw(PCISH5_ICR_REG(reg)) __raw_readw 33 arch/sh/drivers/pci/pci-sh7751.c word = __raw_readw(SH7751_BCR2); __raw_readw 105 arch/sh/drivers/pci/pci-sh7780.c status = __raw_readw(hose->reg_base + PCI_STATUS); __raw_readw 234 arch/sh/drivers/pci/pci-sh7780.c tmp = __raw_readw(hose->reg_base + PCI_STATUS); __raw_readw 271 arch/sh/drivers/pci/pci-sh7780.c id = __raw_readw(chan->reg_base + PCI_VENDOR_ID); __raw_readw 277 arch/sh/drivers/pci/pci-sh7780.c id = __raw_readw(chan->reg_base + PCI_DEVICE_ID); __raw_readw 399 arch/sh/drivers/pci/pci-sh7780.c (__raw_readw(chan->reg_base + PCI_STATUS) & PCI_STATUS_66MHZ) ? __raw_readw 41 arch/sh/include/asm/io.h #define readw_relaxed(c) ({ u16 __v = ioswabw(__raw_readw(c)); __v; }) __raw_readw 154 arch/sh/include/asm/io.h #define SLOW_DOWN_IO __raw_readw(sh_io_port_base) __raw_readw 20 arch/sh/include/mach-common/mach/magicpanelr2.h #define SETBITS_OUTW(mask, reg) __raw_writew(__raw_readw(reg) | mask, reg) __raw_readw 23 arch/sh/include/mach-common/mach/magicpanelr2.h #define CLRBITS_OUTW(mask, reg) __raw_writew(__raw_readw(reg) & ~mask, reg) __raw_readw 42 arch/sh/include/mach-ecovec24/mach/romimage.h __raw_writew(__raw_readw(HIZCRA) & ~(1 << 1), HIZCRA); __raw_readw 9 arch/sh/include/mach-se/mach/mrshpc.h if ((__raw_readw(MRSHPC_CSR) & 0x000c) != 0) __raw_readw 12 arch/sh/include/mach-se/mach/mrshpc.h if ((__raw_readw(MRSHPC_CSR) & 0x0080) == 0) { __raw_readw 24 arch/sh/include/mach-se/mach/mrshpc.h if((__raw_readw(MRSHPC_CSR) & 0x4000) != 0) __raw_readw 33 arch/sh/include/mach-se/mach/mrshpc.h if ((__raw_readw(MRSHPC_CSR) & 0x4000) != 0) __raw_readw 43 arch/sh/include/mach-se/mach/mrshpc.h if ((__raw_readw(MRSHPC_CSR) & 0x4000) != 0) __raw_readw 35 arch/sh/kernel/cpu/irq/ipr.c __raw_writew(__raw_readw(addr) & (0xffff ^ (0xf << p->shift)), addr); __raw_readw 36 arch/sh/kernel/cpu/irq/ipr.c (void)__raw_readw(addr); /* Read back to flush write posting */ __raw_readw 44 arch/sh/kernel/cpu/irq/ipr.c __raw_writew(__raw_readw(addr) | (p->priority << p->shift), addr); __raw_readw 25 arch/sh/kernel/cpu/sh2/clock-sh7619.c clk->rate *= pll2_mult * pll1rate[(__raw_readw(FREQCR) >> 8) & 7]; __raw_readw 34 arch/sh/kernel/cpu/sh2/clock-sh7619.c int idx = (__raw_readw(FREQCR) & 0x0007); __raw_readw 44 arch/sh/kernel/cpu/sh2/clock-sh7619.c return clk->parent->rate / pll1rate[(__raw_readw(FREQCR) >> 8) & 7]; __raw_readw 27 arch/sh/kernel/cpu/sh2a/clock-sh7201.c pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007]; __raw_readw 36 arch/sh/kernel/cpu/sh2a/clock-sh7201.c int idx = (__raw_readw(FREQCR) & 0x0007); __raw_readw 46 arch/sh/kernel/cpu/sh2a/clock-sh7201.c int idx = (__raw_readw(FREQCR) & 0x0007); __raw_readw 56 arch/sh/kernel/cpu/sh2a/clock-sh7201.c int idx = ((__raw_readw(FREQCR) >> 4) & 0x0007); __raw_readw 29 arch/sh/kernel/cpu/sh2a/clock-sh7203.c clk->rate *= pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0003] * pll2_mult; __raw_readw 38 arch/sh/kernel/cpu/sh2a/clock-sh7203.c int idx = (__raw_readw(FREQCR) & 0x0007); __raw_readw 48 arch/sh/kernel/cpu/sh2a/clock-sh7203.c int idx = (__raw_readw(FREQCR) & 0x0007); __raw_readw 26 arch/sh/kernel/cpu/sh2a/clock-sh7206.c clk->rate *= pll2_mult * pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007]; __raw_readw 35 arch/sh/kernel/cpu/sh2a/clock-sh7206.c int idx = (__raw_readw(FREQCR) & 0x0007); __raw_readw 45 arch/sh/kernel/cpu/sh2a/clock-sh7206.c return clk->parent->rate / pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007]; __raw_readw 54 arch/sh/kernel/cpu/sh2a/clock-sh7206.c int idx = (__raw_readw(FREQCR) & 0x0007); __raw_readw 44 arch/sh/kernel/cpu/sh2a/clock-sh7264.c return rate * pll1rate[(__raw_readw(FRQCR) >> 8) & 1]; __raw_readw 28 arch/sh/kernel/cpu/sh3/clock-sh3.c int frqcr = __raw_readw(FRQCR); __raw_readw 40 arch/sh/kernel/cpu/sh3/clock-sh3.c int frqcr = __raw_readw(FRQCR); __raw_readw 52 arch/sh/kernel/cpu/sh3/clock-sh3.c int frqcr = __raw_readw(FRQCR); __raw_readw 64 arch/sh/kernel/cpu/sh3/clock-sh3.c int frqcr = __raw_readw(FRQCR); __raw_readw 32 arch/sh/kernel/cpu/sh3/clock-sh7705.c clk->rate *= pfc_divisors[__raw_readw(FRQCR) & 0x0003]; __raw_readw 41 arch/sh/kernel/cpu/sh3/clock-sh7705.c int idx = __raw_readw(FRQCR) & 0x0003; __raw_readw 51 arch/sh/kernel/cpu/sh3/clock-sh7705.c int idx = (__raw_readw(FRQCR) & 0x0300) >> 8; __raw_readw 61 arch/sh/kernel/cpu/sh3/clock-sh7705.c int idx = (__raw_readw(FRQCR) & 0x0030) >> 4; __raw_readw 24 arch/sh/kernel/cpu/sh3/clock-sh7706.c int frqcr = __raw_readw(FRQCR); __raw_readw 36 arch/sh/kernel/cpu/sh3/clock-sh7706.c int frqcr = __raw_readw(FRQCR); __raw_readw 48 arch/sh/kernel/cpu/sh3/clock-sh7706.c int frqcr = __raw_readw(FRQCR); __raw_readw 60 arch/sh/kernel/cpu/sh3/clock-sh7706.c int frqcr = __raw_readw(FRQCR); __raw_readw 24 arch/sh/kernel/cpu/sh3/clock-sh7709.c int frqcr = __raw_readw(FRQCR); __raw_readw 36 arch/sh/kernel/cpu/sh3/clock-sh7709.c int frqcr = __raw_readw(FRQCR); __raw_readw 48 arch/sh/kernel/cpu/sh3/clock-sh7709.c int frqcr = __raw_readw(FRQCR); __raw_readw 61 arch/sh/kernel/cpu/sh3/clock-sh7709.c int frqcr = __raw_readw(FRQCR); __raw_readw 26 arch/sh/kernel/cpu/sh3/clock-sh7710.c clk->rate *= md_table[__raw_readw(FRQCR) & 0x0007]; __raw_readw 35 arch/sh/kernel/cpu/sh3/clock-sh7710.c int idx = (__raw_readw(FRQCR) & 0x0007); __raw_readw 45 arch/sh/kernel/cpu/sh3/clock-sh7710.c int idx = (__raw_readw(FRQCR) & 0x0700) >> 8; __raw_readw 55 arch/sh/kernel/cpu/sh3/clock-sh7710.c int idx = (__raw_readw(FRQCR) & 0x0070) >> 4; __raw_readw 23 arch/sh/kernel/cpu/sh3/clock-sh7712.c int frqcr = __raw_readw(FRQCR); __raw_readw 35 arch/sh/kernel/cpu/sh3/clock-sh7712.c int frqcr = __raw_readw(FRQCR); __raw_readw 47 arch/sh/kernel/cpu/sh3/clock-sh7712.c int frqcr = __raw_readw(FRQCR); __raw_readw 15 arch/sh/kernel/cpu/sh3/serial-sh770x.c data = __raw_readw(SCPCR); __raw_readw 21 arch/sh/kernel/cpu/sh3/serial-sh770x.c data = __raw_readw(SCPCR); __raw_readw 13 arch/sh/kernel/cpu/sh3/serial-sh7710.c __raw_writew(__raw_readw(PACR) & 0xffc0, PACR); __raw_readw 14 arch/sh/kernel/cpu/sh3/serial-sh7710.c __raw_writew(__raw_readw(PBCR) & 0x0fff, PBCR); __raw_readw 16 arch/sh/kernel/cpu/sh3/serial-sh7710.c __raw_writew(__raw_readw(PBCR) & 0xf003, PBCR); __raw_readw 16 arch/sh/kernel/cpu/sh3/serial-sh7720.c data = __raw_readw(PORT_PTCR); __raw_readw 20 arch/sh/kernel/cpu/sh3/serial-sh7720.c data = __raw_readw(PORT_PVCR); __raw_readw 26 arch/sh/kernel/cpu/sh3/serial-sh7720.c data = __raw_readw(PORT_PTCR); __raw_readw 30 arch/sh/kernel/cpu/sh3/serial-sh7720.c data = __raw_readw(PORT_PVCR); __raw_readw 58 arch/sh/kernel/cpu/sh3/setup-sh3.c __raw_writew(__raw_readw(INTC_ICR1) & ~INTC_ICR1_IRQLVL, INTC_ICR1); __raw_readw 28 arch/sh/kernel/cpu/sh4/clock-sh4.c clk->rate *= pfc_divisors[__raw_readw(FRQCR) & 0x0007]; __raw_readw 37 arch/sh/kernel/cpu/sh4/clock-sh4.c int idx = (__raw_readw(FRQCR) & 0x0007); __raw_readw 47 arch/sh/kernel/cpu/sh4/clock-sh4.c int idx = (__raw_readw(FRQCR) >> 3) & 0x0007; __raw_readw 57 arch/sh/kernel/cpu/sh4/clock-sh4.c int idx = (__raw_readw(FRQCR) >> 6) & 0x0007; __raw_readw 212 arch/sh/kernel/cpu/sh4/perf_event.c tmp = __raw_readw(PMCR(idx)); __raw_readw 219 arch/sh/kernel/cpu/sh4/perf_event.c __raw_writew(__raw_readw(PMCR(idx)) | PMCR_PMCLR, PMCR(idx)); __raw_readw 228 arch/sh/kernel/cpu/sh4/perf_event.c __raw_writew(__raw_readw(PMCR(i)) & ~PMCR_PMEN, PMCR(i)); __raw_readw 236 arch/sh/kernel/cpu/sh4/perf_event.c __raw_writew(__raw_readw(PMCR(i)) | PMCR_PMEN, PMCR(i)); __raw_readw 132 arch/sh/kernel/cpu/sh4/setup-sh4-202.c __raw_writew(__raw_readw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR); __raw_readw 352 arch/sh/kernel/cpu/sh4/setup-sh7750.c __raw_writew(__raw_readw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR); __raw_readw 285 arch/sh/kernel/cpu/sh4/setup-sh7760.c __raw_writew(__raw_readw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR); __raw_readw 13 arch/sh/kernel/cpu/sh4a/serial-sh7722.c data = __raw_readw(PSCR); __raw_readw 1169 arch/sh/kernel/cpu/sh4a/setup-sh7724.c sh7724_rstandby_state.ipra = __raw_readw(0xa4080000); /* IPRA */ __raw_readw 1170 arch/sh/kernel/cpu/sh4a/setup-sh7724.c sh7724_rstandby_state.iprb = __raw_readw(0xa4080004); /* IPRB */ __raw_readw 1171 arch/sh/kernel/cpu/sh4a/setup-sh7724.c sh7724_rstandby_state.iprc = __raw_readw(0xa4080008); /* IPRC */ __raw_readw 1172 arch/sh/kernel/cpu/sh4a/setup-sh7724.c sh7724_rstandby_state.iprd = __raw_readw(0xa408000c); /* IPRD */ __raw_readw 1173 arch/sh/kernel/cpu/sh4a/setup-sh7724.c sh7724_rstandby_state.ipre = __raw_readw(0xa4080010); /* IPRE */ __raw_readw 1174 arch/sh/kernel/cpu/sh4a/setup-sh7724.c sh7724_rstandby_state.iprf = __raw_readw(0xa4080014); /* IPRF */ __raw_readw 1175 arch/sh/kernel/cpu/sh4a/setup-sh7724.c sh7724_rstandby_state.iprg = __raw_readw(0xa4080018); /* IPRG */ __raw_readw 1176 arch/sh/kernel/cpu/sh4a/setup-sh7724.c sh7724_rstandby_state.iprh = __raw_readw(0xa408001c); /* IPRH */ __raw_readw 1177 arch/sh/kernel/cpu/sh4a/setup-sh7724.c sh7724_rstandby_state.ipri = __raw_readw(0xa4080020); /* IPRI */ __raw_readw 1178 arch/sh/kernel/cpu/sh4a/setup-sh7724.c sh7724_rstandby_state.iprj = __raw_readw(0xa4080024); /* IPRJ */ __raw_readw 1179 arch/sh/kernel/cpu/sh4a/setup-sh7724.c sh7724_rstandby_state.iprk = __raw_readw(0xa4080028); /* IPRK */ __raw_readw 1180 arch/sh/kernel/cpu/sh4a/setup-sh7724.c sh7724_rstandby_state.iprl = __raw_readw(0xa408002c); /* IPRL */ __raw_readw 34 arch/sh/kernel/cpu/sh5/clock-sh5.c int idx = (__raw_readw(cprc_base) >> 12) & 0x0007; __raw_readw 44 arch/sh/kernel/cpu/sh5/clock-sh5.c int idx = (__raw_readw(cprc_base) >> 3) & 0x0007; __raw_readw 54 arch/sh/kernel/cpu/sh5/clock-sh5.c int idx = (__raw_readw(cprc_base) & 0x0007); __raw_readw 190 arch/sh/kernel/io_trapped.c tmp = __raw_readw(src_addr); __raw_readw 25 arch/sh/kernel/iomap.c return be16_to_cpu(__raw_readw(addr)); __raw_readw 89 arch/sh/kernel/iomap.c u16 data = __raw_readw(addr); __raw_readw 49 arch/sh/kernel/kgdb.c insn_size_t op = __raw_readw(linux_regs->pc); __raw_readw 146 arch/sh/kernel/kgdb.c stepped_opcode = __raw_readw((long)addr); __raw_readw 309 arch/sh/kernel/kgdb.c regs->pc -= instruction_size(__raw_readw(regs->pc - 4)); __raw_readw 425 arch/sh/kernel/signal_32.c regs->pc -= instruction_size(__raw_readw(regs->pc - 4)); __raw_readw 485 arch/sh/kernel/signal_32.c regs->pc -= instruction_size(__raw_readw(regs->pc - 4)); __raw_readw 487 arch/sh/kernel/signal_32.c regs->pc -= instruction_size(__raw_readw(regs->pc - 4)); __raw_readw 138 arch/sh/kernel/traps.c regs->pc -= instruction_size(__raw_readw(regs->pc - 4)); __raw_readw 155 arch/sh/kernel/traps.c regs->pc -= instruction_size(__raw_readw(regs->pc - 4)); __raw_readw 45 arch/sparc/include/asm/ide.h *ps++ = __raw_readw(port); __raw_readw 52 arch/sparc/include/asm/ide.h w = __raw_readw(port) << 16; __raw_readw 53 arch/sparc/include/asm/ide.h w |= __raw_readw(port); __raw_readw 59 arch/sparc/include/asm/ide.h *ps++ = __raw_readw(port); __raw_readw 16 arch/sparc/include/asm/io.h #define readw_be(__addr) __raw_readw(__addr) __raw_readw 32 arch/sparc/include/asm/io_64.h #define __raw_readw __raw_readw __raw_readw 297 arch/sparc/include/asm/io_64.h return __raw_readw(addr); __raw_readw 420 arch/sparc/include/asm/io_64.h #define ioread16be __raw_readw __raw_readw 125 arch/sparc/lib/PeeCeeI.c *ps++ = __raw_readw(addr); __raw_readw 132 arch/sparc/lib/PeeCeeI.c w = __raw_readw(addr) << 16; __raw_readw 133 arch/sparc/lib/PeeCeeI.c w |= __raw_readw(addr) << 0; __raw_readw 139 arch/sparc/lib/PeeCeeI.c *ps = __raw_readw(addr); __raw_readw 388 drivers/ata/pata_octeon_cf.c blob = __raw_readw(base + 0xc); __raw_readw 391 drivers/ata/pata_octeon_cf.c blob = __raw_readw(base + 2); __raw_readw 395 drivers/ata/pata_octeon_cf.c blob = __raw_readw(base + 4); __raw_readw 399 drivers/ata/pata_octeon_cf.c blob = __raw_readw(base + 6); __raw_readw 407 drivers/ata/pata_octeon_cf.c blob = __raw_readw(base + 0xc); __raw_readw 410 drivers/ata/pata_octeon_cf.c blob = __raw_readw(base + 2); __raw_readw 414 drivers/ata/pata_octeon_cf.c blob = __raw_readw(base + 4); __raw_readw 431 drivers/ata/pata_octeon_cf.c blob = __raw_readw(base + 6); __raw_readw 71 drivers/bcma/host_soc.c *buf = (__force __le16)__raw_readw(addr); __raw_readw 172 drivers/cdrom/gdrom.c data[c] = __raw_readw(GDROM_DATA_REG); __raw_readw 95 drivers/dma/sh/shdmac.c return __raw_readw(addr); __raw_readw 276 drivers/dma/sh/shdmac.c __raw_writew((__raw_readw(addr) & (0xff00 >> shift)) | (val << shift), __raw_readw 82 drivers/ide/tx4938ide.c *ptr++ = cpu_to_le16(__raw_readw((void __iomem *)port)); __raw_readw 86 drivers/ide/tx4939ide.c return __raw_readw(base + tx4939ide_swizzlew(reg)); __raw_readw 455 drivers/ide/tx4939ide.c *ptr++ = cpu_to_le16(__raw_readw((void __iomem *)port)); __raw_readw 139 drivers/input/keyboard/jornada680_kbd.c dc_static = (__raw_readw(PDCR) & (~0xcc0c)); __raw_readw 140 drivers/input/keyboard/jornada680_kbd.c ec_static = (__raw_readw(PECR) & (~0xf0cf)); __raw_readw 452 drivers/mmc/host/dw_mmc.h #define mci_fifo_readw(__reg) __raw_readw(__reg) __raw_readw 80 drivers/mmc/host/omap.c #define OMAP_MMC_READ(host, reg) __raw_readw((host)->virt_base + OMAP_MMC_REG(host, reg)) __raw_readw 62 drivers/mtd/maps/ixp4xx.c return be16_to_cpu(__raw_readw((void __iomem *)((unsigned long)addr ^ 0x2))); __raw_readw 77 drivers/mtd/maps/ixp4xx.c return __raw_readw(addr); __raw_readw 216 drivers/mtd/nand/raw/mxc_nand.c *t++ = __raw_readw(s++); __raw_readw 1327 drivers/net/ethernet/8390/pcnet_cs.c do { *d++ = __raw_readw(s++); } while (--c); __raw_readw 1440 drivers/net/ethernet/8390/pcnet_cs.c if (__raw_readw(info->base+offset+i) != (i>>1)) break; __raw_readw 88 drivers/net/ethernet/amd/am79c961a.c #define am_readword(dev,off) __raw_readw(ISAMEM_BASE + ((off) << 1)) __raw_readw 179 drivers/net/ethernet/cirrus/ep93xx_eth.c #define rdw(ep, off) __raw_readw((ep)->base_addr + (off)) __raw_readw 494 drivers/net/ethernet/freescale/enetc/enetc_hw.h *(u16 *)(addr + 4) = __raw_readw(hw->reg + ENETC_SIPMAR1); __raw_readw 21 drivers/net/ethernet/freescale/enetc/enetc_pf.c u16 lower = __raw_readw(hw->port + ENETC_PSIPMAR1(si)); __raw_readw 210 drivers/net/ethernet/freescale/fs_enet/fs_enet.h #define __cbd_in16(addr) __raw_readw(addr) __raw_readw 52 drivers/net/ethernet/freescale/fs_enet/mac-fec.c #define __fs_in16(addr) __raw_readw(addr) __raw_readw 49 drivers/net/ethernet/freescale/fs_enet/mac-scc.c #define __fs_in16(addr) __raw_readw(addr) __raw_readw 369 drivers/net/ethernet/natsemi/sonic.h return __raw_readw(base + (offset * 2) + 1); __raw_readw 371 drivers/net/ethernet/natsemi/sonic.h return __raw_readw(base + (offset * 2) + 0); __raw_readw 374 drivers/net/ethernet/natsemi/sonic.h return __raw_readw(base + (offset * 1) + 0); __raw_readw 129 drivers/parisc/lba_pci.c #define READ_U16(addr) __raw_readw(addr) __raw_readw 33 drivers/pcmcia/pxa2xx_balloon3.c ver = __raw_readw(BALLOON3_FPGA_VER); __raw_readw 60 drivers/pcmcia/pxa2xx_balloon3.c status = __raw_readw(BALLOON3_CF_STATUS_REG); __raw_readw 273 drivers/scsi/ncr53c8xx.h #define readw_l2b __raw_readw __raw_readw 277 drivers/scsi/ncr53c8xx.h #define readw_raw __raw_readw __raw_readw 86 drivers/sh/intc/access.c return intc_get_field_from_handle(__raw_readw(ptr), h); __raw_readw 110 drivers/sh/intc/access.c (void)__raw_readw(ptr); /* Defeat write posting */ __raw_readw 144 drivers/sh/intc/access.c value = intc_set_field_from_handle(__raw_readw(ptr), data, h); __raw_readw 146 drivers/sh/intc/access.c (void)__raw_readw(ptr); /* Defeat write posting */ __raw_readw 103 drivers/sh/intc/chip.c __raw_readw(addr); __raw_readw 232 drivers/spi/spi-atmel.c __raw_readw((port)->regs + SPI_##reg) __raw_readw 156 drivers/spi/spi-dw.h return __raw_readw(dws->regs + offset); __raw_readw 115 drivers/spi/spi-omap-uwire.c return __raw_readw(uwire_base + (idx << uwire_idx_shift)); __raw_readw 66 drivers/ssb/host_soc.c *buf = (__force __le16)__raw_readw(addr); __raw_readw 304 drivers/ssb/pcmcia.c *buf = (__force __le16)__raw_readw(addr); __raw_readw 315 drivers/ssb/pcmcia.c *buf = (__force __le16)__raw_readw(addr); __raw_readw 317 drivers/ssb/pcmcia.c *buf = (__force __le16)__raw_readw(addr + 2); __raw_readw 73 drivers/usb/c67x00/c67x00-ll-hpi.c return __raw_readw(dev->hpi.base + reg * dev->hpi.regstep); __raw_readw 389 drivers/usb/host/isp116x.h val = __raw_readw(isp116x->data_reg); __raw_readw 265 drivers/usb/musb/musb_core.c u16 data = __raw_readw(addr + offset); __raw_readw 347 drivers/usb/musb/musb_core.c *(u16 *)&dst[index] = __raw_readw(fifo); __raw_readw 150 drivers/usb/musb/tusb6010.c tmp = __raw_readw(addr + (offset & ~1)); __raw_readw 163 drivers/usb/musb/tusb6010.c tmp = __raw_readw(addr + (offset & ~1)); __raw_readw 65 drivers/video/fbdev/nvidia/nv_local.h #define NV_RD16(p,i) (__raw_readw((void __iomem *)(p) + (i))) __raw_readw 81 drivers/video/fbdev/riva/riva_hw.h #define NV_RD16(p,i) (__raw_readw((void __iomem *)(p) + (i))) __raw_readw 81 include/asm-generic/io.h #ifndef __raw_readw __raw_readw 82 include/asm-generic/io.h #define __raw_readw __raw_readw __raw_readw 166 include/asm-generic/io.h val = __le16_to_cpu(__raw_readw(addr)); __raw_readw 259 include/asm-generic/io.h return __le16_to_cpu(__raw_readw(addr)); __raw_readw 340 include/asm-generic/io.h u16 x = __raw_readw(addr); __raw_readw 479 include/asm-generic/io.h val = __le16_to_cpu(__raw_readw(PCI_IOBASE + addr)); __raw_readw 552 include/linux/fb.h #define fb_readw __raw_readw __raw_readw 94 include/linux/mtd/doc2000.h return __raw_readw(addr + reg); __raw_readw 396 include/linux/mtd/map.h r.x[0] = __raw_readw(map->virt + ofs); __raw_readw 289 lib/iomap.c u16 data = __raw_readw(addr); __raw_readw 43 sound/soc/sh/sh7760-ac97.c ipsel = __raw_readw(IPSEL);