__phy_write 204 drivers/net/phy/marvell.c return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page); __phy_write 419 drivers/net/phy/marvell.c ret = __phy_write(phydev, reg, val); __phy_write 1550 drivers/net/phy/marvell.c err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2, __phy_write 1555 drivers/net/phy/marvell.c err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1, __phy_write 1560 drivers/net/phy/marvell.c err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0, __phy_write 1656 drivers/net/phy/marvell.c ret = __phy_write(phydev, MII_88E1121_MISC_TEST, __phy_write 1671 drivers/net/phy/marvell.c ret = __phy_write(phydev, MII_88E1121_MISC_TEST, __phy_write 1921 drivers/net/phy/marvell.c ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret); __phy_write 1949 drivers/net/phy/marvell.c ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret); __phy_write 31 drivers/net/phy/microchip.c return __phy_write(phydev, LAN88XX_EXT_PAGE_ACCESS, page); __phy_write 86 drivers/net/phy/microchip.c ret = __phy_write(phydev, LAN88XX_EXT_PAGE_TR_LOW_DATA, __phy_write 93 drivers/net/phy/microchip.c ret = __phy_write(phydev, LAN88XX_EXT_PAGE_TR_HIGH_DATA, __phy_write 104 drivers/net/phy/microchip.c ret = __phy_write(phydev, LAN88XX_EXT_PAGE_TR_CR, buf); __phy_write 442 drivers/net/phy/mscc.c return __phy_write(phydev, MSCC_EXT_PAGE_ACCESS, page); __phy_write 620 drivers/net/phy/mscc.c __phy_write(phydev, MSCC_PHY_WOL_LOWER_MAC_ADDR, pwd[0]); __phy_write 621 drivers/net/phy/mscc.c __phy_write(phydev, MSCC_PHY_WOL_MID_MAC_ADDR, pwd[1]); __phy_write 622 drivers/net/phy/mscc.c __phy_write(phydev, MSCC_PHY_WOL_UPPER_MAC_ADDR, pwd[2]); __phy_write 624 drivers/net/phy/mscc.c __phy_write(phydev, MSCC_PHY_WOL_LOWER_MAC_ADDR, 0); __phy_write 625 drivers/net/phy/mscc.c __phy_write(phydev, MSCC_PHY_WOL_MID_MAC_ADDR, 0); __phy_write 626 drivers/net/phy/mscc.c __phy_write(phydev, MSCC_PHY_WOL_UPPER_MAC_ADDR, 0); __phy_write 633 drivers/net/phy/mscc.c __phy_write(phydev, MSCC_PHY_WOL_LOWER_PASSWD, pwd[0]); __phy_write 634 drivers/net/phy/mscc.c __phy_write(phydev, MSCC_PHY_WOL_MID_PASSWD, pwd[1]); __phy_write 635 drivers/net/phy/mscc.c __phy_write(phydev, MSCC_PHY_WOL_UPPER_PASSWD, pwd[2]); __phy_write 637 drivers/net/phy/mscc.c __phy_write(phydev, MSCC_PHY_WOL_LOWER_PASSWD, 0); __phy_write 638 drivers/net/phy/mscc.c __phy_write(phydev, MSCC_PHY_WOL_MID_PASSWD, 0); __phy_write 639 drivers/net/phy/mscc.c __phy_write(phydev, MSCC_PHY_WOL_UPPER_PASSWD, 0); __phy_write 647 drivers/net/phy/mscc.c __phy_write(phydev, MSCC_PHY_WOL_MAC_CONTROL, reg_val); __phy_write 890 drivers/net/phy/mscc.c __phy_write(phydev, MSCC_PHY_TR_MSB, val >> 16); __phy_write 891 drivers/net/phy/mscc.c __phy_write(phydev, MSCC_PHY_TR_LSB, val & GENMASK(15, 0)); __phy_write 892 drivers/net/phy/mscc.c __phy_write(phydev, MSCC_PHY_TR_CNTL, TR_WRITE | TR_ADDR(addr)); __phy_write 1994 drivers/net/phy/mscc.c __phy_write(phydev, MSCC_EXT_PAGE_ACCESS, MSCC_PHY_PAGE_EXTENDED); __phy_write 508 drivers/net/phy/phy-core.c ret = __phy_write(phydev, regnum, new); __phy_write 818 drivers/net/phy/phy-core.c ret = __phy_write(phydev, regnum, val); __phy_write 63 drivers/net/phy/realtek.c return __phy_write(phydev, RTL821x_PAGE_SELECT, page); __phy_write 247 drivers/net/phy/realtek.c ret = __phy_write(phydev, RTL821x_EXT_PAGE_SELECT, 0xa4); __phy_write 316 drivers/net/phy/realtek.c ret = __phy_write(phydev, 0x10, val); __phy_write 359 drivers/net/phy/realtek.c ret = __phy_write(phydev, 0x12, val); __phy_write 123 drivers/net/phy/vitesse.c return __phy_write(phydev, VSC73XX_EXT_PAGE_ACCESS, page);