__offset_STAGE    353 drivers/gpu/drm/msm/disp/mdp4/mdp4.xml.h static inline uint32_t REG_MDP4_OVLP_STAGE(uint32_t i0, uint32_t i1) { return 0x00000000 + __offset_OVLP(i0) + __offset_STAGE(i1); }
__offset_STAGE    355 drivers/gpu/drm/msm/disp/mdp4/mdp4.xml.h static inline uint32_t REG_MDP4_OVLP_STAGE_OP(uint32_t i0, uint32_t i1) { return 0x00000000 + __offset_OVLP(i0) + __offset_STAGE(i1); }
__offset_STAGE    375 drivers/gpu/drm/msm/disp/mdp4/mdp4.xml.h static inline uint32_t REG_MDP4_OVLP_STAGE_FG_ALPHA(uint32_t i0, uint32_t i1) { return 0x00000004 + __offset_OVLP(i0) + __offset_STAGE(i1); }
__offset_STAGE    377 drivers/gpu/drm/msm/disp/mdp4/mdp4.xml.h static inline uint32_t REG_MDP4_OVLP_STAGE_BG_ALPHA(uint32_t i0, uint32_t i1) { return 0x00000008 + __offset_OVLP(i0) + __offset_STAGE(i1); }
__offset_STAGE    379 drivers/gpu/drm/msm/disp/mdp4/mdp4.xml.h static inline uint32_t REG_MDP4_OVLP_STAGE_TRANSP_LOW0(uint32_t i0, uint32_t i1) { return 0x0000000c + __offset_OVLP(i0) + __offset_STAGE(i1); }
__offset_STAGE    381 drivers/gpu/drm/msm/disp/mdp4/mdp4.xml.h static inline uint32_t REG_MDP4_OVLP_STAGE_TRANSP_LOW1(uint32_t i0, uint32_t i1) { return 0x00000010 + __offset_OVLP(i0) + __offset_STAGE(i1); }
__offset_STAGE    383 drivers/gpu/drm/msm/disp/mdp4/mdp4.xml.h static inline uint32_t REG_MDP4_OVLP_STAGE_TRANSP_HIGH0(uint32_t i0, uint32_t i1) { return 0x00000014 + __offset_OVLP(i0) + __offset_STAGE(i1); }
__offset_STAGE    385 drivers/gpu/drm/msm/disp/mdp4/mdp4.xml.h static inline uint32_t REG_MDP4_OVLP_STAGE_TRANSP_HIGH1(uint32_t i0, uint32_t i1) { return 0x00000018 + __offset_OVLP(i0) + __offset_STAGE(i1); }