__emit_inst        95 arch/arm64/include/asm/sysreg.h #define SET_PSTATE_PAN(x)		__emit_inst(0xd500401f | PSTATE_PAN | ((!!x) << PSTATE_Imm_shift))
__emit_inst        96 arch/arm64/include/asm/sysreg.h #define SET_PSTATE_UAO(x)		__emit_inst(0xd500401f | PSTATE_UAO | ((!!x) << PSTATE_Imm_shift))
__emit_inst        97 arch/arm64/include/asm/sysreg.h #define SET_PSTATE_SSBS(x)		__emit_inst(0xd500401f | PSTATE_SSBS | ((!!x) << PSTATE_Imm_shift))
__emit_inst       100 arch/arm64/include/asm/sysreg.h 	__emit_inst(0xd5000000 | sys_insn(0, 3, 3, (CRm), (op2)) | ((Rt) & 0x1f))
__emit_inst       751 arch/arm64/include/asm/sysreg.h 	 __emit_inst(0xd5200000|(\sreg)|(.L__reg_num_\rt))
__emit_inst       755 arch/arm64/include/asm/sysreg.h 	__emit_inst(0xd5000000|(\sreg)|(.L__reg_num_\rt))
__emit_inst       772 arch/arm64/include/asm/sysreg.h 	__emit_inst(0xd5200000|(\\sreg)|(.L__reg_num_\\rt))	\
__emit_inst       778 arch/arm64/include/asm/sysreg.h 	__emit_inst(0xd5000000|(\\sreg)|(.L__reg_num_\\rt))	\