__cvmx_bootmem_phy_free  709 arch/mips/cavium-octeon/executive/cvmx-bootmem.c 		__cvmx_bootmem_phy_free(named_block_ptr->base_addr,
__cvmx_bootmem_phy_free  135 arch/mips/cavium-octeon/setup.c 		__cvmx_bootmem_phy_free(addr,
__cvmx_bootmem_phy_free  141 arch/mips/cavium-octeon/setup.c 	__cvmx_bootmem_phy_free(addr,
__cvmx_bootmem_phy_free  148 arch/mips/cavium-octeon/setup.c 		__cvmx_bootmem_phy_free(OCTEON_DDR1_BASE, OCTEON_DDR1_SIZE, 0);
__cvmx_bootmem_phy_free  149 arch/mips/cavium-octeon/setup.c 		__cvmx_bootmem_phy_free(OCTEON_DDR2_BASE,
__cvmx_bootmem_phy_free  152 arch/mips/cavium-octeon/setup.c 		__cvmx_bootmem_phy_free(OCTEON_DDR1_BASE, mem_size, 0);
__cvmx_bootmem_phy_free  321 arch/mips/include/asm/octeon/cvmx-bootmem.h int __cvmx_bootmem_phy_free(uint64_t phy_addr, uint64_t size, uint32_t flags);