BRIDGE_VIRT_BASE 14 arch/arm/mach-dove/bridge-regs.h #define CPU_CONFIG (BRIDGE_VIRT_BASE + 0x0000) BRIDGE_VIRT_BASE 16 arch/arm/mach-dove/bridge-regs.h #define CPU_CONTROL (BRIDGE_VIRT_BASE + 0x0104) BRIDGE_VIRT_BASE 21 arch/arm/mach-dove/bridge-regs.h #define RSTOUTn_MASK (BRIDGE_VIRT_BASE + 0x0108) BRIDGE_VIRT_BASE 25 arch/arm/mach-dove/bridge-regs.h #define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE + 0x010c) BRIDGE_VIRT_BASE 28 arch/arm/mach-dove/bridge-regs.h #define BRIDGE_CAUSE (BRIDGE_VIRT_BASE + 0x0110) BRIDGE_VIRT_BASE 31 arch/arm/mach-dove/bridge-regs.h #define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE + 0x0200) BRIDGE_VIRT_BASE 50 arch/arm/mach-dove/bridge-regs.h #define POWER_MANAGEMENT (BRIDGE_VIRT_BASE + 0x011c) BRIDGE_VIRT_BASE 52 arch/arm/mach-dove/bridge-regs.h #define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE + 0x0300) BRIDGE_VIRT_BASE 256 arch/arm/mach-dove/common.c orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR, BRIDGE_VIRT_BASE 12 arch/arm/mach-mv78xx0/bridge-regs.h #define CPU_CONTROL (BRIDGE_VIRT_BASE + 0x0104) BRIDGE_VIRT_BASE 15 arch/arm/mach-mv78xx0/bridge-regs.h #define RSTOUTn_MASK (BRIDGE_VIRT_BASE + 0x0108) BRIDGE_VIRT_BASE 19 arch/arm/mach-mv78xx0/bridge-regs.h #define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE + 0x010c) BRIDGE_VIRT_BASE 24 arch/arm/mach-mv78xx0/bridge-regs.h #define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE + 0x0200) BRIDGE_VIRT_BASE 32 arch/arm/mach-mv78xx0/bridge-regs.h #define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE + 0x0300) BRIDGE_VIRT_BASE 344 arch/arm/mach-mv78xx0/common.c orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,