_PORT 237 drivers/gpu/drm/i915/i915_reg.h #define _MMIO_PORT(port, a, b) _MMIO(_PORT(port, a, b)) _PORT 1341 drivers/gpu/drm/i915/i915_reg.h #define VLV_PCS_DW0(ch) _PORT(ch, _VLV_PCS_DW0_CH0, _VLV_PCS_DW0_CH1) _PORT 1347 drivers/gpu/drm/i915/i915_reg.h #define VLV_PCS01_DW0(ch) _PORT(ch, _VLV_PCS01_DW0_CH0, _VLV_PCS01_DW0_CH1) _PORT 1348 drivers/gpu/drm/i915/i915_reg.h #define VLV_PCS23_DW0(ch) _PORT(ch, _VLV_PCS23_DW0_CH0, _VLV_PCS23_DW0_CH1) _PORT 1357 drivers/gpu/drm/i915/i915_reg.h #define VLV_PCS_DW1(ch) _PORT(ch, _VLV_PCS_DW1_CH0, _VLV_PCS_DW1_CH1) _PORT 1363 drivers/gpu/drm/i915/i915_reg.h #define VLV_PCS01_DW1(ch) _PORT(ch, _VLV_PCS01_DW1_CH0, _VLV_PCS01_DW1_CH1) _PORT 1364 drivers/gpu/drm/i915/i915_reg.h #define VLV_PCS23_DW1(ch) _PORT(ch, _VLV_PCS23_DW1_CH0, _VLV_PCS23_DW1_CH1) _PORT 1370 drivers/gpu/drm/i915/i915_reg.h #define VLV_PCS_DW8(ch) _PORT(ch, _VLV_PCS_DW8_CH0, _VLV_PCS_DW8_CH1) _PORT 1376 drivers/gpu/drm/i915/i915_reg.h #define VLV_PCS01_DW8(port) _PORT(port, _VLV_PCS01_DW8_CH0, _VLV_PCS01_DW8_CH1) _PORT 1377 drivers/gpu/drm/i915/i915_reg.h #define VLV_PCS23_DW8(port) _PORT(port, _VLV_PCS23_DW8_CH0, _VLV_PCS23_DW8_CH1) _PORT 1387 drivers/gpu/drm/i915/i915_reg.h #define VLV_PCS_DW9(ch) _PORT(ch, _VLV_PCS_DW9_CH0, _VLV_PCS_DW9_CH1) _PORT 1393 drivers/gpu/drm/i915/i915_reg.h #define VLV_PCS01_DW9(ch) _PORT(ch, _VLV_PCS01_DW9_CH0, _VLV_PCS01_DW9_CH1) _PORT 1394 drivers/gpu/drm/i915/i915_reg.h #define VLV_PCS23_DW9(ch) _PORT(ch, _VLV_PCS23_DW9_CH0, _VLV_PCS23_DW9_CH1) _PORT 1406 drivers/gpu/drm/i915/i915_reg.h #define CHV_PCS_DW10(ch) _PORT(ch, _CHV_PCS_DW10_CH0, _CHV_PCS_DW10_CH1) _PORT 1412 drivers/gpu/drm/i915/i915_reg.h #define VLV_PCS01_DW10(port) _PORT(port, _VLV_PCS01_DW10_CH0, _VLV_PCS01_DW10_CH1) _PORT 1413 drivers/gpu/drm/i915/i915_reg.h #define VLV_PCS23_DW10(port) _PORT(port, _VLV_PCS23_DW10_CH0, _VLV_PCS23_DW10_CH1) _PORT 1421 drivers/gpu/drm/i915/i915_reg.h #define VLV_PCS_DW11(ch) _PORT(ch, _VLV_PCS_DW11_CH0, _VLV_PCS_DW11_CH1) _PORT 1427 drivers/gpu/drm/i915/i915_reg.h #define VLV_PCS01_DW11(ch) _PORT(ch, _VLV_PCS01_DW11_CH0, _VLV_PCS01_DW11_CH1) _PORT 1428 drivers/gpu/drm/i915/i915_reg.h #define VLV_PCS23_DW11(ch) _PORT(ch, _VLV_PCS23_DW11_CH0, _VLV_PCS23_DW11_CH1) _PORT 1434 drivers/gpu/drm/i915/i915_reg.h #define VLV_PCS01_DW12(ch) _PORT(ch, _VLV_PCS01_DW12_CH0, _VLV_PCS01_DW12_CH1) _PORT 1435 drivers/gpu/drm/i915/i915_reg.h #define VLV_PCS23_DW12(ch) _PORT(ch, _VLV_PCS23_DW12_CH0, _VLV_PCS23_DW12_CH1) _PORT 1444 drivers/gpu/drm/i915/i915_reg.h #define VLV_PCS_DW12(ch) _PORT(ch, _VLV_PCS_DW12_CH0, _VLV_PCS_DW12_CH1) _PORT 1448 drivers/gpu/drm/i915/i915_reg.h #define VLV_PCS_DW14(ch) _PORT(ch, _VLV_PCS_DW14_CH0, _VLV_PCS_DW14_CH1) _PORT 1452 drivers/gpu/drm/i915/i915_reg.h #define VLV_PCS_DW23(ch) _PORT(ch, _VLV_PCS_DW23_CH0, _VLV_PCS_DW23_CH1) _PORT 1459 drivers/gpu/drm/i915/i915_reg.h #define VLV_TX_DW2(ch) _PORT(ch, _VLV_TX_DW2_CH0, _VLV_TX_DW2_CH1) _PORT 1467 drivers/gpu/drm/i915/i915_reg.h #define VLV_TX_DW3(ch) _PORT(ch, _VLV_TX_DW3_CH0, _VLV_TX_DW3_CH1) _PORT 1475 drivers/gpu/drm/i915/i915_reg.h #define VLV_TX_DW4(ch) _PORT(ch, _VLV_TX_DW4_CH0, _VLV_TX_DW4_CH1) _PORT 1479 drivers/gpu/drm/i915/i915_reg.h #define VLV_TX3_DW4(ch) _PORT(ch, _VLV_TX3_DW4_CH0, _VLV_TX3_DW4_CH1) _PORT 1484 drivers/gpu/drm/i915/i915_reg.h #define VLV_TX_DW5(ch) _PORT(ch, _VLV_TX_DW5_CH0, _VLV_TX_DW5_CH1) _PORT 1488 drivers/gpu/drm/i915/i915_reg.h #define VLV_TX_DW11(ch) _PORT(ch, _VLV_TX_DW11_CH0, _VLV_TX_DW11_CH1) _PORT 1492 drivers/gpu/drm/i915/i915_reg.h #define VLV_TX_DW14(ch) _PORT(ch, _VLV_TX_DW14_CH0, _VLV_TX_DW14_CH1) _PORT 1966 drivers/gpu/drm/i915/i915_reg.h _MMIO(_PORT((port) - PORT_C, ln0p1, ln0p2) + (ln) * ((ln1p1) - (ln0p1))) _PORT 2150 drivers/gpu/drm/i915/i915_reg.h _MMIO(_PORT(tc_port, MG_MISC_SUS0_PORT1, MG_MISC_SUS0_PORT2)) _PORT 5538 drivers/gpu/drm/i915/i915_reg.h #define DP_AUX_CH_DATA(aux_ch, i) _MMIO(_PORT(aux_ch, _DPA_AUX_CH_DATA1, _DPB_AUX_CH_DATA1) + (i) * 4) /* 5 registers */ _PORT 8506 drivers/gpu/drm/i915/i915_reg.h #define PCH_DP_AUX_CH_DATA(aux_ch, i) _MMIO(_PORT((aux_ch) - AUX_CH_B, _PCH_DPB_AUX_CH_DATA1, _PCH_DPC_AUX_CH_DATA1) + (i) * 4) /* 5 registers */ _PORT 9486 drivers/gpu/drm/i915/i915_reg.h #define DDI_BUF_TRANS_LO(port, i) _MMIO(_PORT(port, _DDI_BUF_TRANS_A, _DDI_BUF_TRANS_B) + (i) * 8) _PORT 9488 drivers/gpu/drm/i915/i915_reg.h #define DDI_BUF_TRANS_HI(port, i) _MMIO(_PORT(port, _DDI_BUF_TRANS_A, _DDI_BUF_TRANS_B) + (i) * 8 + 4) _PORT 33 drivers/pinctrl/sh-pfc/pfc-r8a7740.c IRQ##irq##_PORT##pin##_MARK, \