_PIPE 5585 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_FIELD15(GC, 0, CP_ME##me##_PIPE##pipe##_INT_CNTL,\ _PIPE 5589 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_FIELD15(GC, 0, CP_ME##me##_PIPE##pipe##_INT_CNTL,\ _PIPE 1324 drivers/gpu/drm/gma500/psb_intel_reg.h #define SB_M(pipe) _PIPE(pipe, _SB_M_A, _SB_M_B) _PIPE 1330 drivers/gpu/drm/gma500/psb_intel_reg.h #define SB_N_VCO(pipe) _PIPE(pipe, _SB_N_VCO_A, _SB_N_VCO_B) _PIPE 1349 drivers/gpu/drm/gma500/psb_intel_reg.h #define SB_REF_SFR(pipe) _PIPE(pipe, _SB_REF_A, _SB_REF_B) _PIPE 1353 drivers/gpu/drm/gma500/psb_intel_reg.h #define SB_P(pipe) _PIPE(pipe, _SB_P_A, _SB_P_B) _PIPE 1523 drivers/gpu/drm/gma500/psb_intel_reg.h #define PIPE_GMCH_DATA_M(pipe) _PIPE(pipe, _PIPEA_GMCH_DATA_M, _PIPEB_GMCH_DATA_M) _PIPE 1524 drivers/gpu/drm/gma500/psb_intel_reg.h #define PIPE_GMCH_DATA_N(pipe) _PIPE(pipe, _PIPEA_GMCH_DATA_N, _PIPEB_GMCH_DATA_N) _PIPE 1525 drivers/gpu/drm/gma500/psb_intel_reg.h #define PIPE_DP_LINK_M(pipe) _PIPE(pipe, _PIPEA_DP_LINK_M, _PIPEB_DP_LINK_M) _PIPE 1526 drivers/gpu/drm/gma500/psb_intel_reg.h #define PIPE_DP_LINK_N(pipe) _PIPE(pipe, _PIPEA_DP_LINK_N, _PIPEB_DP_LINK_N) _PIPE 58 drivers/gpu/drm/i915/gvt/reg.h #define VGT_SPRSTRIDE(pipe) _PIPE(pipe, _SPRA_STRIDE, _PLANE_STRIDE_2_B) _PIPE 234 drivers/gpu/drm/i915/i915_reg.h #define _MMIO_PIPE(pipe, a, b) _MMIO(_PIPE(pipe, a, b)) _PIPE 1292 drivers/gpu/drm/i915/i915_reg.h #define VLV_PLL_DW3(ch) _PIPE(ch, _VLV_PLL_DW3_CH0, _VLV_PLL_DW3_CH1) _PIPE 1303 drivers/gpu/drm/i915/i915_reg.h #define VLV_PLL_DW5(ch) _PIPE(ch, _VLV_PLL_DW5_CH0, _VLV_PLL_DW5_CH1) _PIPE 1307 drivers/gpu/drm/i915/i915_reg.h #define VLV_PLL_DW7(ch) _PIPE(ch, _VLV_PLL_DW7_CH0, _VLV_PLL_DW7_CH1) _PIPE 1311 drivers/gpu/drm/i915/i915_reg.h #define VLV_PLL_DW8(ch) _PIPE(ch, _VLV_PLL_DW8_CH0, _VLV_PLL_DW8_CH1) _PIPE 1316 drivers/gpu/drm/i915/i915_reg.h #define VLV_PLL_DW9(ch) _PIPE(ch, _VLV_PLL_DW9_CH0, _VLV_PLL_DW9_CH1) _PIPE 1320 drivers/gpu/drm/i915/i915_reg.h #define VLV_PLL_DW10(ch) _PIPE(ch, _VLV_PLL_DW10_CH0, _VLV_PLL_DW10_CH1) _PIPE 1324 drivers/gpu/drm/i915/i915_reg.h #define VLV_PLL_DW11(ch) _PIPE(ch, _VLV_PLL_DW11_CH0, _VLV_PLL_DW11_CH1) _PIPE 1497 drivers/gpu/drm/i915/i915_reg.h #define CHV_PLL_DW0(ch) _PIPE(ch, _CHV_PLL_DW0_CH0, _CHV_PLL_DW0_CH1) _PIPE 1503 drivers/gpu/drm/i915/i915_reg.h #define CHV_PLL_DW1(ch) _PIPE(ch, _CHV_PLL_DW1_CH0, _CHV_PLL_DW1_CH1) _PIPE 1507 drivers/gpu/drm/i915/i915_reg.h #define CHV_PLL_DW2(ch) _PIPE(ch, _CHV_PLL_DW2_CH0, _CHV_PLL_DW2_CH1) _PIPE 1516 drivers/gpu/drm/i915/i915_reg.h #define CHV_PLL_DW3(ch) _PIPE(ch, _CHV_PLL_DW3_CH0, _CHV_PLL_DW3_CH1) _PIPE 1523 drivers/gpu/drm/i915/i915_reg.h #define CHV_PLL_DW6(ch) _PIPE(ch, _CHV_PLL_DW6_CH0, _CHV_PLL_DW6_CH1) _PIPE 1529 drivers/gpu/drm/i915/i915_reg.h #define CHV_PLL_DW8(ch) _PIPE(ch, _CHV_PLL_DW8_CH0, _CHV_PLL_DW8_CH1) _PIPE 1536 drivers/gpu/drm/i915/i915_reg.h #define CHV_PLL_DW9(ch) _PIPE(ch, _CHV_PLL_DW9_CH0, _CHV_PLL_DW9_CH1) _PIPE 1562 drivers/gpu/drm/i915/i915_reg.h #define CHV_CMN_DW13(ch) _PIPE(ch, _CHV_CMN_DW13_CH0, _CHV_CMN_DW0_CH1) _PIPE 1576 drivers/gpu/drm/i915/i915_reg.h #define CHV_CMN_DW14(ch) _PIPE(ch, _CHV_CMN_DW14_CH0, _CHV_CMN_DW1_CH1) _PIPE 1585 drivers/gpu/drm/i915/i915_reg.h #define CHV_CMN_DW19(ch) _PIPE(ch, _CHV_CMN_DW19_CH0, _CHV_CMN_DW6_CH1) _PIPE 1630 drivers/gpu/drm/i915/i915_reg.h (BXT_PHY_BASE(phy) + _PIPE((ch), (reg_ch0) - _BXT_PHY0_BASE, \ _PIPE 6062 drivers/gpu/drm/i915/i915_reg.h #define _CUR_WM_0(pipe) _PIPE(pipe, _CUR_WM_A_0, _CUR_WM_B_0) _PIPE 6066 drivers/gpu/drm/i915/i915_reg.h #define _PLANE_WM_1(pipe) _PIPE(pipe, _PLANE_WM_1_A_0, _PLANE_WM_1_B_0) _PIPE 6067 drivers/gpu/drm/i915/i915_reg.h #define _PLANE_WM_2(pipe) _PIPE(pipe, _PLANE_WM_2_A_0, _PLANE_WM_2_B_0) _PIPE 6073 drivers/gpu/drm/i915/i915_reg.h _PIPE(pipe, _PLANE_WM_TRANS_1_A_0, _PLANE_WM_TRANS_1_B_0) _PIPE 6075 drivers/gpu/drm/i915/i915_reg.h _PIPE(pipe, _PLANE_WM_TRANS_2_A_0, _PLANE_WM_TRANS_2_B_0) _PIPE 6417 drivers/gpu/drm/i915/i915_reg.h #define DVSGAMC_G4X(pipe, i) _MMIO(_PIPE(pipe, _DVSAGAMC_G4X, _DVSBGAMC_G4X) + (5 - (i)) * 4) /* 6 x u0.8 */ _PIPE 6418 drivers/gpu/drm/i915/i915_reg.h #define DVSGAMC_ILK(pipe, i) _MMIO(_PIPE(pipe, _DVSAGAMC_ILK, _DVSBGAMC_ILK) + (i) * 4) /* 16 x u0.10 */ _PIPE 6419 drivers/gpu/drm/i915/i915_reg.h #define DVSGAMCMAX_ILK(pipe, i) _MMIO(_PIPE(pipe, _DVSAGAMCMAX_ILK, _DVSBGAMCMAX_ILK) + (i) * 4) /* 3 x u1.10 */ _PIPE 6499 drivers/gpu/drm/i915/i915_reg.h #define SPRGAMC(pipe, i) _MMIO(_PIPE(pipe, _SPRA_GAMC, _SPRB_GAMC) + (i) * 4) /* 16 x u0.10 */ _PIPE 6500 drivers/gpu/drm/i915/i915_reg.h #define SPRGAMC16(pipe, i) _MMIO(_PIPE(pipe, _SPRA_GAMC16, _SPRB_GAMC16) + (i) * 4) /* 3 x u1.10 */ _PIPE 6501 drivers/gpu/drm/i915/i915_reg.h #define SPRGAMC17(pipe, i) _MMIO(_PIPE(pipe, _SPRA_GAMC17, _SPRB_GAMC17) + (i) * 4) /* 3 x u2.10 */ _PIPE 6562 drivers/gpu/drm/i915/i915_reg.h _PIPE((pipe) * 2 + (plane_id) - PLANE_SPRITE0, (reg_a), (reg_b)) _PIPE 6750 drivers/gpu/drm/i915/i915_reg.h _PIPE(pipe, _PLANE_INPUT_CSC_RY_GY_1_A, \ _PIPE 6753 drivers/gpu/drm/i915/i915_reg.h _PIPE(pipe, _PLANE_INPUT_CSC_RY_GY_2_A, \ _PIPE 6767 drivers/gpu/drm/i915/i915_reg.h _PIPE(pipe, _PLANE_INPUT_CSC_PREOFF_HI_1_A, \ _PIPE 6770 drivers/gpu/drm/i915/i915_reg.h _PIPE(pipe, _PLANE_INPUT_CSC_PREOFF_HI_2_A, \ _PIPE 6783 drivers/gpu/drm/i915/i915_reg.h _PIPE(pipe, _PLANE_INPUT_CSC_POSTOFF_HI_1_A, \ _PIPE 6786 drivers/gpu/drm/i915/i915_reg.h _PIPE(pipe, _PLANE_INPUT_CSC_POSTOFF_HI_2_A, \ _PIPE 6795 drivers/gpu/drm/i915/i915_reg.h #define _PLANE_CTL_1(pipe) _PIPE(pipe, _PLANE_CTL_1_A, _PLANE_CTL_1_B) _PIPE 6796 drivers/gpu/drm/i915/i915_reg.h #define _PLANE_CTL_2(pipe) _PIPE(pipe, _PLANE_CTL_2_A, _PLANE_CTL_2_B) _PIPE 6797 drivers/gpu/drm/i915/i915_reg.h #define _PLANE_CTL_3(pipe) _PIPE(pipe, _PLANE_CTL_3_A, _PLANE_CTL_3_B) _PIPE 6805 drivers/gpu/drm/i915/i915_reg.h _PIPE(pipe, _PLANE_STRIDE_1_A, _PLANE_STRIDE_1_B) _PIPE 6807 drivers/gpu/drm/i915/i915_reg.h _PIPE(pipe, _PLANE_STRIDE_2_A, _PLANE_STRIDE_2_B) _PIPE 6809 drivers/gpu/drm/i915/i915_reg.h _PIPE(pipe, _PLANE_STRIDE_3_A, _PLANE_STRIDE_3_B) _PIPE 6816 drivers/gpu/drm/i915/i915_reg.h #define _PLANE_POS_1(pipe) _PIPE(pipe, _PLANE_POS_1_A, _PLANE_POS_1_B) _PIPE 6817 drivers/gpu/drm/i915/i915_reg.h #define _PLANE_POS_2(pipe) _PIPE(pipe, _PLANE_POS_2_A, _PLANE_POS_2_B) _PIPE 6818 drivers/gpu/drm/i915/i915_reg.h #define _PLANE_POS_3(pipe) _PIPE(pipe, _PLANE_POS_3_A, _PLANE_POS_3_B) _PIPE 6825 drivers/gpu/drm/i915/i915_reg.h #define _PLANE_SIZE_1(pipe) _PIPE(pipe, _PLANE_SIZE_1_A, _PLANE_SIZE_1_B) _PIPE 6826 drivers/gpu/drm/i915/i915_reg.h #define _PLANE_SIZE_2(pipe) _PIPE(pipe, _PLANE_SIZE_2_A, _PLANE_SIZE_2_B) _PIPE 6827 drivers/gpu/drm/i915/i915_reg.h #define _PLANE_SIZE_3(pipe) _PIPE(pipe, _PLANE_SIZE_3_A, _PLANE_SIZE_3_B) _PIPE 6834 drivers/gpu/drm/i915/i915_reg.h #define _PLANE_SURF_1(pipe) _PIPE(pipe, _PLANE_SURF_1_A, _PLANE_SURF_1_B) _PIPE 6835 drivers/gpu/drm/i915/i915_reg.h #define _PLANE_SURF_2(pipe) _PIPE(pipe, _PLANE_SURF_2_A, _PLANE_SURF_2_B) _PIPE 6836 drivers/gpu/drm/i915/i915_reg.h #define _PLANE_SURF_3(pipe) _PIPE(pipe, _PLANE_SURF_3_A, _PLANE_SURF_3_B) _PIPE 6842 drivers/gpu/drm/i915/i915_reg.h #define _PLANE_OFFSET_1(pipe) _PIPE(pipe, _PLANE_OFFSET_1_A, _PLANE_OFFSET_1_B) _PIPE 6843 drivers/gpu/drm/i915/i915_reg.h #define _PLANE_OFFSET_2(pipe) _PIPE(pipe, _PLANE_OFFSET_2_A, _PLANE_OFFSET_2_B) _PIPE 6849 drivers/gpu/drm/i915/i915_reg.h #define _PLANE_KEYVAL_1(pipe) _PIPE(pipe, _PLANE_KEYVAL_1_A, _PLANE_KEYVAL_1_B) _PIPE 6850 drivers/gpu/drm/i915/i915_reg.h #define _PLANE_KEYVAL_2(pipe) _PIPE(pipe, _PLANE_KEYVAL_2_A, _PLANE_KEYVAL_2_B) _PIPE 6856 drivers/gpu/drm/i915/i915_reg.h #define _PLANE_KEYMSK_1(pipe) _PIPE(pipe, _PLANE_KEYMSK_1_A, _PLANE_KEYMSK_1_B) _PIPE 6857 drivers/gpu/drm/i915/i915_reg.h #define _PLANE_KEYMSK_2(pipe) _PIPE(pipe, _PLANE_KEYMSK_2_A, _PLANE_KEYMSK_2_B) _PIPE 6863 drivers/gpu/drm/i915/i915_reg.h #define _PLANE_KEYMAX_1(pipe) _PIPE(pipe, _PLANE_KEYMAX_1_A, _PLANE_KEYMAX_1_B) _PIPE 6864 drivers/gpu/drm/i915/i915_reg.h #define _PLANE_KEYMAX_2(pipe) _PIPE(pipe, _PLANE_KEYMAX_2_A, _PLANE_KEYMAX_2_B) _PIPE 6873 drivers/gpu/drm/i915/i915_reg.h _PIPE(pipe, _PLANE_BUF_CFG_1_A, _PLANE_BUF_CFG_1_B) _PIPE 6875 drivers/gpu/drm/i915/i915_reg.h _PIPE(pipe, _PLANE_BUF_CFG_2_A, _PLANE_BUF_CFG_2_B) _PIPE 6882 drivers/gpu/drm/i915/i915_reg.h _PIPE(pipe, _PLANE_NV12_BUF_CFG_1_A, _PLANE_NV12_BUF_CFG_1_B) _PIPE 6884 drivers/gpu/drm/i915/i915_reg.h _PIPE(pipe, _PLANE_NV12_BUF_CFG_2_A, _PLANE_NV12_BUF_CFG_2_B) _PIPE 6891 drivers/gpu/drm/i915/i915_reg.h _PIPE(pipe, _PLANE_AUX_DIST_1_A, _PLANE_AUX_DIST_1_B) _PIPE 6893 drivers/gpu/drm/i915/i915_reg.h _PIPE(pipe, _PLANE_AUX_DIST_2_A, _PLANE_AUX_DIST_2_B) _PIPE 6900 drivers/gpu/drm/i915/i915_reg.h _PIPE(pipe, _PLANE_AUX_OFFSET_1_A, _PLANE_AUX_OFFSET_1_B) _PIPE 6902 drivers/gpu/drm/i915/i915_reg.h _PIPE(pipe, _PLANE_AUX_OFFSET_2_A, _PLANE_AUX_OFFSET_2_B) _PIPE 6909 drivers/gpu/drm/i915/i915_reg.h _PIPE(pipe, _PLANE_CUS_CTL_1_A, _PLANE_CUS_CTL_1_B) _PIPE 6911 drivers/gpu/drm/i915/i915_reg.h _PIPE(pipe, _PLANE_CUS_CTL_2_A, _PLANE_CUS_CTL_2_B) _PIPE 6919 drivers/gpu/drm/i915/i915_reg.h _PIPE(pipe, _PLANE_COLOR_CTL_1_A, _PLANE_COLOR_CTL_1_B) _PIPE 6921 drivers/gpu/drm/i915/i915_reg.h _PIPE(pipe, _PLANE_COLOR_CTL_2_A, _PLANE_COLOR_CTL_2_B) _PIPE 7186 drivers/gpu/drm/i915/i915_reg.h #define LGC_PALETTE(pipe, i) _MMIO(_PIPE(pipe, _LGC_PALETTE_A, _LGC_PALETTE_B) + (i) * 4) _PIPE 7191 drivers/gpu/drm/i915/i915_reg.h #define PREC_PALETTE(pipe, i) _MMIO(_PIPE(pipe, _PREC_PALETTE_A, _PREC_PALETTE_B) + (i) * 4) _PIPE 7195 drivers/gpu/drm/i915/i915_reg.h #define PREC_PIPEGCMAX(pipe, i) _MMIO(_PIPE(pipe, _PIPEAGCMAX, _PIPEBGCMAX) + (i) * 4) _PIPE 10256 drivers/gpu/drm/i915/i915_reg.h #define PREC_PAL_GC_MAX(pipe, i) _MMIO(_PIPE(pipe, _PAL_PREC_GC_MAX_A, _PAL_PREC_GC_MAX_B) + (i) * 4) _PIPE 10257 drivers/gpu/drm/i915/i915_reg.h #define PREC_PAL_EXT_GC_MAX(pipe, i) _MMIO(_PIPE(pipe, _PAL_PREC_EXT_GC_MAX_A, _PAL_PREC_EXT_GC_MAX_B) + (i) * 4) _PIPE 10258 drivers/gpu/drm/i915/i915_reg.h #define PREC_PAL_EXT2_GC_MAX(pipe, i) _MMIO(_PIPE(pipe, _PAL_PREC_EXT2_GC_MAX_A, _PAL_PREC_EXT2_GC_MAX_B) + (i) * 4) _PIPE 10314 drivers/gpu/drm/i915/i915_reg.h #define CGM_PIPE_DEGAMMA(pipe, i, w) _MMIO(_PIPE(pipe, _CGM_PIPE_A_DEGAMMA, _CGM_PIPE_B_DEGAMMA) + (i) * 8 + (w) * 4) _PIPE 10315 drivers/gpu/drm/i915/i915_reg.h #define CGM_PIPE_GAMMA(pipe, i, w) _MMIO(_PIPE(pipe, _CGM_PIPE_A_GAMMA, _CGM_PIPE_B_GAMMA) + (i) * 8 + (w) * 4)