_MMIO_PORT       1644 drivers/gpu/drm/i915/i915_reg.h #define BXT_PHY_CTL(port)		_MMIO_PORT(port, _BXT_PHY_CTL_DDI_A, \
_MMIO_PORT       1664 drivers/gpu/drm/i915/i915_reg.h #define BXT_PORT_PLL_ENABLE(port)	_MMIO_PORT(port, _PORT_PLL_A, _PORT_PLL_B)
_MMIO_PORT       5537 drivers/gpu/drm/i915/i915_reg.h #define DP_AUX_CH_CTL(aux_ch)	_MMIO_PORT(aux_ch, _DPA_AUX_CH_CTL, _DPB_AUX_CH_CTL)
_MMIO_PORT       8505 drivers/gpu/drm/i915/i915_reg.h #define PCH_DP_AUX_CH_CTL(aux_ch)		_MMIO_PORT((aux_ch) - AUX_CH_B, _PCH_DPB_AUX_CH_CTL, _PCH_DPC_AUX_CH_CTL)
_MMIO_PORT       9438 drivers/gpu/drm/i915/i915_reg.h #define DP_TP_CTL(port) _MMIO_PORT(port, _DP_TP_CTL_A, _DP_TP_CTL_B)
_MMIO_PORT       9458 drivers/gpu/drm/i915/i915_reg.h #define DP_TP_STATUS(port) _MMIO_PORT(port, _DP_TP_STATUS_A, _DP_TP_STATUS_B)
_MMIO_PORT       9471 drivers/gpu/drm/i915/i915_reg.h #define DDI_BUF_CTL(port) _MMIO_PORT(port, _DDI_BUF_CTL_A, _DDI_BUF_CTL_B)
_MMIO_PORT       9574 drivers/gpu/drm/i915/i915_reg.h #define PORT_CLK_SEL(port) _MMIO_PORT(port, _PORT_CLK_SEL_A, _PORT_CLK_SEL_B)
_MMIO_PORT       9768 drivers/gpu/drm/i915/i915_reg.h #define MG_PLL_ENABLE(tc_port)	_MMIO_PORT((tc_port), _MG_PLL1_ENABLE, \
_MMIO_PORT       9777 drivers/gpu/drm/i915/i915_reg.h #define MG_REFCLKIN_CTL(tc_port) _MMIO_PORT((tc_port), \
_MMIO_PORT       9789 drivers/gpu/drm/i915/i915_reg.h #define MG_CLKTOP2_CORECLKCTL1(tc_port) _MMIO_PORT((tc_port), \
_MMIO_PORT       9809 drivers/gpu/drm/i915/i915_reg.h #define MG_CLKTOP2_HSCLKCTL(tc_port) _MMIO_PORT((tc_port), \
_MMIO_PORT       9823 drivers/gpu/drm/i915/i915_reg.h #define MG_PLL_DIV0(tc_port) _MMIO_PORT((tc_port), _MG_PLL_DIV0_PORT1, \
_MMIO_PORT       9838 drivers/gpu/drm/i915/i915_reg.h #define MG_PLL_DIV1(tc_port) _MMIO_PORT((tc_port), _MG_PLL_DIV1_PORT1, \
_MMIO_PORT       9851 drivers/gpu/drm/i915/i915_reg.h #define MG_PLL_LF(tc_port) _MMIO_PORT((tc_port), _MG_PLL_LF_PORT1, \
_MMIO_PORT       9864 drivers/gpu/drm/i915/i915_reg.h #define MG_PLL_FRAC_LOCK(tc_port) _MMIO_PORT((tc_port), \
_MMIO_PORT       9878 drivers/gpu/drm/i915/i915_reg.h #define MG_PLL_SSC(tc_port) _MMIO_PORT((tc_port), _MG_PLL_SSC_PORT1, \
_MMIO_PORT       9898 drivers/gpu/drm/i915/i915_reg.h #define MG_PLL_BIAS(tc_port) _MMIO_PORT((tc_port), _MG_PLL_BIAS_PORT1, \
_MMIO_PORT       9910 drivers/gpu/drm/i915/i915_reg.h #define MG_PLL_TDC_COLDST_BIAS(tc_port) _MMIO_PORT((tc_port), \
_MMIO_PORT       10334 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSI_ESC_CLK_DIV(port)	_MMIO_PORT((port),	\
_MMIO_PORT       10339 drivers/gpu/drm/i915/i915_reg.h #define ICL_DPHY_ESC_CLK_DIV(port)	_MMIO_PORT((port),	\
_MMIO_PORT       10485 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSI_IO_MODECTL(port)	_MMIO_PORT(port,	\
_MMIO_PORT       10855 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSI_T_INIT_MASTER(port)	_MMIO_PORT(port,	\
_MMIO_PORT       10861 drivers/gpu/drm/i915/i915_reg.h #define DPHY_CLK_TIMING_PARAM(port)	_MMIO_PORT(port,	\
_MMIO_PORT       10866 drivers/gpu/drm/i915/i915_reg.h #define DSI_CLK_TIMING_PARAM(port)	_MMIO_PORT(port,	\
_MMIO_PORT       10892 drivers/gpu/drm/i915/i915_reg.h #define DPHY_DATA_TIMING_PARAM(port)	_MMIO_PORT(port,	\
_MMIO_PORT       10897 drivers/gpu/drm/i915/i915_reg.h #define DSI_DATA_TIMING_PARAM(port)	_MMIO_PORT(port,	\
_MMIO_PORT       10919 drivers/gpu/drm/i915/i915_reg.h #define DPHY_TA_TIMING_PARAM(port)	_MMIO_PORT(port,	\
_MMIO_PORT       10924 drivers/gpu/drm/i915/i915_reg.h #define DSI_TA_TIMING_PARAM(port)	_MMIO_PORT(port,	\
_MMIO_PORT       11232 drivers/gpu/drm/i915/i915_reg.h #define ICL_PHY_MISC(port)	_MMIO_PORT(port, _ICL_PHY_MISC_A, \