_MMIO_PIPE       1054 drivers/gpu/drm/i915/i915_reg.h #define GEN7_PIPE_DE_LOAD_SL(pipe) _MMIO_PIPE(pipe, _GEN7_PIPEA_DE_LOAD_SL, _GEN7_PIPEB_DE_LOAD_SL)
_MMIO_PIPE       2777 drivers/gpu/drm/i915/i915_reg.h #define PIPE_MBUS_DBOX_CTL(pipe)	_MMIO_PIPE(pipe, _PIPEA_MBUS_DBOX_CTL, \
_MMIO_PIPE       3401 drivers/gpu/drm/i915/i915_reg.h #define FP0(pipe) _MMIO_PIPE(pipe, _FPA0, _FPB0)
_MMIO_PIPE       3402 drivers/gpu/drm/i915/i915_reg.h #define FP1(pipe) _MMIO_PIPE(pipe, _FPA1, _FPB1)
_MMIO_PIPE       4038 drivers/gpu/drm/i915/i915_reg.h 	_MMIO_PIPE(pipe, _CLKGATE_DIS_PSL_A, _CLKGATE_DIS_PSL_B)
_MMIO_PIPE       4811 drivers/gpu/drm/i915/i915_reg.h #define VLV_BLC_PWM_CTL2(pipe) _MMIO_PIPE(pipe, _VLV_BLC_PWM_CTL2_A, \
_MMIO_PIPE       4816 drivers/gpu/drm/i915/i915_reg.h #define VLV_BLC_PWM_CTL(pipe) _MMIO_PIPE(pipe, _VLV_BLC_PWM_CTL_A, \
_MMIO_PIPE       4821 drivers/gpu/drm/i915/i915_reg.h #define VLV_BLC_HIST_CTL(pipe) _MMIO_PIPE(pipe, _VLV_BLC_HIST_CTL_A, \
_MMIO_PIPE       4908 drivers/gpu/drm/i915/i915_reg.h #define BXT_BLC_PWM_CTL(controller)    _MMIO_PIPE(controller,		\
_MMIO_PIPE       4910 drivers/gpu/drm/i915/i915_reg.h #define BXT_BLC_PWM_FREQ(controller)   _MMIO_PIPE(controller, \
_MMIO_PIPE       4912 drivers/gpu/drm/i915/i915_reg.h #define BXT_BLC_PWM_DUTY(controller)   _MMIO_PIPE(controller, \
_MMIO_PIPE       5616 drivers/gpu/drm/i915/i915_reg.h #define PIPE_DATA_M_G4X(pipe) _MMIO_PIPE(pipe, _PIPEA_DATA_M_G4X, _PIPEB_DATA_M_G4X)
_MMIO_PIPE       5617 drivers/gpu/drm/i915/i915_reg.h #define PIPE_DATA_N_G4X(pipe) _MMIO_PIPE(pipe, _PIPEA_DATA_N_G4X, _PIPEB_DATA_N_G4X)
_MMIO_PIPE       5618 drivers/gpu/drm/i915/i915_reg.h #define PIPE_LINK_M_G4X(pipe) _MMIO_PIPE(pipe, _PIPEA_LINK_M_G4X, _PIPEB_LINK_M_G4X)
_MMIO_PIPE       5619 drivers/gpu/drm/i915/i915_reg.h #define PIPE_LINK_N_G4X(pipe) _MMIO_PIPE(pipe, _PIPEA_LINK_N_G4X, _PIPEB_LINK_N_G4X)
_MMIO_PIPE       6064 drivers/gpu/drm/i915/i915_reg.h #define CUR_WM_TRANS(pipe) _MMIO_PIPE(pipe, _CUR_WM_TRANS_A_0, _CUR_WM_TRANS_B_0)
_MMIO_PIPE       6405 drivers/gpu/drm/i915/i915_reg.h #define DVSCNTR(pipe) _MMIO_PIPE(pipe, _DVSACNTR, _DVSBCNTR)
_MMIO_PIPE       6406 drivers/gpu/drm/i915/i915_reg.h #define DVSLINOFF(pipe) _MMIO_PIPE(pipe, _DVSALINOFF, _DVSBLINOFF)
_MMIO_PIPE       6407 drivers/gpu/drm/i915/i915_reg.h #define DVSSTRIDE(pipe) _MMIO_PIPE(pipe, _DVSASTRIDE, _DVSBSTRIDE)
_MMIO_PIPE       6408 drivers/gpu/drm/i915/i915_reg.h #define DVSPOS(pipe) _MMIO_PIPE(pipe, _DVSAPOS, _DVSBPOS)
_MMIO_PIPE       6409 drivers/gpu/drm/i915/i915_reg.h #define DVSSURF(pipe) _MMIO_PIPE(pipe, _DVSASURF, _DVSBSURF)
_MMIO_PIPE       6410 drivers/gpu/drm/i915/i915_reg.h #define DVSKEYMAX(pipe) _MMIO_PIPE(pipe, _DVSAKEYMAXVAL, _DVSBKEYMAXVAL)
_MMIO_PIPE       6411 drivers/gpu/drm/i915/i915_reg.h #define DVSSIZE(pipe) _MMIO_PIPE(pipe, _DVSASIZE, _DVSBSIZE)
_MMIO_PIPE       6412 drivers/gpu/drm/i915/i915_reg.h #define DVSSCALE(pipe) _MMIO_PIPE(pipe, _DVSASCALE, _DVSBSCALE)
_MMIO_PIPE       6413 drivers/gpu/drm/i915/i915_reg.h #define DVSTILEOFF(pipe) _MMIO_PIPE(pipe, _DVSATILEOFF, _DVSBTILEOFF)
_MMIO_PIPE       6414 drivers/gpu/drm/i915/i915_reg.h #define DVSKEYVAL(pipe) _MMIO_PIPE(pipe, _DVSAKEYVAL, _DVSBKEYVAL)
_MMIO_PIPE       6415 drivers/gpu/drm/i915/i915_reg.h #define DVSKEYMSK(pipe) _MMIO_PIPE(pipe, _DVSAKEYMSK, _DVSBKEYMSK)
_MMIO_PIPE       6416 drivers/gpu/drm/i915/i915_reg.h #define DVSSURFLIVE(pipe) _MMIO_PIPE(pipe, _DVSASURFLIVE, _DVSBSURFLIVE)
_MMIO_PIPE       6487 drivers/gpu/drm/i915/i915_reg.h #define SPRCTL(pipe) _MMIO_PIPE(pipe, _SPRA_CTL, _SPRB_CTL)
_MMIO_PIPE       6488 drivers/gpu/drm/i915/i915_reg.h #define SPRLINOFF(pipe) _MMIO_PIPE(pipe, _SPRA_LINOFF, _SPRB_LINOFF)
_MMIO_PIPE       6489 drivers/gpu/drm/i915/i915_reg.h #define SPRSTRIDE(pipe) _MMIO_PIPE(pipe, _SPRA_STRIDE, _SPRB_STRIDE)
_MMIO_PIPE       6490 drivers/gpu/drm/i915/i915_reg.h #define SPRPOS(pipe) _MMIO_PIPE(pipe, _SPRA_POS, _SPRB_POS)
_MMIO_PIPE       6491 drivers/gpu/drm/i915/i915_reg.h #define SPRSIZE(pipe) _MMIO_PIPE(pipe, _SPRA_SIZE, _SPRB_SIZE)
_MMIO_PIPE       6492 drivers/gpu/drm/i915/i915_reg.h #define SPRKEYVAL(pipe) _MMIO_PIPE(pipe, _SPRA_KEYVAL, _SPRB_KEYVAL)
_MMIO_PIPE       6493 drivers/gpu/drm/i915/i915_reg.h #define SPRKEYMSK(pipe) _MMIO_PIPE(pipe, _SPRA_KEYMSK, _SPRB_KEYMSK)
_MMIO_PIPE       6494 drivers/gpu/drm/i915/i915_reg.h #define SPRSURF(pipe) _MMIO_PIPE(pipe, _SPRA_SURF, _SPRB_SURF)
_MMIO_PIPE       6495 drivers/gpu/drm/i915/i915_reg.h #define SPRKEYMAX(pipe) _MMIO_PIPE(pipe, _SPRA_KEYMAX, _SPRB_KEYMAX)
_MMIO_PIPE       6496 drivers/gpu/drm/i915/i915_reg.h #define SPRTILEOFF(pipe) _MMIO_PIPE(pipe, _SPRA_TILEOFF, _SPRB_TILEOFF)
_MMIO_PIPE       6497 drivers/gpu/drm/i915/i915_reg.h #define SPROFFSET(pipe) _MMIO_PIPE(pipe, _SPRA_OFFSET, _SPRB_OFFSET)
_MMIO_PIPE       6498 drivers/gpu/drm/i915/i915_reg.h #define SPRSCALE(pipe) _MMIO_PIPE(pipe, _SPRA_SCALE, _SPRB_SCALE)
_MMIO_PIPE       6502 drivers/gpu/drm/i915/i915_reg.h #define SPRSURFLIVE(pipe) _MMIO_PIPE(pipe, _SPRA_SURFLIVE, _SPRB_SURFLIVE)
_MMIO_PIPE       6928 drivers/gpu/drm/i915/i915_reg.h #define CUR_BUF_CFG(pipe)	_MMIO_PIPE(pipe, _CUR_BUF_CFG_A, _CUR_BUF_CFG_B)
_MMIO_PIPE       7041 drivers/gpu/drm/i915/i915_reg.h #define PF_CTL(pipe)		_MMIO_PIPE(pipe, _PFA_CTL_1, _PFB_CTL_1)
_MMIO_PIPE       7042 drivers/gpu/drm/i915/i915_reg.h #define PF_WIN_SZ(pipe)		_MMIO_PIPE(pipe, _PFA_WIN_SZ, _PFB_WIN_SZ)
_MMIO_PIPE       7043 drivers/gpu/drm/i915/i915_reg.h #define PF_WIN_POS(pipe)	_MMIO_PIPE(pipe, _PFA_WIN_POS, _PFB_WIN_POS)
_MMIO_PIPE       7044 drivers/gpu/drm/i915/i915_reg.h #define PF_VSCALE(pipe)		_MMIO_PIPE(pipe, _PFA_VSCALE, _PFB_VSCALE)
_MMIO_PIPE       7045 drivers/gpu/drm/i915/i915_reg.h #define PF_HSCALE(pipe)		_MMIO_PIPE(pipe, _PFA_HSCALE, _PFB_HSCALE)
_MMIO_PIPE       7055 drivers/gpu/drm/i915/i915_reg.h #define PS_CTL(pipe)		_MMIO_PIPE(pipe, _PSA_CTL, _PSB_CTL)
_MMIO_PIPE       7056 drivers/gpu/drm/i915/i915_reg.h #define PS_WIN_SZ(pipe)		_MMIO_PIPE(pipe, _PSA_WIN_SZ, _PSB_WIN_SZ)
_MMIO_PIPE       7057 drivers/gpu/drm/i915/i915_reg.h #define PS_WIN_POS(pipe)	_MMIO_PIPE(pipe, _PSA_WIN_POS, _PSB_WIN_POS)
_MMIO_PIPE       7155 drivers/gpu/drm/i915/i915_reg.h #define SKL_PS_CTRL(pipe, id) _MMIO_PIPE(pipe,        \
_MMIO_PIPE       7158 drivers/gpu/drm/i915/i915_reg.h #define SKL_PS_PWR_GATE(pipe, id) _MMIO_PIPE(pipe,    \
_MMIO_PIPE       7161 drivers/gpu/drm/i915/i915_reg.h #define SKL_PS_WIN_POS(pipe, id) _MMIO_PIPE(pipe,     \
_MMIO_PIPE       7164 drivers/gpu/drm/i915/i915_reg.h #define SKL_PS_WIN_SZ(pipe, id)  _MMIO_PIPE(pipe,     \
_MMIO_PIPE       7167 drivers/gpu/drm/i915/i915_reg.h #define SKL_PS_VSCALE(pipe, id)  _MMIO_PIPE(pipe,     \
_MMIO_PIPE       7170 drivers/gpu/drm/i915/i915_reg.h #define SKL_PS_HSCALE(pipe, id)  _MMIO_PIPE(pipe,     \
_MMIO_PIPE       7173 drivers/gpu/drm/i915/i915_reg.h #define SKL_PS_VPHASE(pipe, id)  _MMIO_PIPE(pipe,     \
_MMIO_PIPE       7176 drivers/gpu/drm/i915/i915_reg.h #define SKL_PS_HPHASE(pipe, id)  _MMIO_PIPE(pipe,     \
_MMIO_PIPE       7179 drivers/gpu/drm/i915/i915_reg.h #define SKL_PS_ECC_STAT(pipe, id)  _MMIO_PIPE(pipe,     \
_MMIO_PIPE       7199 drivers/gpu/drm/i915/i915_reg.h #define GAMMA_MODE(pipe) _MMIO_PIPE(pipe, _GAMMA_MODE_A, _GAMMA_MODE_B)
_MMIO_PIPE       7565 drivers/gpu/drm/i915/i915_reg.h #define CHICKEN_PIPESL_1(pipe) _MMIO_PIPE(pipe, _CHICKEN_PIPESL_1_A, _CHICKEN_PIPESL_1_B)
_MMIO_PIPE       7738 drivers/gpu/drm/i915/i915_reg.h #define PIPE_CHICKEN(pipe)			_MMIO_PIPE(pipe, _PIPEA_CHICKEN,\
_MMIO_PIPE       7962 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC0_RC_RANGE_PARAMETERS_0(pipe)		_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       7965 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC0_RC_RANGE_PARAMETERS_0_UDW(pipe)	_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       7968 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC1_RC_RANGE_PARAMETERS_0(pipe)		_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       7971 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC1_RC_RANGE_PARAMETERS_0_UDW(pipe)	_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       7990 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC0_RC_RANGE_PARAMETERS_1(pipe)		_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       7993 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC0_RC_RANGE_PARAMETERS_1_UDW(pipe)	_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       7996 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC1_RC_RANGE_PARAMETERS_1(pipe)		_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       7999 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC1_RC_RANGE_PARAMETERS_1_UDW(pipe)	_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       8015 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC0_RC_RANGE_PARAMETERS_2(pipe)		_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       8018 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC0_RC_RANGE_PARAMETERS_2_UDW(pipe)	_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       8021 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC1_RC_RANGE_PARAMETERS_2(pipe)		_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       8024 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC1_RC_RANGE_PARAMETERS_2_UDW(pipe)	_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       8040 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC0_RC_RANGE_PARAMETERS_3(pipe)		_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       8043 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC0_RC_RANGE_PARAMETERS_3_UDW(pipe)	_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       8046 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC1_RC_RANGE_PARAMETERS_3(pipe)		_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       8049 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC1_RC_RANGE_PARAMETERS_3_UDW(pipe)	_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       8170 drivers/gpu/drm/i915/i915_reg.h #define TVIDEO_DIP_CTL(pipe) _MMIO_PIPE(pipe, _VIDEO_DIP_CTL_A, _VIDEO_DIP_CTL_B)
_MMIO_PIPE       8171 drivers/gpu/drm/i915/i915_reg.h #define TVIDEO_DIP_DATA(pipe) _MMIO_PIPE(pipe, _VIDEO_DIP_DATA_A, _VIDEO_DIP_DATA_B)
_MMIO_PIPE       8172 drivers/gpu/drm/i915/i915_reg.h #define TVIDEO_DIP_GCP(pipe) _MMIO_PIPE(pipe, _VIDEO_DIP_GCP_A, _VIDEO_DIP_GCP_B)
_MMIO_PIPE       8263 drivers/gpu/drm/i915/i915_reg.h #define PCH_TRANS_HTOTAL(pipe)		_MMIO_PIPE(pipe, _PCH_TRANS_HTOTAL_A, _PCH_TRANS_HTOTAL_B)
_MMIO_PIPE       8264 drivers/gpu/drm/i915/i915_reg.h #define PCH_TRANS_HBLANK(pipe)		_MMIO_PIPE(pipe, _PCH_TRANS_HBLANK_A, _PCH_TRANS_HBLANK_B)
_MMIO_PIPE       8265 drivers/gpu/drm/i915/i915_reg.h #define PCH_TRANS_HSYNC(pipe)		_MMIO_PIPE(pipe, _PCH_TRANS_HSYNC_A, _PCH_TRANS_HSYNC_B)
_MMIO_PIPE       8266 drivers/gpu/drm/i915/i915_reg.h #define PCH_TRANS_VTOTAL(pipe)		_MMIO_PIPE(pipe, _PCH_TRANS_VTOTAL_A, _PCH_TRANS_VTOTAL_B)
_MMIO_PIPE       8267 drivers/gpu/drm/i915/i915_reg.h #define PCH_TRANS_VBLANK(pipe)		_MMIO_PIPE(pipe, _PCH_TRANS_VBLANK_A, _PCH_TRANS_VBLANK_B)
_MMIO_PIPE       8268 drivers/gpu/drm/i915/i915_reg.h #define PCH_TRANS_VSYNC(pipe)		_MMIO_PIPE(pipe, _PCH_TRANS_VSYNC_A, _PCH_TRANS_VSYNC_B)
_MMIO_PIPE       8269 drivers/gpu/drm/i915/i915_reg.h #define PCH_TRANS_VSYNCSHIFT(pipe)	_MMIO_PIPE(pipe, _PCH_TRANS_VSYNCSHIFT_A, _PCH_TRANS_VSYNCSHIFT_B)
_MMIO_PIPE       8280 drivers/gpu/drm/i915/i915_reg.h #define PCH_TRANS_DATA_M1(pipe)	_MMIO_PIPE(pipe, _PCH_TRANSA_DATA_M1, _PCH_TRANSB_DATA_M1)
_MMIO_PIPE       8281 drivers/gpu/drm/i915/i915_reg.h #define PCH_TRANS_DATA_N1(pipe)	_MMIO_PIPE(pipe, _PCH_TRANSA_DATA_N1, _PCH_TRANSB_DATA_N1)
_MMIO_PIPE       8282 drivers/gpu/drm/i915/i915_reg.h #define PCH_TRANS_DATA_M2(pipe)	_MMIO_PIPE(pipe, _PCH_TRANSA_DATA_M2, _PCH_TRANSB_DATA_M2)
_MMIO_PIPE       8283 drivers/gpu/drm/i915/i915_reg.h #define PCH_TRANS_DATA_N2(pipe)	_MMIO_PIPE(pipe, _PCH_TRANSA_DATA_N2, _PCH_TRANSB_DATA_N2)
_MMIO_PIPE       8284 drivers/gpu/drm/i915/i915_reg.h #define PCH_TRANS_LINK_M1(pipe)	_MMIO_PIPE(pipe, _PCH_TRANSA_LINK_M1, _PCH_TRANSB_LINK_M1)
_MMIO_PIPE       8285 drivers/gpu/drm/i915/i915_reg.h #define PCH_TRANS_LINK_N1(pipe)	_MMIO_PIPE(pipe, _PCH_TRANSA_LINK_N1, _PCH_TRANSB_LINK_N1)
_MMIO_PIPE       8286 drivers/gpu/drm/i915/i915_reg.h #define PCH_TRANS_LINK_M2(pipe)	_MMIO_PIPE(pipe, _PCH_TRANSA_LINK_M2, _PCH_TRANSB_LINK_M2)
_MMIO_PIPE       8287 drivers/gpu/drm/i915/i915_reg.h #define PCH_TRANS_LINK_N2(pipe)	_MMIO_PIPE(pipe, _PCH_TRANSA_LINK_N2, _PCH_TRANSB_LINK_N2)
_MMIO_PIPE       8291 drivers/gpu/drm/i915/i915_reg.h #define PCH_TRANSCONF(pipe)	_MMIO_PIPE(pipe, _PCH_TRANSACONF, _PCH_TRANSBCONF)
_MMIO_PIPE       8313 drivers/gpu/drm/i915/i915_reg.h #define TRANS_CHICKEN1(pipe)	_MMIO_PIPE(pipe, _TRANSA_CHICKEN1, _TRANSB_CHICKEN1)
_MMIO_PIPE       8318 drivers/gpu/drm/i915/i915_reg.h #define TRANS_CHICKEN2(pipe)	_MMIO_PIPE(pipe, _TRANSA_CHICKEN2, _TRANSB_CHICKEN2)
_MMIO_PIPE       8344 drivers/gpu/drm/i915/i915_reg.h #define FDI_RX_CHICKEN(pipe)	_MMIO_PIPE(pipe, _FDI_RXA_CHICKEN, _FDI_RXB_CHICKEN)
_MMIO_PIPE       8357 drivers/gpu/drm/i915/i915_reg.h #define FDI_TX_CTL(pipe)	_MMIO_PIPE(pipe, _FDI_TXA_CTL, _FDI_TXB_CTL)
_MMIO_PIPE       8407 drivers/gpu/drm/i915/i915_reg.h #define FDI_RX_CTL(pipe)	_MMIO_PIPE(pipe, _FDI_RXA_CTL, _FDI_RXB_CTL)
_MMIO_PIPE       8443 drivers/gpu/drm/i915/i915_reg.h #define FDI_RX_MISC(pipe)	_MMIO_PIPE(pipe, _FDI_RXA_MISC, _FDI_RXB_MISC)
_MMIO_PIPE       8449 drivers/gpu/drm/i915/i915_reg.h #define FDI_RX_TUSIZE1(pipe)	_MMIO_PIPE(pipe, _FDI_RXA_TUSIZE1, _FDI_RXB_TUSIZE1)
_MMIO_PIPE       8450 drivers/gpu/drm/i915/i915_reg.h #define FDI_RX_TUSIZE2(pipe)	_MMIO_PIPE(pipe, _FDI_RXA_TUSIZE2, _FDI_RXB_TUSIZE2)
_MMIO_PIPE       8469 drivers/gpu/drm/i915/i915_reg.h #define FDI_RX_IIR(pipe)	_MMIO_PIPE(pipe, _FDI_RXA_IIR, _FDI_RXB_IIR)
_MMIO_PIPE       8470 drivers/gpu/drm/i915/i915_reg.h #define FDI_RX_IMR(pipe)	_MMIO_PIPE(pipe, _FDI_RXA_IMR, _FDI_RXB_IMR)
_MMIO_PIPE       8512 drivers/gpu/drm/i915/i915_reg.h #define TRANS_DP_CTL(pipe)	_MMIO_PIPE(pipe, _TRANS_DP_CTL_A, _TRANS_DP_CTL_B)
_MMIO_PIPE       9004 drivers/gpu/drm/i915/i915_reg.h #define IBX_HDMIW_HDMIEDID(pipe)	_MMIO_PIPE(pipe, _IBX_HDMIW_HDMIEDID_A, \
_MMIO_PIPE       9008 drivers/gpu/drm/i915/i915_reg.h #define IBX_AUD_CNTL_ST(pipe)		_MMIO_PIPE(pipe, _IBX_AUD_CNTL_ST_A, \
_MMIO_PIPE       9019 drivers/gpu/drm/i915/i915_reg.h #define CPT_HDMIW_HDMIEDID(pipe)	_MMIO_PIPE(pipe, _CPT_HDMIW_HDMIEDID_A, _CPT_HDMIW_HDMIEDID_B)
_MMIO_PIPE       9022 drivers/gpu/drm/i915/i915_reg.h #define CPT_AUD_CNTL_ST(pipe)		_MMIO_PIPE(pipe, _CPT_AUD_CNTL_ST_A, _CPT_AUD_CNTL_ST_B)
_MMIO_PIPE       9027 drivers/gpu/drm/i915/i915_reg.h #define VLV_HDMIW_HDMIEDID(pipe)	_MMIO_PIPE(pipe, _VLV_HDMIW_HDMIEDID_A, _VLV_HDMIW_HDMIEDID_B)
_MMIO_PIPE       9030 drivers/gpu/drm/i915/i915_reg.h #define VLV_AUD_CNTL_ST(pipe)		_MMIO_PIPE(pipe, _VLV_AUD_CNTL_ST_A, _VLV_AUD_CNTL_ST_B)
_MMIO_PIPE       9041 drivers/gpu/drm/i915/i915_reg.h #define IBX_AUD_CFG(pipe)		_MMIO_PIPE(pipe, _IBX_AUD_CONFIG_A, _IBX_AUD_CONFIG_B)
_MMIO_PIPE       9044 drivers/gpu/drm/i915/i915_reg.h #define CPT_AUD_CFG(pipe)		_MMIO_PIPE(pipe, _CPT_AUD_CONFIG_A, _CPT_AUD_CONFIG_B)
_MMIO_PIPE       9047 drivers/gpu/drm/i915/i915_reg.h #define VLV_AUD_CFG(pipe)		_MMIO_PIPE(pipe, _VLV_AUD_CONFIG_A, _VLV_AUD_CONFIG_B)
_MMIO_PIPE       9553 drivers/gpu/drm/i915/i915_reg.h #define WRPLL_CTL(pll)			_MMIO_PIPE(pll, _WRPLL_CTL1, _WRPLL_CTL2)
_MMIO_PIPE       9729 drivers/gpu/drm/i915/i915_reg.h #define DPLL_CFGCR1(id)	_MMIO_PIPE((id) - SKL_DPLL1, _DPLL1_CFGCR1, _DPLL2_CFGCR1)
_MMIO_PIPE       9730 drivers/gpu/drm/i915/i915_reg.h #define DPLL_CFGCR2(id)	_MMIO_PIPE((id) - SKL_DPLL1, _DPLL1_CFGCR2, _DPLL2_CFGCR2)
_MMIO_PIPE       10093 drivers/gpu/drm/i915/i915_reg.h #define PIPE_WM_LINETIME(pipe) _MMIO_PIPE(pipe, _PIPE_WM_LINETIME_A, _PIPE_WM_LINETIME_B)
_MMIO_PIPE       10154 drivers/gpu/drm/i915/i915_reg.h #define PIPE_CSC_COEFF_RY_GY(pipe)	_MMIO_PIPE(pipe, _PIPE_A_CSC_COEFF_RY_GY, _PIPE_B_CSC_COEFF_RY_GY)
_MMIO_PIPE       10155 drivers/gpu/drm/i915/i915_reg.h #define PIPE_CSC_COEFF_BY(pipe)		_MMIO_PIPE(pipe, _PIPE_A_CSC_COEFF_BY, _PIPE_B_CSC_COEFF_BY)
_MMIO_PIPE       10156 drivers/gpu/drm/i915/i915_reg.h #define PIPE_CSC_COEFF_RU_GU(pipe)	_MMIO_PIPE(pipe, _PIPE_A_CSC_COEFF_RU_GU, _PIPE_B_CSC_COEFF_RU_GU)
_MMIO_PIPE       10157 drivers/gpu/drm/i915/i915_reg.h #define PIPE_CSC_COEFF_BU(pipe)		_MMIO_PIPE(pipe, _PIPE_A_CSC_COEFF_BU, _PIPE_B_CSC_COEFF_BU)
_MMIO_PIPE       10158 drivers/gpu/drm/i915/i915_reg.h #define PIPE_CSC_COEFF_RV_GV(pipe)	_MMIO_PIPE(pipe, _PIPE_A_CSC_COEFF_RV_GV, _PIPE_B_CSC_COEFF_RV_GV)
_MMIO_PIPE       10159 drivers/gpu/drm/i915/i915_reg.h #define PIPE_CSC_COEFF_BV(pipe)		_MMIO_PIPE(pipe, _PIPE_A_CSC_COEFF_BV, _PIPE_B_CSC_COEFF_BV)
_MMIO_PIPE       10160 drivers/gpu/drm/i915/i915_reg.h #define PIPE_CSC_MODE(pipe)		_MMIO_PIPE(pipe, _PIPE_A_CSC_MODE, _PIPE_B_CSC_MODE)
_MMIO_PIPE       10161 drivers/gpu/drm/i915/i915_reg.h #define PIPE_CSC_PREOFF_HI(pipe)	_MMIO_PIPE(pipe, _PIPE_A_CSC_PREOFF_HI, _PIPE_B_CSC_PREOFF_HI)
_MMIO_PIPE       10162 drivers/gpu/drm/i915/i915_reg.h #define PIPE_CSC_PREOFF_ME(pipe)	_MMIO_PIPE(pipe, _PIPE_A_CSC_PREOFF_ME, _PIPE_B_CSC_PREOFF_ME)
_MMIO_PIPE       10163 drivers/gpu/drm/i915/i915_reg.h #define PIPE_CSC_PREOFF_LO(pipe)	_MMIO_PIPE(pipe, _PIPE_A_CSC_PREOFF_LO, _PIPE_B_CSC_PREOFF_LO)
_MMIO_PIPE       10164 drivers/gpu/drm/i915/i915_reg.h #define PIPE_CSC_POSTOFF_HI(pipe)	_MMIO_PIPE(pipe, _PIPE_A_CSC_POSTOFF_HI, _PIPE_B_CSC_POSTOFF_HI)
_MMIO_PIPE       10165 drivers/gpu/drm/i915/i915_reg.h #define PIPE_CSC_POSTOFF_ME(pipe)	_MMIO_PIPE(pipe, _PIPE_A_CSC_POSTOFF_ME, _PIPE_B_CSC_POSTOFF_ME)
_MMIO_PIPE       10166 drivers/gpu/drm/i915/i915_reg.h #define PIPE_CSC_POSTOFF_LO(pipe)	_MMIO_PIPE(pipe, _PIPE_A_CSC_POSTOFF_LO, _PIPE_B_CSC_POSTOFF_LO)
_MMIO_PIPE       10195 drivers/gpu/drm/i915/i915_reg.h #define PIPE_CSC_OUTPUT_COEFF_RY_GY(pipe)	_MMIO_PIPE(pipe,\
_MMIO_PIPE       10198 drivers/gpu/drm/i915/i915_reg.h #define PIPE_CSC_OUTPUT_COEFF_BY(pipe)		_MMIO_PIPE(pipe, \
_MMIO_PIPE       10201 drivers/gpu/drm/i915/i915_reg.h #define PIPE_CSC_OUTPUT_COEFF_RU_GU(pipe)	_MMIO_PIPE(pipe, \
_MMIO_PIPE       10204 drivers/gpu/drm/i915/i915_reg.h #define PIPE_CSC_OUTPUT_COEFF_BU(pipe)		_MMIO_PIPE(pipe, \
_MMIO_PIPE       10207 drivers/gpu/drm/i915/i915_reg.h #define PIPE_CSC_OUTPUT_COEFF_RV_GV(pipe)	_MMIO_PIPE(pipe, \
_MMIO_PIPE       10210 drivers/gpu/drm/i915/i915_reg.h #define PIPE_CSC_OUTPUT_COEFF_BV(pipe)		_MMIO_PIPE(pipe, \
_MMIO_PIPE       10213 drivers/gpu/drm/i915/i915_reg.h #define PIPE_CSC_OUTPUT_PREOFF_HI(pipe)		_MMIO_PIPE(pipe, \
_MMIO_PIPE       10216 drivers/gpu/drm/i915/i915_reg.h #define PIPE_CSC_OUTPUT_PREOFF_ME(pipe)		_MMIO_PIPE(pipe, \
_MMIO_PIPE       10219 drivers/gpu/drm/i915/i915_reg.h #define PIPE_CSC_OUTPUT_PREOFF_LO(pipe)		_MMIO_PIPE(pipe, \
_MMIO_PIPE       10222 drivers/gpu/drm/i915/i915_reg.h #define PIPE_CSC_OUTPUT_POSTOFF_HI(pipe)	_MMIO_PIPE(pipe, \
_MMIO_PIPE       10225 drivers/gpu/drm/i915/i915_reg.h #define PIPE_CSC_OUTPUT_POSTOFF_ME(pipe)	_MMIO_PIPE(pipe, \
_MMIO_PIPE       10228 drivers/gpu/drm/i915/i915_reg.h #define PIPE_CSC_OUTPUT_POSTOFF_LO(pipe)	_MMIO_PIPE(pipe, \
_MMIO_PIPE       10254 drivers/gpu/drm/i915/i915_reg.h #define PREC_PAL_INDEX(pipe)		_MMIO_PIPE(pipe, _PAL_PREC_INDEX_A, _PAL_PREC_INDEX_B)
_MMIO_PIPE       10255 drivers/gpu/drm/i915/i915_reg.h #define PREC_PAL_DATA(pipe)		_MMIO_PIPE(pipe, _PAL_PREC_DATA_A, _PAL_PREC_DATA_B)
_MMIO_PIPE       10268 drivers/gpu/drm/i915/i915_reg.h #define PRE_CSC_GAMC_INDEX(pipe)	_MMIO_PIPE(pipe, _PRE_CSC_GAMC_INDEX_A, _PRE_CSC_GAMC_INDEX_B)
_MMIO_PIPE       10269 drivers/gpu/drm/i915/i915_reg.h #define PRE_CSC_GAMC_DATA(pipe)		_MMIO_PIPE(pipe, _PRE_CSC_GAMC_DATA_A, _PRE_CSC_GAMC_DATA_B)
_MMIO_PIPE       10280 drivers/gpu/drm/i915/i915_reg.h #define PREC_PAL_MULTI_SEG_INDEX(pipe)	_MMIO_PIPE(pipe, \
_MMIO_PIPE       10283 drivers/gpu/drm/i915/i915_reg.h #define PREC_PAL_MULTI_SEG_DATA(pipe)	_MMIO_PIPE(pipe, \
_MMIO_PIPE       10309 drivers/gpu/drm/i915/i915_reg.h #define CGM_PIPE_CSC_COEFF01(pipe)	_MMIO_PIPE(pipe, _CGM_PIPE_A_CSC_COEFF01, _CGM_PIPE_B_CSC_COEFF01)
_MMIO_PIPE       10310 drivers/gpu/drm/i915/i915_reg.h #define CGM_PIPE_CSC_COEFF23(pipe)	_MMIO_PIPE(pipe, _CGM_PIPE_A_CSC_COEFF23, _CGM_PIPE_B_CSC_COEFF23)
_MMIO_PIPE       10311 drivers/gpu/drm/i915/i915_reg.h #define CGM_PIPE_CSC_COEFF45(pipe)	_MMIO_PIPE(pipe, _CGM_PIPE_A_CSC_COEFF45, _CGM_PIPE_B_CSC_COEFF45)
_MMIO_PIPE       10312 drivers/gpu/drm/i915/i915_reg.h #define CGM_PIPE_CSC_COEFF67(pipe)	_MMIO_PIPE(pipe, _CGM_PIPE_A_CSC_COEFF67, _CGM_PIPE_B_CSC_COEFF67)
_MMIO_PIPE       10313 drivers/gpu/drm/i915/i915_reg.h #define CGM_PIPE_CSC_COEFF8(pipe)	_MMIO_PIPE(pipe, _CGM_PIPE_A_CSC_COEFF8, _CGM_PIPE_B_CSC_COEFF8)
_MMIO_PIPE       10316 drivers/gpu/drm/i915/i915_reg.h #define CGM_PIPE_MODE(pipe)		_MMIO_PIPE(pipe, _CGM_PIPE_A_MODE, _CGM_PIPE_B_MODE)
_MMIO_PIPE       10510 drivers/gpu/drm/i915/i915_reg.h #define ICL_PIPE_DSS_CTL1(pipe)			_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       10519 drivers/gpu/drm/i915/i915_reg.h #define ICL_PIPE_DSS_CTL2(pipe)			_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       11244 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC0_PICTURE_PARAMETER_SET_0(pipe)	_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       11247 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC1_PICTURE_PARAMETER_SET_0(pipe)	_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       11265 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC0_PICTURE_PARAMETER_SET_1(pipe)	_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       11268 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC1_PICTURE_PARAMETER_SET_1(pipe)	_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       11279 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC0_PICTURE_PARAMETER_SET_2(pipe)	_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       11282 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC1_PICTURE_PARAMETER_SET_2(pipe)	_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       11294 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC0_PICTURE_PARAMETER_SET_3(pipe)	_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       11297 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC1_PICTURE_PARAMETER_SET_3(pipe)	_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       11309 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC0_PICTURE_PARAMETER_SET_4(pipe)	_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       11312 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC1_PICTURE_PARAMETER_SET_4(pipe)	_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       11324 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC0_PICTURE_PARAMETER_SET_5(pipe)	_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       11327 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC1_PICTURE_PARAMETER_SET_5(pipe)	_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       11339 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC0_PICTURE_PARAMETER_SET_6(pipe)	_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       11342 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC1_PICTURE_PARAMETER_SET_6(pipe)	_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       11356 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC0_PICTURE_PARAMETER_SET_7(pipe)	_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       11359 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC1_PICTURE_PARAMETER_SET_7(pipe)	_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       11371 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC0_PICTURE_PARAMETER_SET_8(pipe)	_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       11374 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC1_PICTURE_PARAMETER_SET_8(pipe)	_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       11386 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC0_PICTURE_PARAMETER_SET_9(pipe)	_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       11389 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC1_PICTURE_PARAMETER_SET_9(pipe)	_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       11401 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC0_PICTURE_PARAMETER_SET_10(pipe)	_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       11404 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC1_PICTURE_PARAMETER_SET_10(pipe)	_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       11418 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC0_PICTURE_PARAMETER_SET_11(pipe)	_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       11421 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC1_PICTURE_PARAMETER_SET_11(pipe)	_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       11431 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC0_PICTURE_PARAMETER_SET_12(pipe)	_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       11434 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC1_PICTURE_PARAMETER_SET_12(pipe)	_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       11444 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC0_PICTURE_PARAMETER_SET_13(pipe)	_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       11447 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC1_PICTURE_PARAMETER_SET_13(pipe)	_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       11457 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC0_PICTURE_PARAMETER_SET_14(pipe)	_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       11460 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC1_PICTURE_PARAMETER_SET_14(pipe)	_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       11470 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC0_PICTURE_PARAMETER_SET_15(pipe)	_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       11473 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC1_PICTURE_PARAMETER_SET_15(pipe)	_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       11483 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC0_PICTURE_PARAMETER_SET_16(pipe)	_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       11486 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC1_PICTURE_PARAMETER_SET_16(pipe)	_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       11506 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC0_RC_BUF_THRESH_0(pipe)		_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       11509 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC0_RC_BUF_THRESH_0_UDW(pipe)	_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       11512 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC1_RC_BUF_THRESH_0(pipe)		_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       11515 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC1_RC_BUF_THRESH_0_UDW(pipe)	_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       11531 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC0_RC_BUF_THRESH_1(pipe)		_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       11534 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC0_RC_BUF_THRESH_1_UDW(pipe)	_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       11537 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC1_RC_BUF_THRESH_1(pipe)		_MMIO_PIPE((pipe) - PIPE_B, \
_MMIO_PIPE       11540 drivers/gpu/drm/i915/i915_reg.h #define ICL_DSC1_RC_BUF_THRESH_1_UDW(pipe)	_MMIO_PIPE((pipe) - PIPE_B, \