_MASKED_FIELD     187 drivers/gpu/drm/i915/gt/intel_workarounds.c 	wa_write_masked_or(wal, (addr), (mask), _MASKED_FIELD((mask), (value)))
_MASKED_FIELD    1063 drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c 	irqs = _MASKED_FIELD(GFX_FORWARD_VBLANK_MASK, GFX_FORWARD_VBLANK_NEVER);
_MASKED_FIELD     272 drivers/gpu/drm/i915/i915_reg.h #define _MASKED_BIT_ENABLE(a)	({ typeof(a) _a = (a); _MASKED_FIELD(_a, _a); })
_MASKED_FIELD     273 drivers/gpu/drm/i915/i915_reg.h #define _MASKED_BIT_DISABLE(a)	(_MASKED_FIELD((a), 0))
_MASKED_FIELD    9049 drivers/gpu/drm/i915/intel_pm.c 		   _MASKED_FIELD(GEN6_WIZ_HASHING_MASK, GEN6_WIZ_HASHING_16x4));
_MASKED_FIELD    9384 drivers/gpu/drm/i915/intel_pm.c 		   _MASKED_FIELD(GEN6_WIZ_HASHING_MASK, GEN6_WIZ_HASHING_16x4));
_MASKED_FIELD    9478 drivers/gpu/drm/i915/intel_pm.c 		   _MASKED_FIELD(GEN6_WIZ_HASHING_MASK, GEN6_WIZ_HASHING_16x4));
_MASKED_FIELD    9555 drivers/gpu/drm/i915/intel_pm.c 		   _MASKED_FIELD(GEN6_WIZ_HASHING_MASK, GEN6_WIZ_HASHING_16x4));