YCLK_POST_DIV    5368 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	mpll_ad_func_cntl |= YCLK_POST_DIV(mpll_param.post_div);
YCLK_POST_DIV    5373 drivers/gpu/drm/amd/amdgpu/si_dpm.c 			YCLK_POST_DIV(mpll_param.post_div);
YCLK_POST_DIV    1058 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 							MPLL_AD_FUNC_CNTL, YCLK_POST_DIV, mpll_param.mpll_post_divider);
YCLK_POST_DIV    1064 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 								MPLL_DQ_FUNC_CNTL, YCLK_POST_DIV, mpll_param.mpll_post_divider);
YCLK_POST_DIV    1085 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 							MPLL_AD_FUNC_CNTL, YCLK_POST_DIV, mpll_param.mpll_post_divider);
YCLK_POST_DIV    1092 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 								MPLL_DQ_FUNC_CNTL, YCLK_POST_DIV, mpll_param.mpll_post_divider);
YCLK_POST_DIV     834 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 					MPLL_AD_FUNC_CNTL, YCLK_POST_DIV,
YCLK_POST_DIV     843 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 						MPLL_DQ_FUNC_CNTL, YCLK_POST_DIV,
YCLK_POST_DIV    2819 drivers/gpu/drm/radeon/ci_dpm.c 	mpll_ad_func_cntl |= YCLK_POST_DIV(mpll_param.post_div);
YCLK_POST_DIV    2824 drivers/gpu/drm/radeon/ci_dpm.c 			YCLK_POST_DIV(mpll_param.post_div);
YCLK_POST_DIV     521 drivers/gpu/drm/radeon/cypress_dpm.c 	mpll_ad_func_cntl |= YCLK_POST_DIV(dividers.post_div);
YCLK_POST_DIV     538 drivers/gpu/drm/radeon/cypress_dpm.c 		mpll_dq_func_cntl |= YCLK_POST_DIV(dividers.post_div);
YCLK_POST_DIV    2203 drivers/gpu/drm/radeon/ni_dpm.c 	mpll_ad_func_cntl |= YCLK_POST_DIV(dividers.post_div);
YCLK_POST_DIV    2220 drivers/gpu/drm/radeon/ni_dpm.c 		mpll_dq_func_cntl |= YCLK_POST_DIV(dividers.post_div);
YCLK_POST_DIV     217 drivers/gpu/drm/radeon/rv740_dpm.c 	mpll_ad_func_cntl |= YCLK_POST_DIV(dividers.post_div);
YCLK_POST_DIV     234 drivers/gpu/drm/radeon/rv740_dpm.c 		mpll_dq_func_cntl |= YCLK_POST_DIV(dividers.post_div);
YCLK_POST_DIV     433 drivers/gpu/drm/radeon/rv770_dpm.c 	mpll_ad_func_cntl |= YCLK_POST_DIV(postdiv_yclk);
YCLK_POST_DIV     461 drivers/gpu/drm/radeon/rv770_dpm.c 		mpll_dq_func_cntl |= YCLK_POST_DIV(postdiv_yclk);
YCLK_POST_DIV    4906 drivers/gpu/drm/radeon/si_dpm.c 	mpll_ad_func_cntl |= YCLK_POST_DIV(mpll_param.post_div);
YCLK_POST_DIV    4911 drivers/gpu/drm/radeon/si_dpm.c 			YCLK_POST_DIV(mpll_param.post_div);