X_MASK 2621 arch/powerpc/xmon/ppc-opc.c #define XBF_MASK (X_MASK | (3 << 21)) X_MASK 2674 arch/powerpc/xmon/ppc-opc.c #define XRA_MASK (X_MASK | RA_MASK) X_MASK 2682 arch/powerpc/xmon/ppc-opc.c #define XRB_MASK (X_MASK | RB_MASK) X_MASK 2685 arch/powerpc/xmon/ppc-opc.c #define XRT_MASK (X_MASK | RT_MASK) X_MASK 2691 arch/powerpc/xmon/ppc-opc.c #define XRARB_MASK (X_MASK | RA_MASK | RB_MASK) X_MASK 2703 arch/powerpc/xmon/ppc-opc.c #define XRTRA_MASK (X_MASK | RT_MASK | RA_MASK) X_MASK 2706 arch/powerpc/xmon/ppc-opc.c #define XRTRB_MASK (X_MASK | RT_MASK | RB_MASK) X_MASK 2712 arch/powerpc/xmon/ppc-opc.c #define XRTRARB_MASK (X_MASK | RT_MASK | RA_MASK | RB_MASK) X_MASK 2742 arch/powerpc/xmon/ppc-opc.c #define XCMP_MASK (X_MASK | (((unsigned long)1) << 22)) X_MASK 2750 arch/powerpc/xmon/ppc-opc.c #define XTO_MASK (X_MASK | TO_MASK) X_MASK 2754 arch/powerpc/xmon/ppc-opc.c #define XTLB_MASK (X_MASK | SH_MASK) X_MASK 2766 arch/powerpc/xmon/ppc-opc.c #define XEH_MASK (X_MASK & ~((unsigned long )1)) X_MASK 2844 arch/powerpc/xmon/ppc-opc.c #define XFXFXM_MASK (X_MASK | (1 << 11) | (1 << 20)) X_MASK 2854 arch/powerpc/xmon/ppc-opc.c #define XSPR_MASK (X_MASK | SPR_MASK) X_MASK 3037 arch/powerpc/xmon/ppc-opc.c {"attn", X(0,256), X_MASK, POWER4|PPCA2, PPC476|PPCVLE, {0}}, X_MASK 3101 arch/powerpc/xmon/ppc-opc.c {"mulhhwu", XRC(4, 8,0), X_MASK, MULHW, 0, {RT, RA, RB}}, X_MASK 3102 arch/powerpc/xmon/ppc-opc.c {"mulhhwu.", XRC(4, 8,1), X_MASK, MULHW, 0, {RT, RA, RB}}, X_MASK 3177 arch/powerpc/xmon/ppc-opc.c {"mulhhw", XRC(4, 40,0), X_MASK, MULHW, 0, {RT, RA, RB}}, X_MASK 3179 arch/powerpc/xmon/ppc-opc.c {"mulhhw.", XRC(4, 40,1), X_MASK, MULHW, 0, {RT, RA, RB}}, X_MASK 3220 arch/powerpc/xmon/ppc-opc.c {"mulchwu", XRC(4, 136,0), X_MASK, MULHW, 0, {RT, RA, RB}}, X_MASK 3222 arch/powerpc/xmon/ppc-opc.c {"mulchwu.", XRC(4, 136,1), X_MASK, MULHW, 0, {RT, RA, RB}}, X_MASK 3233 arch/powerpc/xmon/ppc-opc.c {"mulchw", XRC(4, 168,0), X_MASK, MULHW, 0, {RT, RA, RB}}, X_MASK 3234 arch/powerpc/xmon/ppc-opc.c {"mulchw.", XRC(4, 168,1), X_MASK, MULHW, 0, {RT, RA, RB}}, X_MASK 3447 arch/powerpc/xmon/ppc-opc.c {"mullhwu", XRC(4, 392,0), X_MASK, MULHW, 0, {RT, RA, RB}}, X_MASK 3449 arch/powerpc/xmon/ppc-opc.c {"mullhwu.", XRC(4, 392,1), X_MASK, MULHW, 0, {RT, RA, RB}}, X_MASK 3486 arch/powerpc/xmon/ppc-opc.c {"mullhw", XRC(4, 424,0), X_MASK, MULHW, 0, {RT, RA, RB}}, X_MASK 3487 arch/powerpc/xmon/ppc-opc.c {"mullhw.", XRC(4, 424,1), X_MASK, MULHW, 0, {RT, RA, RB}}, X_MASK 4400 arch/powerpc/xmon/ppc-opc.c {"dnh", X(19,198), X_MASK, E500MC, PPCVLE, {DUI, DUIS}}, X_MASK 4692 arch/powerpc/xmon/ppc-opc.c {"tw", X(31,4), X_MASK, PPCCOM, 0, {TO, RA, RB}}, X_MASK 4693 arch/powerpc/xmon/ppc-opc.c {"t", X(31,4), X_MASK, PWRCOM, 0, {TO, RA, RB}}, X_MASK 4695 arch/powerpc/xmon/ppc-opc.c {"lvsl", X(31,6), X_MASK, PPCVEC, 0, {VD, RA0, RB}}, X_MASK 4696 arch/powerpc/xmon/ppc-opc.c {"lvebx", X(31,7), X_MASK, PPCVEC, 0, {VD, RA0, RB}}, X_MASK 4719 arch/powerpc/xmon/ppc-opc.c {"isellt", X(31,15), X_MASK, PPCISEL, 0, {RT, RA0, RB}}, X_MASK 4724 arch/powerpc/xmon/ppc-opc.c {"tlbilx", X(31,18), X_MASK, E500MC|PPCA2, 0, {T, RA0, RB}}, X_MASK 4731 arch/powerpc/xmon/ppc-opc.c {"ldx", X(31,21), X_MASK, PPC64, 0, {RT, RA0, RB}}, X_MASK 4733 arch/powerpc/xmon/ppc-opc.c {"icbt", X(31,22), X_MASK, BOOKE|PPCE300|PPCA2|PPC476, 0, {CT, RA0, RB}}, X_MASK 4735 arch/powerpc/xmon/ppc-opc.c {"lwzx", X(31,23), X_MASK, PPCCOM, 0, {RT, RA0, RB}}, X_MASK 4736 arch/powerpc/xmon/ppc-opc.c {"lx", X(31,23), X_MASK, PWRCOM, 0, {RT, RA, RB}}, X_MASK 4738 arch/powerpc/xmon/ppc-opc.c {"slw", XRC(31,24,0), X_MASK, PPCCOM, 0, {RA, RS, RB}}, X_MASK 4739 arch/powerpc/xmon/ppc-opc.c {"sl", XRC(31,24,0), X_MASK, PWRCOM, 0, {RA, RS, RB}}, X_MASK 4740 arch/powerpc/xmon/ppc-opc.c {"slw.", XRC(31,24,1), X_MASK, PPCCOM, 0, {RA, RS, RB}}, X_MASK 4741 arch/powerpc/xmon/ppc-opc.c {"sl.", XRC(31,24,1), X_MASK, PWRCOM, 0, {RA, RS, RB}}, X_MASK 4748 arch/powerpc/xmon/ppc-opc.c {"sld", XRC(31,27,0), X_MASK, PPC64, 0, {RA, RS, RB}}, X_MASK 4749 arch/powerpc/xmon/ppc-opc.c {"sld.", XRC(31,27,1), X_MASK, PPC64, 0, {RA, RS, RB}}, X_MASK 4751 arch/powerpc/xmon/ppc-opc.c {"and", XRC(31,28,0), X_MASK, COM, 0, {RA, RS, RB}}, X_MASK 4752 arch/powerpc/xmon/ppc-opc.c {"and.", XRC(31,28,1), X_MASK, COM, 0, {RA, RS, RB}}, X_MASK 4754 arch/powerpc/xmon/ppc-opc.c {"maskg", XRC(31,29,0), X_MASK, M601, PPCA2, {RA, RS, RB}}, X_MASK 4755 arch/powerpc/xmon/ppc-opc.c {"maskg.", XRC(31,29,1), X_MASK, M601, PPCA2, {RA, RS, RB}}, X_MASK 4757 arch/powerpc/xmon/ppc-opc.c {"ldepx", X(31,29), X_MASK, E500MC|PPCA2, 0, {RT, RA0, RB}}, X_MASK 4762 arch/powerpc/xmon/ppc-opc.c {"lwepx", X(31,31), X_MASK, E500MC|PPCA2, 0, {RT, RA0, RB}}, X_MASK 4769 arch/powerpc/xmon/ppc-opc.c {"lvsr", X(31,38), X_MASK, PPCVEC, 0, {VD, RA0, RB}}, X_MASK 4770 arch/powerpc/xmon/ppc-opc.c {"lvehx", X(31,39), X_MASK, PPCVEC, 0, {VD, RA0, RB}}, X_MASK 4773 arch/powerpc/xmon/ppc-opc.c {"mviwsplt", X(31,46), X_MASK, PPCVEC2, 0, {VD, RA, RB}}, X_MASK 4775 arch/powerpc/xmon/ppc-opc.c {"iselgt", X(31,47), X_MASK, PPCISEL, 0, {RT, RA0, RB}}, X_MASK 4777 arch/powerpc/xmon/ppc-opc.c {"lvewx", X(31,71), X_MASK, PPCVEC, 0, {VD, RA0, RB}}, X_MASK 4783 arch/powerpc/xmon/ppc-opc.c {"iseleq", X(31,79), X_MASK, PPCISEL, 0, {RT, RA0, RB}}, X_MASK 4795 arch/powerpc/xmon/ppc-opc.c {"eratilx", X(31,51), X_MASK, PPCA2, 0, {ERAT_T, RA, RB}}, X_MASK 4799 arch/powerpc/xmon/ppc-opc.c {"ldux", X(31,53), X_MASK, PPC64, 0, {RT, RAL, RB}}, X_MASK 4803 arch/powerpc/xmon/ppc-opc.c {"lwzux", X(31,55), X_MASK, PPCCOM, 0, {RT, RAL, RB}}, X_MASK 4804 arch/powerpc/xmon/ppc-opc.c {"lux", X(31,55), X_MASK, PWRCOM, 0, {RT, RA, RB}}, X_MASK 4809 arch/powerpc/xmon/ppc-opc.c {"andc", XRC(31,60,0), X_MASK, COM, 0, {RA, RS, RB}}, X_MASK 4810 arch/powerpc/xmon/ppc-opc.c {"andc.", XRC(31,60,1), X_MASK, COM, 0, {RA, RS, RB}}, X_MASK 4833 arch/powerpc/xmon/ppc-opc.c {"td", X(31,68), X_MASK, PPC64, 0, {TO, RA, RB}}, X_MASK 4842 arch/powerpc/xmon/ppc-opc.c {"dlmzb", XRC(31,78,0), X_MASK, PPC403|PPC440|TITAN, 0, {RA, RS, RB}}, X_MASK 4843 arch/powerpc/xmon/ppc-opc.c {"dlmzb.", XRC(31,78,1), X_MASK, PPC403|PPC440|TITAN, 0, {RA, RS, RB}}, X_MASK 4854 arch/powerpc/xmon/ppc-opc.c {"lbzx", X(31,87), X_MASK, COM, 0, {RT, RA0, RB}}, X_MASK 4856 arch/powerpc/xmon/ppc-opc.c {"lbepx", X(31,95), X_MASK, E500MC|PPCA2, 0, {RT, RA0, RB}}, X_MASK 4860 arch/powerpc/xmon/ppc-opc.c {"lvx", X(31,103), X_MASK, PPCVEC, 0, {VD, RA0, RB}}, X_MASK 4869 arch/powerpc/xmon/ppc-opc.c {"mvidsplt", X(31,110), X_MASK, PPCVEC2, 0, {VD, RA, RB}}, X_MASK 4881 arch/powerpc/xmon/ppc-opc.c {"lbzux", X(31,119), X_MASK, COM, 0, {RT, RAL, RB}}, X_MASK 4885 arch/powerpc/xmon/ppc-opc.c {"not", XRC(31,124,0), X_MASK, COM, 0, {RA, RS, RBS}}, X_MASK 4886 arch/powerpc/xmon/ppc-opc.c {"nor", XRC(31,124,0), X_MASK, COM, 0, {RA, RS, RB}}, X_MASK 4887 arch/powerpc/xmon/ppc-opc.c {"not.", XRC(31,124,1), X_MASK, COM, 0, {RA, RS, RBS}}, X_MASK 4888 arch/powerpc/xmon/ppc-opc.c {"nor.", XRC(31,124,1), X_MASK, COM, 0, {RA, RS, RB}}, X_MASK 4896 arch/powerpc/xmon/ppc-opc.c {"dcbtstls", X(31,134), X_MASK, PPCCHLK|PPC476|TITAN, 0, {CT, RA0, RB}}, X_MASK 4898 arch/powerpc/xmon/ppc-opc.c {"stvebx", X(31,135), X_MASK, PPCVEC, 0, {VS, RA0, RB}}, X_MASK 4914 arch/powerpc/xmon/ppc-opc.c {"dcbtstlse", X(31,142), X_MASK, PPCCHLK, E500MC, {CT, RA0, RB}}, X_MASK 4924 arch/powerpc/xmon/ppc-opc.c {"eratsx", XRC(31,147,0), X_MASK, PPCA2, 0, {RT, RA0, RB}}, X_MASK 4925 arch/powerpc/xmon/ppc-opc.c {"eratsx.", XRC(31,147,1), X_MASK, PPCA2, 0, {RT, RA0, RB}}, X_MASK 4927 arch/powerpc/xmon/ppc-opc.c {"stdx", X(31,149), X_MASK, PPC64, 0, {RS, RA0, RB}}, X_MASK 4929 arch/powerpc/xmon/ppc-opc.c {"stwcx.", XRC(31,150,1), X_MASK, PPC, 0, {RS, RA0, RB}}, X_MASK 4931 arch/powerpc/xmon/ppc-opc.c {"stwx", X(31,151), X_MASK, PPCCOM, 0, {RS, RA0, RB}}, X_MASK 4932 arch/powerpc/xmon/ppc-opc.c {"stx", X(31,151), X_MASK, PWRCOM, 0, {RS, RA, RB}}, X_MASK 4934 arch/powerpc/xmon/ppc-opc.c {"slq", XRC(31,152,0), X_MASK, M601, 0, {RA, RS, RB}}, X_MASK 4935 arch/powerpc/xmon/ppc-opc.c {"slq.", XRC(31,152,1), X_MASK, M601, 0, {RA, RS, RB}}, X_MASK 4937 arch/powerpc/xmon/ppc-opc.c {"sle", XRC(31,153,0), X_MASK, M601, 0, {RA, RS, RB}}, X_MASK 4938 arch/powerpc/xmon/ppc-opc.c {"sle.", XRC(31,153,1), X_MASK, M601, 0, {RA, RS, RB}}, X_MASK 4942 arch/powerpc/xmon/ppc-opc.c {"stdepx", X(31,157), X_MASK, E500MC|PPCA2, 0, {RS, RA0, RB}}, X_MASK 4944 arch/powerpc/xmon/ppc-opc.c {"stwepx", X(31,159), X_MASK, E500MC|PPCA2, 0, {RS, RA0, RB}}, X_MASK 4948 arch/powerpc/xmon/ppc-opc.c {"dcbtls", X(31,166), X_MASK, PPCCHLK|PPC476|TITAN, 0, {CT, RA0, RB}}, X_MASK 4950 arch/powerpc/xmon/ppc-opc.c {"stvehx", X(31,167), X_MASK, PPCVEC, 0, {VS, RA0, RB}}, X_MASK 4956 arch/powerpc/xmon/ppc-opc.c {"dcbtlse", X(31,174), X_MASK, PPCCHLK, E500MC, {CT, RA0, RB}}, X_MASK 4963 arch/powerpc/xmon/ppc-opc.c {"eratre", X(31,179), X_MASK, PPCA2, 0, {RT, RA, WS}}, X_MASK 4965 arch/powerpc/xmon/ppc-opc.c {"stdux", X(31,181), X_MASK, PPC64, 0, {RS, RAS, RB}}, X_MASK 4967 arch/powerpc/xmon/ppc-opc.c {"stqcx.", XRC(31,182,1), X_MASK, POWER8, 0, {RSQ, RA0, RB}}, X_MASK 4968 arch/powerpc/xmon/ppc-opc.c {"wchkall", X(31,182), X_MASK, PPCA2, 0, {OBF}}, X_MASK 4970 arch/powerpc/xmon/ppc-opc.c {"stwux", X(31,183), X_MASK, PPCCOM, 0, {RS, RAS, RB}}, X_MASK 4971 arch/powerpc/xmon/ppc-opc.c {"stux", X(31,183), X_MASK, PWRCOM, 0, {RS, RA0, RB}}, X_MASK 4973 arch/powerpc/xmon/ppc-opc.c {"sliq", XRC(31,184,0), X_MASK, M601, 0, {RA, RS, SH}}, X_MASK 4974 arch/powerpc/xmon/ppc-opc.c {"sliq.", XRC(31,184,1), X_MASK, M601, 0, {RA, RS, SH}}, X_MASK 4980 arch/powerpc/xmon/ppc-opc.c {"icblq.", XRC(31,198,1), X_MASK, E6500, 0, {CT, RA0, RB}}, X_MASK 4982 arch/powerpc/xmon/ppc-opc.c {"stvewx", X(31,199), X_MASK, PPCVEC, 0, {VS, RA0, RB}}, X_MASK 5002 arch/powerpc/xmon/ppc-opc.c {"eratwe", X(31,211), X_MASK, PPCA2, 0, {RS, RA, WS}}, X_MASK 5004 arch/powerpc/xmon/ppc-opc.c {"ldawx.", XRC(31,212,1), X_MASK, PPCA2, 0, {RT, RA0, RB}}, X_MASK 5006 arch/powerpc/xmon/ppc-opc.c {"stdcx.", XRC(31,214,1), X_MASK, PPC64, 0, {RS, RA0, RB}}, X_MASK 5008 arch/powerpc/xmon/ppc-opc.c {"stbx", X(31,215), X_MASK, COM, 0, {RS, RA0, RB}}, X_MASK 5010 arch/powerpc/xmon/ppc-opc.c {"sllq", XRC(31,216,0), X_MASK, M601, 0, {RA, RS, RB}}, X_MASK 5011 arch/powerpc/xmon/ppc-opc.c {"sllq.", XRC(31,216,1), X_MASK, M601, 0, {RA, RS, RB}}, X_MASK 5013 arch/powerpc/xmon/ppc-opc.c {"sleq", XRC(31,217,0), X_MASK, M601, 0, {RA, RS, RB}}, X_MASK 5014 arch/powerpc/xmon/ppc-opc.c {"sleq.", XRC(31,217,1), X_MASK, M601, 0, {RA, RS, RB}}, X_MASK 5016 arch/powerpc/xmon/ppc-opc.c {"stbepx", X(31,223), X_MASK, E500MC|PPCA2, 0, {RS, RA0, RB}}, X_MASK 5020 arch/powerpc/xmon/ppc-opc.c {"icblc", X(31,230), X_MASK, PPCCHLK|PPC476|TITAN, 0, {CT, RA0, RB}}, X_MASK 5022 arch/powerpc/xmon/ppc-opc.c {"stvx", X(31,231), X_MASK, PPCVEC, 0, {VS, RA0, RB}}, X_MASK 5043 arch/powerpc/xmon/ppc-opc.c {"icblce", X(31,238), X_MASK, PPCCHLK, E500MC|PPCA2, {CT, RA, RB}}, X_MASK 5053 arch/powerpc/xmon/ppc-opc.c {"dcbtst", X(31,246), X_MASK, POWER4, DCBT_EO, {RA0, RB, CT}}, X_MASK 5054 arch/powerpc/xmon/ppc-opc.c {"dcbtst", X(31,246), X_MASK, DCBT_EO, 0, {CT, RA0, RB}}, X_MASK 5055 arch/powerpc/xmon/ppc-opc.c {"dcbtst", X(31,246), X_MASK, PPC, POWER4|DCBT_EO, {RA0, RB}}, X_MASK 5057 arch/powerpc/xmon/ppc-opc.c {"stbux", X(31,247), X_MASK, COM, 0, {RS, RAS, RB}}, X_MASK 5059 arch/powerpc/xmon/ppc-opc.c {"slliq", XRC(31,248,0), X_MASK, M601, 0, {RA, RS, SH}}, X_MASK 5060 arch/powerpc/xmon/ppc-opc.c {"slliq.", XRC(31,248,1), X_MASK, M601, 0, {RA, RS, SH}}, X_MASK 5062 arch/powerpc/xmon/ppc-opc.c {"bpermd", X(31,252), X_MASK, POWER7|PPCA2, 0, {RA, RS, RB}}, X_MASK 5064 arch/powerpc/xmon/ppc-opc.c {"dcbtstep", XRT(31,255,0), X_MASK, E500MC|PPCA2, 0, {RT, RA0, RB}}, X_MASK 5066 arch/powerpc/xmon/ppc-opc.c {"mfdcrx", X(31,259), X_MASK, BOOKE|PPCA2|PPC476, TITAN, {RS, RA}}, X_MASK 5067 arch/powerpc/xmon/ppc-opc.c {"mfdcrx.", XRC(31,259,1), X_MASK, PPCA2, 0, {RS, RA}}, X_MASK 5069 arch/powerpc/xmon/ppc-opc.c {"lvexbx", X(31,261), X_MASK, PPCVEC2, 0, {VD, RA0, RB}}, X_MASK 5073 arch/powerpc/xmon/ppc-opc.c {"lvepxl", X(31,263), X_MASK, PPCVEC2, 0, {VD, RA0, RB}}, X_MASK 5079 arch/powerpc/xmon/ppc-opc.c {"modud", X(31,265), X_MASK, POWER9, 0, {RT, RA, RB}}, X_MASK 5086 arch/powerpc/xmon/ppc-opc.c {"moduw", X(31,267), X_MASK, POWER9, 0, {RT, RA, RB}}, X_MASK 5093 arch/powerpc/xmon/ppc-opc.c {"tlbiel", X(31,274), X_MASK|1<<20,POWER9, PPC476, {RB, RSO, RIC, PRS, X_R}}, X_MASK 5096 arch/powerpc/xmon/ppc-opc.c {"mfapidi", X(31,275), X_MASK, BOOKE, E500|TITAN, {RT, RA}}, X_MASK 5100 arch/powerpc/xmon/ppc-opc.c {"lscbx", XRC(31,277,0), X_MASK, M601, 0, {RT, RA, RB}}, X_MASK 5101 arch/powerpc/xmon/ppc-opc.c {"lscbx.", XRC(31,277,1), X_MASK, M601, 0, {RT, RA, RB}}, X_MASK 5104 arch/powerpc/xmon/ppc-opc.c {"dcbt", X(31,278), X_MASK, POWER4, DCBT_EO, {RA0, RB, CT}}, X_MASK 5105 arch/powerpc/xmon/ppc-opc.c {"dcbt", X(31,278), X_MASK, DCBT_EO, 0, {CT, RA0, RB}}, X_MASK 5106 arch/powerpc/xmon/ppc-opc.c {"dcbt", X(31,278), X_MASK, PPC, POWER4|DCBT_EO, {RA0, RB}}, X_MASK 5108 arch/powerpc/xmon/ppc-opc.c {"lhzx", X(31,279), X_MASK, COM, 0, {RT, RA0, RB}}, X_MASK 5112 arch/powerpc/xmon/ppc-opc.c {"eqv", XRC(31,284,0), X_MASK, COM, 0, {RA, RS, RB}}, X_MASK 5113 arch/powerpc/xmon/ppc-opc.c {"eqv.", XRC(31,284,1), X_MASK, COM, 0, {RA, RS, RB}}, X_MASK 5115 arch/powerpc/xmon/ppc-opc.c {"lhepx", X(31,287), X_MASK, E500MC|PPCA2, 0, {RT, RA0, RB}}, X_MASK 5117 arch/powerpc/xmon/ppc-opc.c {"mfdcrux", X(31,291), X_MASK, PPC464, 0, {RS, RA}}, X_MASK 5119 arch/powerpc/xmon/ppc-opc.c {"lvexhx", X(31,293), X_MASK, PPCVEC2, 0, {VD, RA0, RB}}, X_MASK 5120 arch/powerpc/xmon/ppc-opc.c {"lvepx", X(31,295), X_MASK, PPCVEC2, 0, {VD, RA0, RB}}, X_MASK 5124 arch/powerpc/xmon/ppc-opc.c {"mfbhrbe", X(31,302), X_MASK, POWER8, 0, {RT, BHRBE}}, X_MASK 5126 arch/powerpc/xmon/ppc-opc.c {"tlbie", X(31,306), X_MASK|1<<20,POWER9, TITAN, {RB, RS, RIC, PRS, X_R}}, X_MASK 5133 arch/powerpc/xmon/ppc-opc.c {"ldmx", X(31,309), X_MASK, POWER9, 0, {RT, RA0, RB}}, X_MASK 5135 arch/powerpc/xmon/ppc-opc.c {"eciwx", X(31,310), X_MASK, PPC, E500|TITAN, {RT, RA0, RB}}, X_MASK 5137 arch/powerpc/xmon/ppc-opc.c {"lhzux", X(31,311), X_MASK, COM, 0, {RT, RAL, RB}}, X_MASK 5141 arch/powerpc/xmon/ppc-opc.c {"xor", XRC(31,316,0), X_MASK, COM, 0, {RA, RS, RB}}, X_MASK 5142 arch/powerpc/xmon/ppc-opc.c {"xor.", XRC(31,316,1), X_MASK, COM, 0, {RA, RS, RB}}, X_MASK 5144 arch/powerpc/xmon/ppc-opc.c {"dcbtep", XRT(31,319,0), X_MASK, E500MC|PPCA2, 0, {RT, RA0, RB}}, X_MASK 5180 arch/powerpc/xmon/ppc-opc.c {"mfdcr", X(31,323), X_MASK, PPC403|BOOKE|PPCA2|PPC476, E500|TITAN, {RT, SPR}}, X_MASK 5181 arch/powerpc/xmon/ppc-opc.c {"mfdcr.", XRC(31,323,1), X_MASK, PPCA2, 0, {RT, SPR}}, X_MASK 5183 arch/powerpc/xmon/ppc-opc.c {"lvexwx", X(31,325), X_MASK, PPCVEC2, 0, {VD, RA0, RB}}, X_MASK 5185 arch/powerpc/xmon/ppc-opc.c {"dcread", X(31,326), X_MASK, PPC476|TITAN, 0, {RT, RA0, RB}}, X_MASK 5192 arch/powerpc/xmon/ppc-opc.c {"mfpmr", X(31,334), X_MASK, PPCPMR|PPCE300, 0, {RT, PMR}}, X_MASK 5193 arch/powerpc/xmon/ppc-opc.c {"mftmr", X(31,366), X_MASK, PPCTMR|E6500, 0, {RT, TMR}}, X_MASK 5245 arch/powerpc/xmon/ppc-opc.c {"mftb", X(31,339), X_MASK, POWER4|BOOKE, 0, {RT, TBR}}, X_MASK 5397 arch/powerpc/xmon/ppc-opc.c {"mfspr", X(31,339), X_MASK, COM, 0, {RT, SPR}}, X_MASK 5399 arch/powerpc/xmon/ppc-opc.c {"lwax", X(31,341), X_MASK, PPC64, 0, {RT, RA0, RB}}, X_MASK 5403 arch/powerpc/xmon/ppc-opc.c {"lhax", X(31,343), X_MASK, COM, 0, {RT, RA0, RB}}, X_MASK 5405 arch/powerpc/xmon/ppc-opc.c {"lvxl", X(31,359), X_MASK, PPCVEC, 0, {VD, RA0, RB}}, X_MASK 5418 arch/powerpc/xmon/ppc-opc.c {"mftb", X(31,371), X_MASK, PPC, NO371|POWER4, {RT, TBR}}, X_MASK 5421 arch/powerpc/xmon/ppc-opc.c {"lwaux", X(31,373), X_MASK, PPC64, 0, {RT, RAL, RB}}, X_MASK 5425 arch/powerpc/xmon/ppc-opc.c {"lhaux", X(31,375), X_MASK, COM, 0, {RT, RAL, RB}}, X_MASK 5429 arch/powerpc/xmon/ppc-opc.c {"mtdcrx", X(31,387), X_MASK, BOOKE|PPCA2|PPC476, TITAN, {RA, RS}}, X_MASK 5430 arch/powerpc/xmon/ppc-opc.c {"mtdcrx.", XRC(31,387,1), X_MASK, PPCA2, 0, {RA, RS}}, X_MASK 5432 arch/powerpc/xmon/ppc-opc.c {"stvexbx", X(31,389), X_MASK, PPCVEC2, 0, {VS, RA0, RB}}, X_MASK 5434 arch/powerpc/xmon/ppc-opc.c {"dcblc", X(31,390), X_MASK, PPCCHLK|PPC476|TITAN, 0, {CT, RA0, RB}}, X_MASK 5445 arch/powerpc/xmon/ppc-opc.c {"dcblce", X(31,398), X_MASK, PPCCHLK, E500MC, {CT, RA, RB}}, X_MASK 5451 arch/powerpc/xmon/ppc-opc.c {"pbt.", XRC(31,404,1), X_MASK, POWER8, 0, {RS, RA0, RB}}, X_MASK 5453 arch/powerpc/xmon/ppc-opc.c {"icswx", XRC(31,406,0), X_MASK, POWER7|PPCA2, 0, {RS, RA, RB}}, X_MASK 5454 arch/powerpc/xmon/ppc-opc.c {"icswx.", XRC(31,406,1), X_MASK, POWER7|PPCA2, 0, {RS, RA, RB}}, X_MASK 5456 arch/powerpc/xmon/ppc-opc.c {"sthx", X(31,407), X_MASK, COM, 0, {RS, RA0, RB}}, X_MASK 5458 arch/powerpc/xmon/ppc-opc.c {"orc", XRC(31,412,0), X_MASK, COM, 0, {RA, RS, RB}}, X_MASK 5459 arch/powerpc/xmon/ppc-opc.c {"orc.", XRC(31,412,1), X_MASK, COM, 0, {RA, RS, RB}}, X_MASK 5461 arch/powerpc/xmon/ppc-opc.c {"sthepx", X(31,415), X_MASK, E500MC|PPCA2, 0, {RS, RA0, RB}}, X_MASK 5463 arch/powerpc/xmon/ppc-opc.c {"mtdcrux", X(31,419), X_MASK, PPC464, 0, {RA, RS}}, X_MASK 5465 arch/powerpc/xmon/ppc-opc.c {"stvexhx", X(31,421), X_MASK, PPCVEC2, 0, {VS, RA0, RB}}, X_MASK 5467 arch/powerpc/xmon/ppc-opc.c {"dcblq.", XRC(31,422,1), X_MASK, E6500, 0, {CT, RA0, RB}}, X_MASK 5482 arch/powerpc/xmon/ppc-opc.c {"ecowx", X(31,438), X_MASK, PPC, E500|TITAN, {RT, RA0, RB}}, X_MASK 5484 arch/powerpc/xmon/ppc-opc.c {"sthux", X(31,439), X_MASK, COM, 0, {RS, RAS, RB}}, X_MASK 5495 arch/powerpc/xmon/ppc-opc.c {"mr", XRC(31,444,0), X_MASK, COM, 0, {RA, RS, RBS}}, X_MASK 5496 arch/powerpc/xmon/ppc-opc.c {"or", XRC(31,444,0), X_MASK, COM, 0, {RA, RS, RB}}, X_MASK 5497 arch/powerpc/xmon/ppc-opc.c {"mr.", XRC(31,444,1), X_MASK, COM, 0, {RA, RS, RBS}}, X_MASK 5498 arch/powerpc/xmon/ppc-opc.c {"or.", XRC(31,444,1), X_MASK, COM, 0, {RA, RS, RB}}, X_MASK 5534 arch/powerpc/xmon/ppc-opc.c {"mtdcr", X(31,451), X_MASK, PPC403|BOOKE|PPCA2|PPC476, E500|TITAN, {SPR, RS}}, X_MASK 5535 arch/powerpc/xmon/ppc-opc.c {"mtdcr.", XRC(31,451,1), X_MASK, PPCA2, 0, {SPR, RS}}, X_MASK 5537 arch/powerpc/xmon/ppc-opc.c {"stvexwx", X(31,453), X_MASK, PPCVEC2, 0, {VS, RA0, RB}}, X_MASK 5548 arch/powerpc/xmon/ppc-opc.c {"mtpmr", X(31,462), X_MASK, PPCPMR|PPCE300, 0, {PMR, RS}}, X_MASK 5549 arch/powerpc/xmon/ppc-opc.c {"mttmr", X(31,494), X_MASK, PPCTMR|E6500, 0, {TMR, RS}}, X_MASK 5717 arch/powerpc/xmon/ppc-opc.c {"mtspr", X(31,467), X_MASK, COM, 0, {SPR, RS}}, X_MASK 5721 arch/powerpc/xmon/ppc-opc.c {"nand", XRC(31,476,0), X_MASK, COM, 0, {RA, RS, RB}}, X_MASK 5722 arch/powerpc/xmon/ppc-opc.c {"nand.", XRC(31,476,1), X_MASK, COM, 0, {RA, RS, RB}}, X_MASK 5726 arch/powerpc/xmon/ppc-opc.c {"dcread", X(31,486), X_MASK, PPC403|PPC440, PPCA2|PPC476, {RT, RA0, RB}}, X_MASK 5728 arch/powerpc/xmon/ppc-opc.c {"icbtls", X(31,486), X_MASK, PPCCHLK|PPC476|TITAN, 0, {CT, RA0, RB}}, X_MASK 5730 arch/powerpc/xmon/ppc-opc.c {"stvxl", X(31,487), X_MASK, PPCVEC, 0, {VS, RA0, RB}}, X_MASK 5741 arch/powerpc/xmon/ppc-opc.c {"icbtlse", X(31,494), X_MASK, PPCCHLK, E500MC, {CT, RA, RB}}, X_MASK 5750 arch/powerpc/xmon/ppc-opc.c {"cmpb", X(31,508), X_MASK, POWER6|PPCA2|PPC476, 0, {RA, RS, RB}}, X_MASK 5754 arch/powerpc/xmon/ppc-opc.c {"lbdcbx", X(31,514), X_MASK, E200Z4, 0, {RT, RA, RB}}, X_MASK 5755 arch/powerpc/xmon/ppc-opc.c {"lbdx", X(31,515), X_MASK, E500MC, 0, {RT, RA, RB}}, X_MASK 5757 arch/powerpc/xmon/ppc-opc.c {"bblels", X(31,518), X_MASK, PPCBRLK, 0, {0}}, X_MASK 5759 arch/powerpc/xmon/ppc-opc.c {"lvlx", X(31,519), X_MASK, CELL, 0, {VD, RA0, RB}}, X_MASK 5778 arch/powerpc/xmon/ppc-opc.c {"ldbrx", X(31,532), X_MASK, CELL|POWER7|PPCA2, 0, {RT, RA0, RB}}, X_MASK 5780 arch/powerpc/xmon/ppc-opc.c {"lswx", X(31,533), X_MASK, PPCCOM, E500|E500MC, {RT, RAX, RBX}}, X_MASK 5781 arch/powerpc/xmon/ppc-opc.c {"lsx", X(31,533), X_MASK, PWRCOM, 0, {RT, RA, RB}}, X_MASK 5783 arch/powerpc/xmon/ppc-opc.c {"lwbrx", X(31,534), X_MASK, PPCCOM, 0, {RT, RA0, RB}}, X_MASK 5784 arch/powerpc/xmon/ppc-opc.c {"lbrx", X(31,534), X_MASK, PWRCOM, 0, {RT, RA, RB}}, X_MASK 5786 arch/powerpc/xmon/ppc-opc.c {"lfsx", X(31,535), X_MASK, COM, PPCEFS, {FRT, RA0, RB}}, X_MASK 5788 arch/powerpc/xmon/ppc-opc.c {"srw", XRC(31,536,0), X_MASK, PPCCOM, 0, {RA, RS, RB}}, X_MASK 5789 arch/powerpc/xmon/ppc-opc.c {"sr", XRC(31,536,0), X_MASK, PWRCOM, 0, {RA, RS, RB}}, X_MASK 5790 arch/powerpc/xmon/ppc-opc.c {"srw.", XRC(31,536,1), X_MASK, PPCCOM, 0, {RA, RS, RB}}, X_MASK 5791 arch/powerpc/xmon/ppc-opc.c {"sr.", XRC(31,536,1), X_MASK, PWRCOM, 0, {RA, RS, RB}}, X_MASK 5793 arch/powerpc/xmon/ppc-opc.c {"rrib", XRC(31,537,0), X_MASK, M601, 0, {RA, RS, RB}}, X_MASK 5794 arch/powerpc/xmon/ppc-opc.c {"rrib.", XRC(31,537,1), X_MASK, M601, 0, {RA, RS, RB}}, X_MASK 5799 arch/powerpc/xmon/ppc-opc.c {"srd", XRC(31,539,0), X_MASK, PPC64, 0, {RA, RS, RB}}, X_MASK 5800 arch/powerpc/xmon/ppc-opc.c {"srd.", XRC(31,539,1), X_MASK, PPC64, 0, {RA, RS, RB}}, X_MASK 5802 arch/powerpc/xmon/ppc-opc.c {"maskir", XRC(31,541,0), X_MASK, M601, 0, {RA, RS, RB}}, X_MASK 5803 arch/powerpc/xmon/ppc-opc.c {"maskir.", XRC(31,541,1), X_MASK, M601, 0, {RA, RS, RB}}, X_MASK 5805 arch/powerpc/xmon/ppc-opc.c {"lhdcbx", X(31,546), X_MASK, E200Z4, 0, {RT, RA, RB}}, X_MASK 5806 arch/powerpc/xmon/ppc-opc.c {"lhdx", X(31,547), X_MASK, E500MC, 0, {RT, RA, RB}}, X_MASK 5808 arch/powerpc/xmon/ppc-opc.c {"lvtrx", X(31,549), X_MASK, PPCVEC2, 0, {VD, RA0, RB}}, X_MASK 5810 arch/powerpc/xmon/ppc-opc.c {"bbelr", X(31,550), X_MASK, PPCBRLK, 0, {0}}, X_MASK 5812 arch/powerpc/xmon/ppc-opc.c {"lvrx", X(31,551), X_MASK, CELL, 0, {VD, RA0, RB}}, X_MASK 5822 arch/powerpc/xmon/ppc-opc.c {"lfsux", X(31,567), X_MASK, COM, PPCEFS, {FRT, RAS, RB}}, X_MASK 5829 arch/powerpc/xmon/ppc-opc.c {"lwdcbx", X(31,578), X_MASK, E200Z4, 0, {RT, RA, RB}}, X_MASK 5830 arch/powerpc/xmon/ppc-opc.c {"lwdx", X(31,579), X_MASK, E500MC, 0, {RT, RA, RB}}, X_MASK 5832 arch/powerpc/xmon/ppc-opc.c {"lvtlx", X(31,581), X_MASK, PPCVEC2, 0, {VD, RA0, RB}}, X_MASK 5834 arch/powerpc/xmon/ppc-opc.c {"lwat", X(31,582), X_MASK, POWER9, 0, {RT, RA0, FC}}, X_MASK 5842 arch/powerpc/xmon/ppc-opc.c {"lswi", X(31,597), X_MASK, PPCCOM, E500|E500MC, {RT, RAX, NBI}}, X_MASK 5843 arch/powerpc/xmon/ppc-opc.c {"lsi", X(31,597), X_MASK, PWRCOM, 0, {RT, RA0, NB}}, X_MASK 5855 arch/powerpc/xmon/ppc-opc.c {"lfdx", X(31,599), X_MASK, COM, PPCEFS, {FRT, RA0, RB}}, X_MASK 5858 arch/powerpc/xmon/ppc-opc.c {"lfdepx", X(31,607), X_MASK, E500MC|PPCA2, 0, {FRT, RA0, RB}}, X_MASK 5860 arch/powerpc/xmon/ppc-opc.c {"lddx", X(31,611), X_MASK, E500MC, 0, {RT, RA, RB}}, X_MASK 5862 arch/powerpc/xmon/ppc-opc.c {"lvswx", X(31,613), X_MASK, PPCVEC2, 0, {VD, RA0, RB}}, X_MASK 5864 arch/powerpc/xmon/ppc-opc.c {"ldat", X(31,614), X_MASK, POWER9, 0, {RT, RA0, FC}}, X_MASK 5874 arch/powerpc/xmon/ppc-opc.c {"mfsri", X(31,627), X_MASK, M601, 0, {RT, RA, RB}}, X_MASK 5878 arch/powerpc/xmon/ppc-opc.c {"lfdux", X(31,631), X_MASK, COM, PPCEFS, {FRT, RAS, RB}}, X_MASK 5880 arch/powerpc/xmon/ppc-opc.c {"stbdcbx", X(31,642), X_MASK, E200Z4, 0, {RS, RA, RB}}, X_MASK 5881 arch/powerpc/xmon/ppc-opc.c {"stbdx", X(31,643), X_MASK, E500MC, 0, {RS, RA, RB}}, X_MASK 5883 arch/powerpc/xmon/ppc-opc.c {"stvlx", X(31,647), X_MASK, CELL, 0, {VS, RA0, RB}}, X_MASK 5902 arch/powerpc/xmon/ppc-opc.c {"stdbrx", X(31,660), X_MASK, CELL|POWER7|PPCA2, 0, {RS, RA0, RB}}, X_MASK 5904 arch/powerpc/xmon/ppc-opc.c {"stswx", X(31,661), X_MASK, PPCCOM, E500|E500MC, {RS, RA0, RB}}, X_MASK 5905 arch/powerpc/xmon/ppc-opc.c {"stsx", X(31,661), X_MASK, PWRCOM, 0, {RS, RA0, RB}}, X_MASK 5907 arch/powerpc/xmon/ppc-opc.c {"stwbrx", X(31,662), X_MASK, PPCCOM, 0, {RS, RA0, RB}}, X_MASK 5908 arch/powerpc/xmon/ppc-opc.c {"stbrx", X(31,662), X_MASK, PWRCOM, 0, {RS, RA0, RB}}, X_MASK 5910 arch/powerpc/xmon/ppc-opc.c {"stfsx", X(31,663), X_MASK, COM, PPCEFS, {FRS, RA0, RB}}, X_MASK 5912 arch/powerpc/xmon/ppc-opc.c {"srq", XRC(31,664,0), X_MASK, M601, 0, {RA, RS, RB}}, X_MASK 5913 arch/powerpc/xmon/ppc-opc.c {"srq.", XRC(31,664,1), X_MASK, M601, 0, {RA, RS, RB}}, X_MASK 5915 arch/powerpc/xmon/ppc-opc.c {"sre", XRC(31,665,0), X_MASK, M601, 0, {RA, RS, RB}}, X_MASK 5916 arch/powerpc/xmon/ppc-opc.c {"sre.", XRC(31,665,1), X_MASK, M601, 0, {RA, RS, RB}}, X_MASK 5918 arch/powerpc/xmon/ppc-opc.c {"sthdcbx", X(31,674), X_MASK, E200Z4, 0, {RS, RA, RB}}, X_MASK 5919 arch/powerpc/xmon/ppc-opc.c {"sthdx", X(31,675), X_MASK, E500MC, 0, {RS, RA, RB}}, X_MASK 5921 arch/powerpc/xmon/ppc-opc.c {"stvfrx", X(31,677), X_MASK, PPCVEC2, 0, {VS, RA0, RB}}, X_MASK 5923 arch/powerpc/xmon/ppc-opc.c {"stvrx", X(31,679), X_MASK, CELL, 0, {VS, RA0, RB}}, X_MASK 5929 arch/powerpc/xmon/ppc-opc.c {"stbcx.", XRC(31,694,1), X_MASK, POWER8|E6500, 0, {RS, RA0, RB}}, X_MASK 5931 arch/powerpc/xmon/ppc-opc.c {"stfsux", X(31,695), X_MASK, COM, PPCEFS, {FRS, RAS, RB}}, X_MASK 5933 arch/powerpc/xmon/ppc-opc.c {"sriq", XRC(31,696,0), X_MASK, M601, 0, {RA, RS, SH}}, X_MASK 5934 arch/powerpc/xmon/ppc-opc.c {"sriq.", XRC(31,696,1), X_MASK, M601, 0, {RA, RS, SH}}, X_MASK 5936 arch/powerpc/xmon/ppc-opc.c {"stwdcbx", X(31,706), X_MASK, E200Z4, 0, {RS, RA, RB}}, X_MASK 5937 arch/powerpc/xmon/ppc-opc.c {"stwdx", X(31,707), X_MASK, E500MC, 0, {RS, RA, RB}}, X_MASK 5939 arch/powerpc/xmon/ppc-opc.c {"stvflx", X(31,709), X_MASK, PPCVEC2, 0, {VS, RA0, RB}}, X_MASK 5941 arch/powerpc/xmon/ppc-opc.c {"stwat", X(31,710), X_MASK, POWER9, 0, {RS, RA0, FC}}, X_MASK 5959 arch/powerpc/xmon/ppc-opc.c {"stswi", X(31,725), X_MASK, PPCCOM, E500|E500MC, {RS, RA0, NB}}, X_MASK 5960 arch/powerpc/xmon/ppc-opc.c {"stsi", X(31,725), X_MASK, PWRCOM, 0, {RS, RA0, NB}}, X_MASK 5962 arch/powerpc/xmon/ppc-opc.c {"sthcx.", XRC(31,726,1), X_MASK, POWER8|E6500, 0, {RS, RA0, RB}}, X_MASK 5964 arch/powerpc/xmon/ppc-opc.c {"stfdx", X(31,727), X_MASK, COM, PPCEFS, {FRS, RA0, RB}}, X_MASK 5966 arch/powerpc/xmon/ppc-opc.c {"srlq", XRC(31,728,0), X_MASK, M601, 0, {RA, RS, RB}}, X_MASK 5967 arch/powerpc/xmon/ppc-opc.c {"srlq.", XRC(31,728,1), X_MASK, M601, 0, {RA, RS, RB}}, X_MASK 5969 arch/powerpc/xmon/ppc-opc.c {"sreq", XRC(31,729,0), X_MASK, M601, 0, {RA, RS, RB}}, X_MASK 5970 arch/powerpc/xmon/ppc-opc.c {"sreq.", XRC(31,729,1), X_MASK, M601, 0, {RA, RS, RB}}, X_MASK 5973 arch/powerpc/xmon/ppc-opc.c {"stfdepx", X(31,735), X_MASK, E500MC|PPCA2, 0, {FRS, RA0, RB}}, X_MASK 5975 arch/powerpc/xmon/ppc-opc.c {"stddx", X(31,739), X_MASK, E500MC, 0, {RS, RA, RB}}, X_MASK 5977 arch/powerpc/xmon/ppc-opc.c {"stvswx", X(31,741), X_MASK, PPCVEC2, 0, {VS, RA0, RB}}, X_MASK 5979 arch/powerpc/xmon/ppc-opc.c {"stdat", X(31,742), X_MASK, POWER9, 0, {RS, RA0, FC}}, X_MASK 6010 arch/powerpc/xmon/ppc-opc.c {"stfdux", X(31,759), X_MASK, COM, PPCEFS, {FRS, RAS, RB}}, X_MASK 6012 arch/powerpc/xmon/ppc-opc.c {"srliq", XRC(31,760,0), X_MASK, M601, 0, {RA, RS, SH}}, X_MASK 6013 arch/powerpc/xmon/ppc-opc.c {"srliq.", XRC(31,760,1), X_MASK, M601, 0, {RA, RS, SH}}, X_MASK 6015 arch/powerpc/xmon/ppc-opc.c {"lvsm", X(31,773), X_MASK, PPCVEC2, 0, {VD, RA0, RB}}, X_MASK 6019 arch/powerpc/xmon/ppc-opc.c {"stvepxl", X(31,775), X_MASK, PPCVEC2, 0, {VS, RA0, RB}}, X_MASK 6020 arch/powerpc/xmon/ppc-opc.c {"lvlxl", X(31,775), X_MASK, CELL, 0, {VD, RA0, RB}}, X_MASK 6031 arch/powerpc/xmon/ppc-opc.c {"modsd", X(31,777), X_MASK, POWER9, 0, {RT, RA, RB}}, X_MASK 6032 arch/powerpc/xmon/ppc-opc.c {"modsw", X(31,779), X_MASK, POWER9, 0, {RT, RA, RB}}, X_MASK 6037 arch/powerpc/xmon/ppc-opc.c {"tabortwc.", XRC(31,782,1), X_MASK, PPCHTM, 0, {TO, RA, RB}}, X_MASK 6041 arch/powerpc/xmon/ppc-opc.c {"lwzcix", X(31,789), X_MASK, POWER6, 0, {RT, RA0, RB}}, X_MASK 6043 arch/powerpc/xmon/ppc-opc.c {"lhbrx", X(31,790), X_MASK, COM, 0, {RT, RA0, RB}}, X_MASK 6045 arch/powerpc/xmon/ppc-opc.c {"lfdpx", X(31,791), X_MASK, POWER6, POWER7, {FRTp, RA0, RB}}, X_MASK 6046 arch/powerpc/xmon/ppc-opc.c {"lfqx", X(31,791), X_MASK, POWER2, 0, {FRT, RA, RB}}, X_MASK 6048 arch/powerpc/xmon/ppc-opc.c {"sraw", XRC(31,792,0), X_MASK, PPCCOM, 0, {RA, RS, RB}}, X_MASK 6049 arch/powerpc/xmon/ppc-opc.c {"sra", XRC(31,792,0), X_MASK, PWRCOM, 0, {RA, RS, RB}}, X_MASK 6050 arch/powerpc/xmon/ppc-opc.c {"sraw.", XRC(31,792,1), X_MASK, PPCCOM, 0, {RA, RS, RB}}, X_MASK 6051 arch/powerpc/xmon/ppc-opc.c {"sra.", XRC(31,792,1), X_MASK, PWRCOM, 0, {RA, RS, RB}}, X_MASK 6053 arch/powerpc/xmon/ppc-opc.c {"srad", XRC(31,794,0), X_MASK, PPC64, 0, {RA, RS, RB}}, X_MASK 6054 arch/powerpc/xmon/ppc-opc.c {"srad.", XRC(31,794,1), X_MASK, PPC64, 0, {RA, RS, RB}}, X_MASK 6056 arch/powerpc/xmon/ppc-opc.c {"lfddx", X(31,803), X_MASK, E500MC, 0, {FRT, RA, RB}}, X_MASK 6058 arch/powerpc/xmon/ppc-opc.c {"lvtrxl", X(31,805), X_MASK, PPCVEC2, 0, {VD, RA0, RB}}, X_MASK 6059 arch/powerpc/xmon/ppc-opc.c {"stvepx", X(31,807), X_MASK, PPCVEC2, 0, {VS, RA0, RB}}, X_MASK 6060 arch/powerpc/xmon/ppc-opc.c {"lvrxl", X(31,807), X_MASK, CELL, 0, {VD, RA0, RB}}, X_MASK 6065 arch/powerpc/xmon/ppc-opc.c {"tabortdc.", XRC(31,814,1), X_MASK, PPCHTM, 0, {TO, RA, RB}}, X_MASK 6067 arch/powerpc/xmon/ppc-opc.c {"rac", X(31,818), X_MASK, M601, 0, {RT, RA, RB}}, X_MASK 6069 arch/powerpc/xmon/ppc-opc.c {"erativax", X(31,819), X_MASK, PPCA2, 0, {RS, RA0, RB}}, X_MASK 6071 arch/powerpc/xmon/ppc-opc.c {"lhzcix", X(31,821), X_MASK, POWER6, 0, {RT, RA0, RB}}, X_MASK 6075 arch/powerpc/xmon/ppc-opc.c {"lfqux", X(31,823), X_MASK, POWER2, 0, {FRT, RA, RB}}, X_MASK 6077 arch/powerpc/xmon/ppc-opc.c {"srawi", XRC(31,824,0), X_MASK, PPCCOM, 0, {RA, RS, SH}}, X_MASK 6078 arch/powerpc/xmon/ppc-opc.c {"srai", XRC(31,824,0), X_MASK, PWRCOM, 0, {RA, RS, SH}}, X_MASK 6079 arch/powerpc/xmon/ppc-opc.c {"srawi.", XRC(31,824,1), X_MASK, PPCCOM, 0, {RA, RS, SH}}, X_MASK 6080 arch/powerpc/xmon/ppc-opc.c {"srai.", XRC(31,824,1), X_MASK, PWRCOM, 0, {RA, RS, SH}}, X_MASK 6085 arch/powerpc/xmon/ppc-opc.c {"lvtlxl", X(31,837), X_MASK, PPCVEC2, 0, {VD, RA0, RB}}, X_MASK 6095 arch/powerpc/xmon/ppc-opc.c {"tabortwci.", XRC(31,846,1), X_MASK, PPCHTM, 0, {TO, RA, HTM_SI}}, X_MASK 6103 arch/powerpc/xmon/ppc-opc.c {"lbzcix", X(31,853), X_MASK, POWER6, 0, {RT, RA0, RB}}, X_MASK 6106 arch/powerpc/xmon/ppc-opc.c {"mbar", X(31,854), X_MASK, BOOKE|PPCA2|PPC476, 0, {MO}}, X_MASK 6110 arch/powerpc/xmon/ppc-opc.c {"lfiwax", X(31,855), X_MASK, POWER6|PPCA2|PPC476, 0, {FRT, RA0, RB}}, X_MASK 6112 arch/powerpc/xmon/ppc-opc.c {"lvswxl", X(31,869), X_MASK, PPCVEC2, 0, {VD, RA0, RB}}, X_MASK 6122 arch/powerpc/xmon/ppc-opc.c {"tabortdci.", XRC(31,878,1), X_MASK, PPCHTM, 0, {TO, RA, HTM_SI}}, X_MASK 6126 arch/powerpc/xmon/ppc-opc.c {"ldcix", X(31,885), X_MASK, POWER6, 0, {RT, RA0, RB}}, X_MASK 6130 arch/powerpc/xmon/ppc-opc.c {"lfiwzx", X(31,887), X_MASK, POWER7|PPCA2, 0, {FRT, RA0, RB}}, X_MASK 6137 arch/powerpc/xmon/ppc-opc.c {"stvlxl", X(31,903), X_MASK, CELL, 0, {VS, RA0, RB}}, X_MASK 6150 arch/powerpc/xmon/ppc-opc.c {"tlbsx", XRC(31,914,0), X_MASK, PPC403|BOOKE|PPCA2|PPC476, 0, {RTO, RA0, RB}}, X_MASK 6151 arch/powerpc/xmon/ppc-opc.c {"tlbsx.", XRC(31,914,1), X_MASK, PPC403|BOOKE|PPCA2|PPC476, 0, {RTO, RA0, RB}}, X_MASK 6156 arch/powerpc/xmon/ppc-opc.c {"stwcix", X(31,917), X_MASK, POWER6, 0, {RS, RA0, RB}}, X_MASK 6158 arch/powerpc/xmon/ppc-opc.c {"sthbrx", X(31,918), X_MASK, COM, 0, {RS, RA0, RB}}, X_MASK 6160 arch/powerpc/xmon/ppc-opc.c {"stfdpx", X(31,919), X_MASK, POWER6, POWER7, {FRSp, RA0, RB}}, X_MASK 6161 arch/powerpc/xmon/ppc-opc.c {"stfqx", X(31,919), X_MASK, POWER2, 0, {FRS, RA0, RB}}, X_MASK 6163 arch/powerpc/xmon/ppc-opc.c {"sraq", XRC(31,920,0), X_MASK, M601, 0, {RA, RS, RB}}, X_MASK 6164 arch/powerpc/xmon/ppc-opc.c {"sraq.", XRC(31,920,1), X_MASK, M601, 0, {RA, RS, RB}}, X_MASK 6166 arch/powerpc/xmon/ppc-opc.c {"srea", XRC(31,921,0), X_MASK, M601, 0, {RA, RS, RB}}, X_MASK 6167 arch/powerpc/xmon/ppc-opc.c {"srea.", XRC(31,921,1), X_MASK, M601, 0, {RA, RS, RB}}, X_MASK 6174 arch/powerpc/xmon/ppc-opc.c {"stfddx", X(31,931), X_MASK, E500MC, 0, {FRS, RA, RB}}, X_MASK 6176 arch/powerpc/xmon/ppc-opc.c {"stvfrxl", X(31,933), X_MASK, PPCVEC2, 0, {VS, RA0, RB}}, X_MASK 6180 arch/powerpc/xmon/ppc-opc.c {"wclr", X(31,934), X_MASK, PPCA2, 0, {L2, RA0, RB}}, X_MASK 6182 arch/powerpc/xmon/ppc-opc.c {"stvrxl", X(31,935), X_MASK, CELL, 0, {VS, RA0, RB}}, X_MASK 6196 arch/powerpc/xmon/ppc-opc.c {"tlbre", X(31,946), X_MASK, PPC403|BOOKE|PPCA2|PPC476, 0, {RSO, RAOPT, SHO}}, X_MASK 6198 arch/powerpc/xmon/ppc-opc.c {"sthcix", X(31,949), X_MASK, POWER6, 0, {RS, RA0, RB}}, X_MASK 6200 arch/powerpc/xmon/ppc-opc.c {"icswepx", XRC(31,950,0), X_MASK, PPCA2, 0, {RS, RA, RB}}, X_MASK 6201 arch/powerpc/xmon/ppc-opc.c {"icswepx.", XRC(31,950,1), X_MASK, PPCA2, 0, {RS, RA, RB}}, X_MASK 6203 arch/powerpc/xmon/ppc-opc.c {"stfqux", X(31,951), X_MASK, POWER2, 0, {FRS, RA, RB}}, X_MASK 6205 arch/powerpc/xmon/ppc-opc.c {"sraiq", XRC(31,952,0), X_MASK, M601, 0, {RA, RS, SH}}, X_MASK 6206 arch/powerpc/xmon/ppc-opc.c {"sraiq.", XRC(31,952,1), X_MASK, M601, 0, {RA, RS, SH}}, X_MASK 6211 arch/powerpc/xmon/ppc-opc.c {"stvflxl", X(31,965), X_MASK, PPCVEC2, 0, {VS, RA0, RB}}, X_MASK 6228 arch/powerpc/xmon/ppc-opc.c {"tlbwe", X(31,978), X_MASK, PPC403|BOOKE|PPCA2|PPC476, 0, {RSO, RAOPT, SHO}}, X_MASK 6232 arch/powerpc/xmon/ppc-opc.c {"stbcix", X(31,981), X_MASK, POWER6, 0, {RS, RA0, RB}}, X_MASK 6236 arch/powerpc/xmon/ppc-opc.c {"stfiwx", X(31,983), X_MASK, PPC, PPCEFS, {FRS, RA0, RB}}, X_MASK 6243 arch/powerpc/xmon/ppc-opc.c {"stvswxl", X(31,997), X_MASK, PPCVEC2, 0, {VS, RA0, RB}}, X_MASK 6262 arch/powerpc/xmon/ppc-opc.c {"stdcix", X(31,1013), X_MASK, POWER6, 0, {RS, RA0, RB}}, X_MASK 6352 arch/powerpc/xmon/ppc-opc.c {"dadd", XRC(59,2,0), X_MASK, POWER6, PPCVLE, {FRT, FRA, FRB}}, X_MASK 6353 arch/powerpc/xmon/ppc-opc.c {"dadd.", XRC(59,2,1), X_MASK, POWER6, PPCVLE, {FRT, FRA, FRB}}, X_MASK 6395 arch/powerpc/xmon/ppc-opc.c {"dmul", XRC(59,34,0), X_MASK, POWER6, PPCVLE, {FRT, FRA, FRB}}, X_MASK 6396 arch/powerpc/xmon/ppc-opc.c {"dmul.", XRC(59,34,1), X_MASK, POWER6, PPCVLE, {FRT, FRA, FRB}}, X_MASK 6413 arch/powerpc/xmon/ppc-opc.c {"dcmpo", X(59,130), X_MASK, POWER6, PPCVLE, {BF, FRA, FRB}}, X_MASK 6415 arch/powerpc/xmon/ppc-opc.c {"dtstex", X(59,162), X_MASK, POWER6, PPCVLE, {BF, FRA, FRB}}, X_MASK 6422 arch/powerpc/xmon/ppc-opc.c {"dctdp", XRC(59,258,0), X_MASK, POWER6, PPCVLE, {FRT, FRB}}, X_MASK 6423 arch/powerpc/xmon/ppc-opc.c {"dctdp.", XRC(59,258,1), X_MASK, POWER6, PPCVLE, {FRT, FRB}}, X_MASK 6425 arch/powerpc/xmon/ppc-opc.c {"dctfix", XRC(59,290,0), X_MASK, POWER6, PPCVLE, {FRT, FRB}}, X_MASK 6426 arch/powerpc/xmon/ppc-opc.c {"dctfix.", XRC(59,290,1), X_MASK, POWER6, PPCVLE, {FRT, FRB}}, X_MASK 6428 arch/powerpc/xmon/ppc-opc.c {"ddedpd", XRC(59,322,0), X_MASK, POWER6, PPCVLE, {SP, FRT, FRB}}, X_MASK 6429 arch/powerpc/xmon/ppc-opc.c {"ddedpd.", XRC(59,322,1), X_MASK, POWER6, PPCVLE, {SP, FRT, FRB}}, X_MASK 6431 arch/powerpc/xmon/ppc-opc.c {"dxex", XRC(59,354,0), X_MASK, POWER6, PPCVLE, {FRT, FRB}}, X_MASK 6432 arch/powerpc/xmon/ppc-opc.c {"dxex.", XRC(59,354,1), X_MASK, POWER6, PPCVLE, {FRT, FRB}}, X_MASK 6434 arch/powerpc/xmon/ppc-opc.c {"dsub", XRC(59,514,0), X_MASK, POWER6, PPCVLE, {FRT, FRA, FRB}}, X_MASK 6435 arch/powerpc/xmon/ppc-opc.c {"dsub.", XRC(59,514,1), X_MASK, POWER6, PPCVLE, {FRT, FRA, FRB}}, X_MASK 6437 arch/powerpc/xmon/ppc-opc.c {"ddiv", XRC(59,546,0), X_MASK, POWER6, PPCVLE, {FRT, FRA, FRB}}, X_MASK 6438 arch/powerpc/xmon/ppc-opc.c {"ddiv.", XRC(59,546,1), X_MASK, POWER6, PPCVLE, {FRT, FRA, FRB}}, X_MASK 6440 arch/powerpc/xmon/ppc-opc.c {"dcmpu", X(59,642), X_MASK, POWER6, PPCVLE, {BF, FRA, FRB}}, X_MASK 6442 arch/powerpc/xmon/ppc-opc.c {"dtstsf", X(59,674), X_MASK, POWER6, PPCVLE, {BF, FRA, FRB}}, X_MASK 6443 arch/powerpc/xmon/ppc-opc.c {"dtstsfi", X(59,675), X_MASK|1<<22,POWER9, PPCVLE, {BF, UIM6, FRB}}, X_MASK 6445 arch/powerpc/xmon/ppc-opc.c {"drsp", XRC(59,770,0), X_MASK, POWER6, PPCVLE, {FRT, FRB}}, X_MASK 6446 arch/powerpc/xmon/ppc-opc.c {"drsp.", XRC(59,770,1), X_MASK, POWER6, PPCVLE, {FRT, FRB}}, X_MASK 6448 arch/powerpc/xmon/ppc-opc.c {"dcffix", XRC(59,802,0), X_MASK|FRA_MASK, POWER7, PPCVLE, {FRT, FRB}}, X_MASK 6449 arch/powerpc/xmon/ppc-opc.c {"dcffix.", XRC(59,802,1), X_MASK|FRA_MASK, POWER7, PPCVLE, {FRT, FRB}}, X_MASK 6451 arch/powerpc/xmon/ppc-opc.c {"denbcd", XRC(59,834,0), X_MASK, POWER6, PPCVLE, {S, FRT, FRB}}, X_MASK 6452 arch/powerpc/xmon/ppc-opc.c {"denbcd.", XRC(59,834,1), X_MASK, POWER6, PPCVLE, {S, FRT, FRB}}, X_MASK 6457 arch/powerpc/xmon/ppc-opc.c {"diex", XRC(59,866,0), X_MASK, POWER6, PPCVLE, {FRT, FRA, FRB}}, X_MASK 6458 arch/powerpc/xmon/ppc-opc.c {"diex.", XRC(59,866,1), X_MASK, POWER6, PPCVLE, {FRT, FRA, FRB}}, X_MASK 6679 arch/powerpc/xmon/ppc-opc.c {"daddq", XRC(63,2,0), X_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}}, X_MASK 6680 arch/powerpc/xmon/ppc-opc.c {"daddq.", XRC(63,2,1), X_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}}, X_MASK 6685 arch/powerpc/xmon/ppc-opc.c {"xsaddqp", XRC(63,4,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}}, X_MASK 6686 arch/powerpc/xmon/ppc-opc.c {"xsaddqpo", XRC(63,4,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}}, X_MASK 6691 arch/powerpc/xmon/ppc-opc.c {"fcpsgn", XRC(63,8,0), X_MASK, POWER6|PPCA2|PPC476, PPCVLE, {FRT, FRA, FRB}}, X_MASK 6692 arch/powerpc/xmon/ppc-opc.c {"fcpsgn.", XRC(63,8,1), X_MASK, POWER6|PPCA2|PPC476, PPCVLE, {FRT, FRA, FRB}}, X_MASK 6765 arch/powerpc/xmon/ppc-opc.c {"dmulq", XRC(63,34,0), X_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}}, X_MASK 6766 arch/powerpc/xmon/ppc-opc.c {"dmulq.", XRC(63,34,1), X_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}}, X_MASK 6771 arch/powerpc/xmon/ppc-opc.c {"xsmulqp", XRC(63,36,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}}, X_MASK 6772 arch/powerpc/xmon/ppc-opc.c {"xsmulqpo", XRC(63,36,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}}, X_MASK 6802 arch/powerpc/xmon/ppc-opc.c {"xscpsgnqp", X(63,100), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}}, X_MASK 6806 arch/powerpc/xmon/ppc-opc.c {"dcmpoq", X(63,130), X_MASK, POWER6, PPCVLE, {BF, FRAp, FRBp}}, X_MASK 6825 arch/powerpc/xmon/ppc-opc.c {"dtstexq", X(63,162), X_MASK, POWER6, PPCVLE, {BF, FRAp, FRBp}}, X_MASK 6835 arch/powerpc/xmon/ppc-opc.c {"dctqpq", XRC(63,258,0), X_MASK, POWER6, PPCVLE, {FRTp, FRB}}, X_MASK 6836 arch/powerpc/xmon/ppc-opc.c {"dctqpq.", XRC(63,258,1), X_MASK, POWER6, PPCVLE, {FRTp, FRB}}, X_MASK 6841 arch/powerpc/xmon/ppc-opc.c {"dctfixq", XRC(63,290,0), X_MASK, POWER6, PPCVLE, {FRT, FRBp}}, X_MASK 6842 arch/powerpc/xmon/ppc-opc.c {"dctfixq.", XRC(63,290,1), X_MASK, POWER6, PPCVLE, {FRT, FRBp}}, X_MASK 6844 arch/powerpc/xmon/ppc-opc.c {"ddedpdq", XRC(63,322,0), X_MASK, POWER6, PPCVLE, {SP, FRTp, FRBp}}, X_MASK 6845 arch/powerpc/xmon/ppc-opc.c {"ddedpdq.", XRC(63,322,1), X_MASK, POWER6, PPCVLE, {SP, FRTp, FRBp}}, X_MASK 6847 arch/powerpc/xmon/ppc-opc.c {"dxexq", XRC(63,354,0), X_MASK, POWER6, PPCVLE, {FRT, FRBp}}, X_MASK 6848 arch/powerpc/xmon/ppc-opc.c {"dxexq.", XRC(63,354,1), X_MASK, POWER6, PPCVLE, {FRT, FRBp}}, X_MASK 6850 arch/powerpc/xmon/ppc-opc.c {"xsmaddqp", XRC(63,388,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}}, X_MASK 6851 arch/powerpc/xmon/ppc-opc.c {"xsmaddqpo", XRC(63,388,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}}, X_MASK 6856 arch/powerpc/xmon/ppc-opc.c {"xsmsubqp", XRC(63,420,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}}, X_MASK 6857 arch/powerpc/xmon/ppc-opc.c {"xsmsubqpo", XRC(63,420,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}}, X_MASK 6862 arch/powerpc/xmon/ppc-opc.c {"xsnmaddqp", XRC(63,452,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}}, X_MASK 6863 arch/powerpc/xmon/ppc-opc.c {"xsnmaddqpo", XRC(63,452,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}}, X_MASK 6868 arch/powerpc/xmon/ppc-opc.c {"xsnmsubqp", XRC(63,484,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}}, X_MASK 6869 arch/powerpc/xmon/ppc-opc.c {"xsnmsubqpo", XRC(63,484,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}}, X_MASK 6874 arch/powerpc/xmon/ppc-opc.c {"dsubq", XRC(63,514,0), X_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}}, X_MASK 6875 arch/powerpc/xmon/ppc-opc.c {"dsubq.", XRC(63,514,1), X_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}}, X_MASK 6877 arch/powerpc/xmon/ppc-opc.c {"xssubqp", XRC(63,516,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}}, X_MASK 6878 arch/powerpc/xmon/ppc-opc.c {"xssubqpo", XRC(63,516,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}}, X_MASK 6880 arch/powerpc/xmon/ppc-opc.c {"ddivq", XRC(63,546,0), X_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}}, X_MASK 6881 arch/powerpc/xmon/ppc-opc.c {"ddivq.", XRC(63,546,1), X_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}}, X_MASK 6883 arch/powerpc/xmon/ppc-opc.c {"xsdivqp", XRC(63,548,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}}, X_MASK 6884 arch/powerpc/xmon/ppc-opc.c {"xsdivqpo", XRC(63,548,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}}, X_MASK 6896 arch/powerpc/xmon/ppc-opc.c {"dcmpuq", X(63,642), X_MASK, POWER6, PPCVLE, {BF, FRAp, FRBp}}, X_MASK 6900 arch/powerpc/xmon/ppc-opc.c {"dtstsfq", X(63,674), X_MASK, POWER6, PPCVLE, {BF, FRA, FRBp}}, X_MASK 6901 arch/powerpc/xmon/ppc-opc.c {"dtstsfiq", X(63,675), X_MASK|1<<22,POWER9, PPCVLE, {BF, UIM6, FRBp}}, X_MASK 6903 arch/powerpc/xmon/ppc-opc.c {"xststdcqp", X(63,708), X_MASK, PPCVSX3, PPCVLE, {BF, VB, DCMX}}, X_MASK 6910 arch/powerpc/xmon/ppc-opc.c {"drdpq", XRC(63,770,0), X_MASK, POWER6, PPCVLE, {FRTp, FRBp}}, X_MASK 6911 arch/powerpc/xmon/ppc-opc.c {"drdpq.", XRC(63,770,1), X_MASK, POWER6, PPCVLE, {FRTp, FRBp}}, X_MASK 6913 arch/powerpc/xmon/ppc-opc.c {"dcffixq", XRC(63,802,0), X_MASK, POWER6, PPCVLE, {FRTp, FRB}}, X_MASK 6914 arch/powerpc/xmon/ppc-opc.c {"dcffixq.", XRC(63,802,1), X_MASK, POWER6, PPCVLE, {FRTp, FRB}}, X_MASK 6934 arch/powerpc/xmon/ppc-opc.c {"denbcdq", XRC(63,834,0), X_MASK, POWER6, PPCVLE, {S, FRTp, FRBp}}, X_MASK 6935 arch/powerpc/xmon/ppc-opc.c {"denbcdq.", XRC(63,834,1), X_MASK, POWER6, PPCVLE, {S, FRTp, FRBp}}, X_MASK 6947 arch/powerpc/xmon/ppc-opc.c {"fmrgow", X(63,838), X_MASK, PPCVSX2, PPCVLE, {FRT, FRA, FRB}}, X_MASK 6954 arch/powerpc/xmon/ppc-opc.c {"diexq", XRC(63,866,0), X_MASK, POWER6, PPCVLE, {FRTp, FRA, FRBp}}, X_MASK 6955 arch/powerpc/xmon/ppc-opc.c {"diexq.", XRC(63,866,1), X_MASK, POWER6, PPCVLE, {FRTp, FRA, FRBp}}, X_MASK 6957 arch/powerpc/xmon/ppc-opc.c {"xsiexpqp", X(63,868), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}}, X_MASK 6965 arch/powerpc/xmon/ppc-opc.c {"fmrgew", X(63,966), X_MASK, PPCVSX2, PPCVLE, {FRT, FRA, FRB}}, X_MASK 7146 arch/powerpc/xmon/ppc-opc.c {"e_cmph", X(31,14), X_MASK, PPCVLE, 0, {CRD, RA, RB}}, X_MASK 7147 arch/powerpc/xmon/ppc-opc.c {"e_cmphl", X(31,46), X_MASK, PPCVLE, 0, {CRD, RA, RB}},