XSPR_MASK        2858 arch/powerpc/xmon/ppc-opc.c #define XSPRBAT_MASK (XSPR_MASK &~ SPRBAT_MASK)
XSPR_MASK        2862 arch/powerpc/xmon/ppc-opc.c #define XSPRG_MASK (XSPR_MASK & ~(0x1f << 16))
XSPR_MASK        5146 arch/powerpc/xmon/ppc-opc.c {"mfexisr",	XSPR(31,323, 64), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5147 arch/powerpc/xmon/ppc-opc.c {"mfexier",	XSPR(31,323, 66), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5148 arch/powerpc/xmon/ppc-opc.c {"mfbr0",	XSPR(31,323,128), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5149 arch/powerpc/xmon/ppc-opc.c {"mfbr1",	XSPR(31,323,129), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5150 arch/powerpc/xmon/ppc-opc.c {"mfbr2",	XSPR(31,323,130), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5151 arch/powerpc/xmon/ppc-opc.c {"mfbr3",	XSPR(31,323,131), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5152 arch/powerpc/xmon/ppc-opc.c {"mfbr4",	XSPR(31,323,132), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5153 arch/powerpc/xmon/ppc-opc.c {"mfbr5",	XSPR(31,323,133), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5154 arch/powerpc/xmon/ppc-opc.c {"mfbr6",	XSPR(31,323,134), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5155 arch/powerpc/xmon/ppc-opc.c {"mfbr7",	XSPR(31,323,135), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5156 arch/powerpc/xmon/ppc-opc.c {"mfbear",	XSPR(31,323,144), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5157 arch/powerpc/xmon/ppc-opc.c {"mfbesr",	XSPR(31,323,145), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5158 arch/powerpc/xmon/ppc-opc.c {"mfiocr",	XSPR(31,323,160), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5159 arch/powerpc/xmon/ppc-opc.c {"mfdmacr0",	XSPR(31,323,192), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5160 arch/powerpc/xmon/ppc-opc.c {"mfdmact0",	XSPR(31,323,193), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5161 arch/powerpc/xmon/ppc-opc.c {"mfdmada0",	XSPR(31,323,194), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5162 arch/powerpc/xmon/ppc-opc.c {"mfdmasa0",	XSPR(31,323,195), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5163 arch/powerpc/xmon/ppc-opc.c {"mfdmacc0",	XSPR(31,323,196), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5164 arch/powerpc/xmon/ppc-opc.c {"mfdmacr1",	XSPR(31,323,200), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5165 arch/powerpc/xmon/ppc-opc.c {"mfdmact1",	XSPR(31,323,201), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5166 arch/powerpc/xmon/ppc-opc.c {"mfdmada1",	XSPR(31,323,202), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5167 arch/powerpc/xmon/ppc-opc.c {"mfdmasa1",	XSPR(31,323,203), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5168 arch/powerpc/xmon/ppc-opc.c {"mfdmacc1",	XSPR(31,323,204), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5169 arch/powerpc/xmon/ppc-opc.c {"mfdmacr2",	XSPR(31,323,208), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5170 arch/powerpc/xmon/ppc-opc.c {"mfdmact2",	XSPR(31,323,209), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5171 arch/powerpc/xmon/ppc-opc.c {"mfdmada2",	XSPR(31,323,210), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5172 arch/powerpc/xmon/ppc-opc.c {"mfdmasa2",	XSPR(31,323,211), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5173 arch/powerpc/xmon/ppc-opc.c {"mfdmacc2",	XSPR(31,323,212), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5174 arch/powerpc/xmon/ppc-opc.c {"mfdmacr3",	XSPR(31,323,216), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5175 arch/powerpc/xmon/ppc-opc.c {"mfdmact3",	XSPR(31,323,217), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5176 arch/powerpc/xmon/ppc-opc.c {"mfdmada3",	XSPR(31,323,218), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5177 arch/powerpc/xmon/ppc-opc.c {"mfdmasa3",	XSPR(31,323,219), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5178 arch/powerpc/xmon/ppc-opc.c {"mfdmacc3",	XSPR(31,323,220), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5179 arch/powerpc/xmon/ppc-opc.c {"mfdmasr",	XSPR(31,323,224), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5197 arch/powerpc/xmon/ppc-opc.c {"mfmq",	XSPR(31,339,  0), XSPR_MASK, M601,	0,		{RT}},
XSPR_MASK        5198 arch/powerpc/xmon/ppc-opc.c {"mfxer",	XSPR(31,339,  1), XSPR_MASK, COM,	0,		{RT}},
XSPR_MASK        5199 arch/powerpc/xmon/ppc-opc.c {"mfrtcu",	XSPR(31,339,  4), XSPR_MASK, COM,	TITAN,		{RT}},
XSPR_MASK        5200 arch/powerpc/xmon/ppc-opc.c {"mfrtcl",	XSPR(31,339,  5), XSPR_MASK, COM,	TITAN,		{RT}},
XSPR_MASK        5201 arch/powerpc/xmon/ppc-opc.c {"mfdec",	XSPR(31,339,  6), XSPR_MASK, MFDEC1,	0,		{RT}},
XSPR_MASK        5202 arch/powerpc/xmon/ppc-opc.c {"mflr",	XSPR(31,339,  8), XSPR_MASK, COM,	0,		{RT}},
XSPR_MASK        5203 arch/powerpc/xmon/ppc-opc.c {"mfctr",	XSPR(31,339,  9), XSPR_MASK, COM,	0,		{RT}},
XSPR_MASK        5204 arch/powerpc/xmon/ppc-opc.c {"mfdscr",	XSPR(31,339, 17), XSPR_MASK, POWER6,	0,		{RT}},
XSPR_MASK        5205 arch/powerpc/xmon/ppc-opc.c {"mftid",	XSPR(31,339, 17), XSPR_MASK, POWER,	0,		{RT}},
XSPR_MASK        5206 arch/powerpc/xmon/ppc-opc.c {"mfdsisr",	XSPR(31,339, 18), XSPR_MASK, COM,	TITAN,		{RT}},
XSPR_MASK        5207 arch/powerpc/xmon/ppc-opc.c {"mfdar",	XSPR(31,339, 19), XSPR_MASK, COM,	TITAN,		{RT}},
XSPR_MASK        5208 arch/powerpc/xmon/ppc-opc.c {"mfdec",	XSPR(31,339, 22), XSPR_MASK, MFDEC2,	MFDEC1,		{RT}},
XSPR_MASK        5209 arch/powerpc/xmon/ppc-opc.c {"mfsdr0",	XSPR(31,339, 24), XSPR_MASK, POWER,	0,		{RT}},
XSPR_MASK        5210 arch/powerpc/xmon/ppc-opc.c {"mfsdr1",	XSPR(31,339, 25), XSPR_MASK, COM,	TITAN,		{RT}},
XSPR_MASK        5211 arch/powerpc/xmon/ppc-opc.c {"mfsrr0",	XSPR(31,339, 26), XSPR_MASK, COM,	0,		{RT}},
XSPR_MASK        5212 arch/powerpc/xmon/ppc-opc.c {"mfsrr1",	XSPR(31,339, 27), XSPR_MASK, COM,	0,		{RT}},
XSPR_MASK        5213 arch/powerpc/xmon/ppc-opc.c {"mfcfar",	XSPR(31,339, 28), XSPR_MASK, POWER6,	0,		{RT}},
XSPR_MASK        5214 arch/powerpc/xmon/ppc-opc.c {"mfpid",	XSPR(31,339, 48), XSPR_MASK, BOOKE,	0,		{RT}},
XSPR_MASK        5215 arch/powerpc/xmon/ppc-opc.c {"mfcsrr0",	XSPR(31,339, 58), XSPR_MASK, BOOKE,	0,		{RT}},
XSPR_MASK        5216 arch/powerpc/xmon/ppc-opc.c {"mfcsrr1",	XSPR(31,339, 59), XSPR_MASK, BOOKE,	0,		{RT}},
XSPR_MASK        5217 arch/powerpc/xmon/ppc-opc.c {"mfdear",	XSPR(31,339, 61), XSPR_MASK, BOOKE,	0,		{RT}},
XSPR_MASK        5218 arch/powerpc/xmon/ppc-opc.c {"mfesr",	XSPR(31,339, 62), XSPR_MASK, BOOKE,	0,		{RT}},
XSPR_MASK        5219 arch/powerpc/xmon/ppc-opc.c {"mfivpr",	XSPR(31,339, 63), XSPR_MASK, BOOKE,	0,		{RT}},
XSPR_MASK        5220 arch/powerpc/xmon/ppc-opc.c {"mfctrl",	XSPR(31,339,136), XSPR_MASK, POWER4,	0,		{RT}},
XSPR_MASK        5221 arch/powerpc/xmon/ppc-opc.c {"mfcmpa",	XSPR(31,339,144), XSPR_MASK, PPC860,	0,		{RT}},
XSPR_MASK        5222 arch/powerpc/xmon/ppc-opc.c {"mfcmpb",	XSPR(31,339,145), XSPR_MASK, PPC860,	0,		{RT}},
XSPR_MASK        5223 arch/powerpc/xmon/ppc-opc.c {"mfcmpc",	XSPR(31,339,146), XSPR_MASK, PPC860,	0,		{RT}},
XSPR_MASK        5224 arch/powerpc/xmon/ppc-opc.c {"mfcmpd",	XSPR(31,339,147), XSPR_MASK, PPC860,	0,		{RT}},
XSPR_MASK        5225 arch/powerpc/xmon/ppc-opc.c {"mficr",	XSPR(31,339,148), XSPR_MASK, PPC860,	0,		{RT}},
XSPR_MASK        5226 arch/powerpc/xmon/ppc-opc.c {"mfder",	XSPR(31,339,149), XSPR_MASK, PPC860,	0,		{RT}},
XSPR_MASK        5227 arch/powerpc/xmon/ppc-opc.c {"mfcounta",	XSPR(31,339,150), XSPR_MASK, PPC860,	0,		{RT}},
XSPR_MASK        5228 arch/powerpc/xmon/ppc-opc.c {"mfcountb",	XSPR(31,339,151), XSPR_MASK, PPC860,	0,		{RT}},
XSPR_MASK        5229 arch/powerpc/xmon/ppc-opc.c {"mfcmpe",	XSPR(31,339,152), XSPR_MASK, PPC860,	0,		{RT}},
XSPR_MASK        5230 arch/powerpc/xmon/ppc-opc.c {"mfcmpf",	XSPR(31,339,153), XSPR_MASK, PPC860,	0,		{RT}},
XSPR_MASK        5231 arch/powerpc/xmon/ppc-opc.c {"mfcmpg",	XSPR(31,339,154), XSPR_MASK, PPC860,	0,		{RT}},
XSPR_MASK        5232 arch/powerpc/xmon/ppc-opc.c {"mfcmph",	XSPR(31,339,155), XSPR_MASK, PPC860,	0,		{RT}},
XSPR_MASK        5233 arch/powerpc/xmon/ppc-opc.c {"mflctrl1",	XSPR(31,339,156), XSPR_MASK, PPC860,	0,		{RT}},
XSPR_MASK        5234 arch/powerpc/xmon/ppc-opc.c {"mflctrl2",	XSPR(31,339,157), XSPR_MASK, PPC860,	0,		{RT}},
XSPR_MASK        5235 arch/powerpc/xmon/ppc-opc.c {"mfictrl",	XSPR(31,339,158), XSPR_MASK, PPC860,	0,		{RT}},
XSPR_MASK        5236 arch/powerpc/xmon/ppc-opc.c {"mfbar",	XSPR(31,339,159), XSPR_MASK, PPC860,	0,		{RT}},
XSPR_MASK        5237 arch/powerpc/xmon/ppc-opc.c {"mfvrsave",	XSPR(31,339,256), XSPR_MASK, PPCVEC,	0,		{RT}},
XSPR_MASK        5238 arch/powerpc/xmon/ppc-opc.c {"mfusprg0",	XSPR(31,339,256), XSPR_MASK, BOOKE,	0,		{RT}},
XSPR_MASK        5240 arch/powerpc/xmon/ppc-opc.c {"mfsprg4",	XSPR(31,339,260), XSPR_MASK, PPC405|BOOKE, 0,		{RT}},
XSPR_MASK        5241 arch/powerpc/xmon/ppc-opc.c {"mfsprg5",	XSPR(31,339,261), XSPR_MASK, PPC405|BOOKE, 0,		{RT}},
XSPR_MASK        5242 arch/powerpc/xmon/ppc-opc.c {"mfsprg6",	XSPR(31,339,262), XSPR_MASK, PPC405|BOOKE, 0,		{RT}},
XSPR_MASK        5243 arch/powerpc/xmon/ppc-opc.c {"mfsprg7",	XSPR(31,339,263), XSPR_MASK, PPC405|BOOKE, 0,		{RT}},
XSPR_MASK        5244 arch/powerpc/xmon/ppc-opc.c {"mftbu",	XSPR(31,339,269), XSPR_MASK, POWER4|BOOKE, 0,		{RT}},
XSPR_MASK        5246 arch/powerpc/xmon/ppc-opc.c {"mftbl",	XSPR(31,339,268), XSPR_MASK, POWER4|BOOKE, 0,		{RT}},
XSPR_MASK        5247 arch/powerpc/xmon/ppc-opc.c {"mfsprg0",	XSPR(31,339,272), XSPR_MASK, PPC,	0,		{RT}},
XSPR_MASK        5248 arch/powerpc/xmon/ppc-opc.c {"mfsprg1",	XSPR(31,339,273), XSPR_MASK, PPC,	0,		{RT}},
XSPR_MASK        5249 arch/powerpc/xmon/ppc-opc.c {"mfsprg2",	XSPR(31,339,274), XSPR_MASK, PPC,	0,		{RT}},
XSPR_MASK        5250 arch/powerpc/xmon/ppc-opc.c {"mfsprg3",	XSPR(31,339,275), XSPR_MASK, PPC,	0,		{RT}},
XSPR_MASK        5251 arch/powerpc/xmon/ppc-opc.c {"mfasr",	XSPR(31,339,280), XSPR_MASK, PPC64,	0,		{RT}},
XSPR_MASK        5252 arch/powerpc/xmon/ppc-opc.c {"mfear",	XSPR(31,339,282), XSPR_MASK, PPC,	TITAN,		{RT}},
XSPR_MASK        5253 arch/powerpc/xmon/ppc-opc.c {"mfpir",	XSPR(31,339,286), XSPR_MASK, BOOKE,	0,		{RT}},
XSPR_MASK        5254 arch/powerpc/xmon/ppc-opc.c {"mfpvr",	XSPR(31,339,287), XSPR_MASK, PPC,	0,		{RT}},
XSPR_MASK        5255 arch/powerpc/xmon/ppc-opc.c {"mfdbsr",	XSPR(31,339,304), XSPR_MASK, BOOKE,	0,		{RT}},
XSPR_MASK        5256 arch/powerpc/xmon/ppc-opc.c {"mfdbcr0",	XSPR(31,339,308), XSPR_MASK, BOOKE,	0,		{RT}},
XSPR_MASK        5257 arch/powerpc/xmon/ppc-opc.c {"mfdbcr1",	XSPR(31,339,309), XSPR_MASK, BOOKE,	0,		{RT}},
XSPR_MASK        5258 arch/powerpc/xmon/ppc-opc.c {"mfdbcr2",	XSPR(31,339,310), XSPR_MASK, BOOKE,	0,		{RT}},
XSPR_MASK        5259 arch/powerpc/xmon/ppc-opc.c {"mfiac1",	XSPR(31,339,312), XSPR_MASK, BOOKE,	0,		{RT}},
XSPR_MASK        5260 arch/powerpc/xmon/ppc-opc.c {"mfiac2",	XSPR(31,339,313), XSPR_MASK, BOOKE,	0,		{RT}},
XSPR_MASK        5261 arch/powerpc/xmon/ppc-opc.c {"mfiac3",	XSPR(31,339,314), XSPR_MASK, BOOKE,	0,		{RT}},
XSPR_MASK        5262 arch/powerpc/xmon/ppc-opc.c {"mfiac4",	XSPR(31,339,315), XSPR_MASK, BOOKE,	0,		{RT}},
XSPR_MASK        5263 arch/powerpc/xmon/ppc-opc.c {"mfdac1",	XSPR(31,339,316), XSPR_MASK, BOOKE,	0,		{RT}},
XSPR_MASK        5264 arch/powerpc/xmon/ppc-opc.c {"mfdac2",	XSPR(31,339,317), XSPR_MASK, BOOKE,	0,		{RT}},
XSPR_MASK        5265 arch/powerpc/xmon/ppc-opc.c {"mfdvc1",	XSPR(31,339,318), XSPR_MASK, BOOKE,	0,		{RT}},
XSPR_MASK        5266 arch/powerpc/xmon/ppc-opc.c {"mfdvc2",	XSPR(31,339,319), XSPR_MASK, BOOKE,	0,		{RT}},
XSPR_MASK        5267 arch/powerpc/xmon/ppc-opc.c {"mftsr",	XSPR(31,339,336), XSPR_MASK, BOOKE,	0,		{RT}},
XSPR_MASK        5268 arch/powerpc/xmon/ppc-opc.c {"mftcr",	XSPR(31,339,340), XSPR_MASK, BOOKE,	0,		{RT}},
XSPR_MASK        5269 arch/powerpc/xmon/ppc-opc.c {"mfivor0",	XSPR(31,339,400), XSPR_MASK, BOOKE,	0,		{RT}},
XSPR_MASK        5270 arch/powerpc/xmon/ppc-opc.c {"mfivor1",	XSPR(31,339,401), XSPR_MASK, BOOKE,	0,		{RT}},
XSPR_MASK        5271 arch/powerpc/xmon/ppc-opc.c {"mfivor2",	XSPR(31,339,402), XSPR_MASK, BOOKE,	0,		{RT}},
XSPR_MASK        5272 arch/powerpc/xmon/ppc-opc.c {"mfivor3",	XSPR(31,339,403), XSPR_MASK, BOOKE,	0,		{RT}},
XSPR_MASK        5273 arch/powerpc/xmon/ppc-opc.c {"mfivor4",	XSPR(31,339,404), XSPR_MASK, BOOKE,	0,		{RT}},
XSPR_MASK        5274 arch/powerpc/xmon/ppc-opc.c {"mfivor5",	XSPR(31,339,405), XSPR_MASK, BOOKE,	0,		{RT}},
XSPR_MASK        5275 arch/powerpc/xmon/ppc-opc.c {"mfivor6",	XSPR(31,339,406), XSPR_MASK, BOOKE,	0,		{RT}},
XSPR_MASK        5276 arch/powerpc/xmon/ppc-opc.c {"mfivor7",	XSPR(31,339,407), XSPR_MASK, BOOKE,	0,		{RT}},
XSPR_MASK        5277 arch/powerpc/xmon/ppc-opc.c {"mfivor8",	XSPR(31,339,408), XSPR_MASK, BOOKE,	0,		{RT}},
XSPR_MASK        5278 arch/powerpc/xmon/ppc-opc.c {"mfivor9",	XSPR(31,339,409), XSPR_MASK, BOOKE,	0,		{RT}},
XSPR_MASK        5279 arch/powerpc/xmon/ppc-opc.c {"mfivor10",	XSPR(31,339,410), XSPR_MASK, BOOKE,	0,		{RT}},
XSPR_MASK        5280 arch/powerpc/xmon/ppc-opc.c {"mfivor11",	XSPR(31,339,411), XSPR_MASK, BOOKE,	0,		{RT}},
XSPR_MASK        5281 arch/powerpc/xmon/ppc-opc.c {"mfivor12",	XSPR(31,339,412), XSPR_MASK, BOOKE,	0,		{RT}},
XSPR_MASK        5282 arch/powerpc/xmon/ppc-opc.c {"mfivor13",	XSPR(31,339,413), XSPR_MASK, BOOKE,	0,		{RT}},
XSPR_MASK        5283 arch/powerpc/xmon/ppc-opc.c {"mfivor14",	XSPR(31,339,414), XSPR_MASK, BOOKE,	0,		{RT}},
XSPR_MASK        5284 arch/powerpc/xmon/ppc-opc.c {"mfivor15",	XSPR(31,339,415), XSPR_MASK, BOOKE,	0,		{RT}},
XSPR_MASK        5285 arch/powerpc/xmon/ppc-opc.c {"mfspefscr",	XSPR(31,339,512), XSPR_MASK, PPCSPE,	0,		{RT}},
XSPR_MASK        5286 arch/powerpc/xmon/ppc-opc.c {"mfbbear",	XSPR(31,339,513), XSPR_MASK, PPCBRLK,	0,		{RT}},
XSPR_MASK        5287 arch/powerpc/xmon/ppc-opc.c {"mfbbtar",	XSPR(31,339,514), XSPR_MASK, PPCBRLK,	0,		{RT}},
XSPR_MASK        5288 arch/powerpc/xmon/ppc-opc.c {"mfivor32",	XSPR(31,339,528), XSPR_MASK, PPCSPE,	0,		{RT}},
XSPR_MASK        5290 arch/powerpc/xmon/ppc-opc.c {"mfivor33",	XSPR(31,339,529), XSPR_MASK, PPCSPE,	0,		{RT}},
XSPR_MASK        5292 arch/powerpc/xmon/ppc-opc.c {"mfivor34",	XSPR(31,339,530), XSPR_MASK, PPCSPE,	0,		{RT}},
XSPR_MASK        5293 arch/powerpc/xmon/ppc-opc.c {"mfivor35",	XSPR(31,339,531), XSPR_MASK, PPCPMR,	0,		{RT}},
XSPR_MASK        5296 arch/powerpc/xmon/ppc-opc.c {"mfic_cst",	XSPR(31,339,560), XSPR_MASK, PPC860,	0,		{RT}},
XSPR_MASK        5297 arch/powerpc/xmon/ppc-opc.c {"mfic_adr",	XSPR(31,339,561), XSPR_MASK, PPC860,	0,		{RT}},
XSPR_MASK        5298 arch/powerpc/xmon/ppc-opc.c {"mfic_dat",	XSPR(31,339,562), XSPR_MASK, PPC860,	0,		{RT}},
XSPR_MASK        5299 arch/powerpc/xmon/ppc-opc.c {"mfdc_cst",	XSPR(31,339,568), XSPR_MASK, PPC860,	0,		{RT}},
XSPR_MASK        5300 arch/powerpc/xmon/ppc-opc.c {"mfdc_adr",	XSPR(31,339,569), XSPR_MASK, PPC860,	0,		{RT}},
XSPR_MASK        5301 arch/powerpc/xmon/ppc-opc.c {"mfdc_dat",	XSPR(31,339,570), XSPR_MASK, PPC860,	0,		{RT}},
XSPR_MASK        5302 arch/powerpc/xmon/ppc-opc.c {"mfmcsrr0",	XSPR(31,339,570), XSPR_MASK, PPCRFMCI,	0,		{RT}},
XSPR_MASK        5303 arch/powerpc/xmon/ppc-opc.c {"mfmcsrr1",	XSPR(31,339,571), XSPR_MASK, PPCRFMCI,	0,		{RT}},
XSPR_MASK        5304 arch/powerpc/xmon/ppc-opc.c {"mfmcsr",	XSPR(31,339,572), XSPR_MASK, PPCRFMCI,	0,		{RT}},
XSPR_MASK        5305 arch/powerpc/xmon/ppc-opc.c {"mfmcar",	XSPR(31,339,573), XSPR_MASK, PPCRFMCI,	TITAN,		{RT}},
XSPR_MASK        5306 arch/powerpc/xmon/ppc-opc.c {"mfdpdr",	XSPR(31,339,630), XSPR_MASK, PPC860,	0,		{RT}},
XSPR_MASK        5307 arch/powerpc/xmon/ppc-opc.c {"mfdpir",	XSPR(31,339,631), XSPR_MASK, PPC860,	0,		{RT}},
XSPR_MASK        5308 arch/powerpc/xmon/ppc-opc.c {"mfimmr",	XSPR(31,339,638), XSPR_MASK, PPC860,	0,		{RT}},
XSPR_MASK        5309 arch/powerpc/xmon/ppc-opc.c {"mfmi_ctr",	XSPR(31,339,784), XSPR_MASK, PPC860,	0,		{RT}},
XSPR_MASK        5310 arch/powerpc/xmon/ppc-opc.c {"mfmi_ap",	XSPR(31,339,786), XSPR_MASK, PPC860,	0,		{RT}},
XSPR_MASK        5311 arch/powerpc/xmon/ppc-opc.c {"mfmi_epn",	XSPR(31,339,787), XSPR_MASK, PPC860,	0,		{RT}},
XSPR_MASK        5312 arch/powerpc/xmon/ppc-opc.c {"mfmi_twc",	XSPR(31,339,789), XSPR_MASK, PPC860,	0,		{RT}},
XSPR_MASK        5313 arch/powerpc/xmon/ppc-opc.c {"mfmi_rpn",	XSPR(31,339,790), XSPR_MASK, PPC860,	0,		{RT}},
XSPR_MASK        5314 arch/powerpc/xmon/ppc-opc.c {"mfmd_ctr",	XSPR(31,339,792), XSPR_MASK, PPC860,	0,		{RT}},
XSPR_MASK        5315 arch/powerpc/xmon/ppc-opc.c {"mfm_casid",	XSPR(31,339,793), XSPR_MASK, PPC860,	0,		{RT}},
XSPR_MASK        5316 arch/powerpc/xmon/ppc-opc.c {"mfmd_ap",	XSPR(31,339,794), XSPR_MASK, PPC860,	0,		{RT}},
XSPR_MASK        5317 arch/powerpc/xmon/ppc-opc.c {"mfmd_epn",	XSPR(31,339,795), XSPR_MASK, PPC860,	0,		{RT}},
XSPR_MASK        5318 arch/powerpc/xmon/ppc-opc.c {"mfmd_twb",	XSPR(31,339,796), XSPR_MASK, PPC860,	0,		{RT}},
XSPR_MASK        5319 arch/powerpc/xmon/ppc-opc.c {"mfmd_twc",	XSPR(31,339,797), XSPR_MASK, PPC860,	0,		{RT}},
XSPR_MASK        5320 arch/powerpc/xmon/ppc-opc.c {"mfmd_rpn",	XSPR(31,339,798), XSPR_MASK, PPC860,	0,		{RT}},
XSPR_MASK        5321 arch/powerpc/xmon/ppc-opc.c {"mfm_tw",	XSPR(31,339,799), XSPR_MASK, PPC860,	0,		{RT}},
XSPR_MASK        5322 arch/powerpc/xmon/ppc-opc.c {"mfmi_dbcam",	XSPR(31,339,816), XSPR_MASK, PPC860,	0,		{RT}},
XSPR_MASK        5323 arch/powerpc/xmon/ppc-opc.c {"mfmi_dbram0",	XSPR(31,339,817), XSPR_MASK, PPC860,	0,		{RT}},
XSPR_MASK        5324 arch/powerpc/xmon/ppc-opc.c {"mfmi_dbram1",	XSPR(31,339,818), XSPR_MASK, PPC860,	0,		{RT}},
XSPR_MASK        5325 arch/powerpc/xmon/ppc-opc.c {"mfmd_dbcam",	XSPR(31,339,824), XSPR_MASK, PPC860,	0,		{RT}},
XSPR_MASK        5326 arch/powerpc/xmon/ppc-opc.c {"mfmd_dbram0",	XSPR(31,339,825), XSPR_MASK, PPC860,	0,		{RT}},
XSPR_MASK        5327 arch/powerpc/xmon/ppc-opc.c {"mfmd_dbram1",	XSPR(31,339,826), XSPR_MASK, PPC860,	0,		{RT}},
XSPR_MASK        5328 arch/powerpc/xmon/ppc-opc.c {"mfivndx",	XSPR(31,339,880), XSPR_MASK, TITAN,	0,		{RT}},
XSPR_MASK        5329 arch/powerpc/xmon/ppc-opc.c {"mfdvndx",	XSPR(31,339,881), XSPR_MASK, TITAN,	0,		{RT}},
XSPR_MASK        5330 arch/powerpc/xmon/ppc-opc.c {"mfivlim",	XSPR(31,339,882), XSPR_MASK, TITAN,	0,		{RT}},
XSPR_MASK        5331 arch/powerpc/xmon/ppc-opc.c {"mfdvlim",	XSPR(31,339,883), XSPR_MASK, TITAN,	0,		{RT}},
XSPR_MASK        5332 arch/powerpc/xmon/ppc-opc.c {"mfclcsr",	XSPR(31,339,884), XSPR_MASK, TITAN,	0,		{RT}},
XSPR_MASK        5333 arch/powerpc/xmon/ppc-opc.c {"mfccr1",	XSPR(31,339,888), XSPR_MASK, TITAN,	0,		{RT}},
XSPR_MASK        5334 arch/powerpc/xmon/ppc-opc.c {"mfppr",	XSPR(31,339,896), XSPR_MASK, POWER7,	0,		{RT}},
XSPR_MASK        5335 arch/powerpc/xmon/ppc-opc.c {"mfppr32",	XSPR(31,339,898), XSPR_MASK, POWER7,	0,		{RT}},
XSPR_MASK        5336 arch/powerpc/xmon/ppc-opc.c {"mfrstcfg",	XSPR(31,339,923), XSPR_MASK, TITAN,	0,		{RT}},
XSPR_MASK        5337 arch/powerpc/xmon/ppc-opc.c {"mfdcdbtrl",	XSPR(31,339,924), XSPR_MASK, TITAN,	0,		{RT}},
XSPR_MASK        5338 arch/powerpc/xmon/ppc-opc.c {"mfdcdbtrh",	XSPR(31,339,925), XSPR_MASK, TITAN,	0,		{RT}},
XSPR_MASK        5339 arch/powerpc/xmon/ppc-opc.c {"mficdbtr",	XSPR(31,339,927), XSPR_MASK, TITAN,	0,		{RT}},
XSPR_MASK        5340 arch/powerpc/xmon/ppc-opc.c {"mfummcr0",	XSPR(31,339,936), XSPR_MASK, PPC750,	0,		{RT}},
XSPR_MASK        5341 arch/powerpc/xmon/ppc-opc.c {"mfupmc1",	XSPR(31,339,937), XSPR_MASK, PPC750,	0,		{RT}},
XSPR_MASK        5342 arch/powerpc/xmon/ppc-opc.c {"mfupmc2",	XSPR(31,339,938), XSPR_MASK, PPC750,	0,		{RT}},
XSPR_MASK        5343 arch/powerpc/xmon/ppc-opc.c {"mfusia",	XSPR(31,339,939), XSPR_MASK, PPC750,	0,		{RT}},
XSPR_MASK        5344 arch/powerpc/xmon/ppc-opc.c {"mfummcr1",	XSPR(31,339,940), XSPR_MASK, PPC750,	0,		{RT}},
XSPR_MASK        5345 arch/powerpc/xmon/ppc-opc.c {"mfupmc3",	XSPR(31,339,941), XSPR_MASK, PPC750,	0,		{RT}},
XSPR_MASK        5346 arch/powerpc/xmon/ppc-opc.c {"mfupmc4",	XSPR(31,339,942), XSPR_MASK, PPC750,	0,		{RT}},
XSPR_MASK        5347 arch/powerpc/xmon/ppc-opc.c {"mfzpr",	XSPR(31,339,944), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5348 arch/powerpc/xmon/ppc-opc.c {"mfpid",	XSPR(31,339,945), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5349 arch/powerpc/xmon/ppc-opc.c {"mfmmucr",	XSPR(31,339,946), XSPR_MASK, TITAN,	0,		{RT}},
XSPR_MASK        5350 arch/powerpc/xmon/ppc-opc.c {"mfccr0",	XSPR(31,339,947), XSPR_MASK, PPC405|TITAN, 0,		{RT}},
XSPR_MASK        5351 arch/powerpc/xmon/ppc-opc.c {"mfiac3",	XSPR(31,339,948), XSPR_MASK, PPC405,	0,		{RT}},
XSPR_MASK        5352 arch/powerpc/xmon/ppc-opc.c {"mfiac4",	XSPR(31,339,949), XSPR_MASK, PPC405,	0,		{RT}},
XSPR_MASK        5353 arch/powerpc/xmon/ppc-opc.c {"mfdvc1",	XSPR(31,339,950), XSPR_MASK, PPC405,	0,		{RT}},
XSPR_MASK        5354 arch/powerpc/xmon/ppc-opc.c {"mfdvc2",	XSPR(31,339,951), XSPR_MASK, PPC405,	0,		{RT}},
XSPR_MASK        5355 arch/powerpc/xmon/ppc-opc.c {"mfmmcr0",	XSPR(31,339,952), XSPR_MASK, PPC750,	0,		{RT}},
XSPR_MASK        5356 arch/powerpc/xmon/ppc-opc.c {"mfpmc1",	XSPR(31,339,953), XSPR_MASK, PPC750,	0,		{RT}},
XSPR_MASK        5357 arch/powerpc/xmon/ppc-opc.c {"mfsgr",	XSPR(31,339,953), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5358 arch/powerpc/xmon/ppc-opc.c {"mfdcwr",	XSPR(31,339,954), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5359 arch/powerpc/xmon/ppc-opc.c {"mfpmc2",	XSPR(31,339,954), XSPR_MASK, PPC750,	0,		{RT}},
XSPR_MASK        5360 arch/powerpc/xmon/ppc-opc.c {"mfsia",	XSPR(31,339,955), XSPR_MASK, PPC750,	0,		{RT}},
XSPR_MASK        5361 arch/powerpc/xmon/ppc-opc.c {"mfsler",	XSPR(31,339,955), XSPR_MASK, PPC405,	0,		{RT}},
XSPR_MASK        5362 arch/powerpc/xmon/ppc-opc.c {"mfmmcr1",	XSPR(31,339,956), XSPR_MASK, PPC750,	0,		{RT}},
XSPR_MASK        5363 arch/powerpc/xmon/ppc-opc.c {"mfsu0r",	XSPR(31,339,956), XSPR_MASK, PPC405,	0,		{RT}},
XSPR_MASK        5364 arch/powerpc/xmon/ppc-opc.c {"mfdbcr1",	XSPR(31,339,957), XSPR_MASK, PPC405,	0,		{RT}},
XSPR_MASK        5365 arch/powerpc/xmon/ppc-opc.c {"mfpmc3",	XSPR(31,339,957), XSPR_MASK, PPC750,	0,		{RT}},
XSPR_MASK        5366 arch/powerpc/xmon/ppc-opc.c {"mfpmc4",	XSPR(31,339,958), XSPR_MASK, PPC750,	0,		{RT}},
XSPR_MASK        5367 arch/powerpc/xmon/ppc-opc.c {"mficdbdr",	XSPR(31,339,979), XSPR_MASK, PPC403|TITAN, 0,		{RT}},
XSPR_MASK        5368 arch/powerpc/xmon/ppc-opc.c {"mfesr",	XSPR(31,339,980), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5369 arch/powerpc/xmon/ppc-opc.c {"mfdear",	XSPR(31,339,981), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5370 arch/powerpc/xmon/ppc-opc.c {"mfevpr",	XSPR(31,339,982), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5371 arch/powerpc/xmon/ppc-opc.c {"mfcdbcr",	XSPR(31,339,983), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5372 arch/powerpc/xmon/ppc-opc.c {"mftsr",	XSPR(31,339,984), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5373 arch/powerpc/xmon/ppc-opc.c {"mftcr",	XSPR(31,339,986), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5374 arch/powerpc/xmon/ppc-opc.c {"mfpit",	XSPR(31,339,987), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5375 arch/powerpc/xmon/ppc-opc.c {"mftbhi",	XSPR(31,339,988), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5376 arch/powerpc/xmon/ppc-opc.c {"mftblo",	XSPR(31,339,989), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5377 arch/powerpc/xmon/ppc-opc.c {"mfsrr2",	XSPR(31,339,990), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5378 arch/powerpc/xmon/ppc-opc.c {"mfsrr3",	XSPR(31,339,991), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5379 arch/powerpc/xmon/ppc-opc.c {"mfdbsr",	XSPR(31,339,1008), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5380 arch/powerpc/xmon/ppc-opc.c {"mfdbcr0",	XSPR(31,339,1010), XSPR_MASK, PPC405,	0,		{RT}},
XSPR_MASK        5381 arch/powerpc/xmon/ppc-opc.c {"mfdbdr",	XSPR(31,339,1011), XSPR_MASK, TITAN,	0,		{RS}},
XSPR_MASK        5382 arch/powerpc/xmon/ppc-opc.c {"mfiac1",	XSPR(31,339,1012), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5383 arch/powerpc/xmon/ppc-opc.c {"mfiac2",	XSPR(31,339,1013), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5384 arch/powerpc/xmon/ppc-opc.c {"mfdac1",	XSPR(31,339,1014), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5385 arch/powerpc/xmon/ppc-opc.c {"mfdac2",	XSPR(31,339,1015), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5386 arch/powerpc/xmon/ppc-opc.c {"mfl2cr",	XSPR(31,339,1017), XSPR_MASK, PPC750,	0,		{RT}},
XSPR_MASK        5387 arch/powerpc/xmon/ppc-opc.c {"mfdccr",	XSPR(31,339,1018), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5388 arch/powerpc/xmon/ppc-opc.c {"mficcr",	XSPR(31,339,1019), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5389 arch/powerpc/xmon/ppc-opc.c {"mfictc",	XSPR(31,339,1019), XSPR_MASK, PPC750,	0,		{RT}},
XSPR_MASK        5390 arch/powerpc/xmon/ppc-opc.c {"mfpbl1",	XSPR(31,339,1020), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5391 arch/powerpc/xmon/ppc-opc.c {"mfthrm1",	XSPR(31,339,1020), XSPR_MASK, PPC750,	0,		{RT}},
XSPR_MASK        5392 arch/powerpc/xmon/ppc-opc.c {"mfpbu1",	XSPR(31,339,1021), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5393 arch/powerpc/xmon/ppc-opc.c {"mfthrm2",	XSPR(31,339,1021), XSPR_MASK, PPC750,	0,		{RT}},
XSPR_MASK        5394 arch/powerpc/xmon/ppc-opc.c {"mfpbl2",	XSPR(31,339,1022), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5395 arch/powerpc/xmon/ppc-opc.c {"mfthrm3",	XSPR(31,339,1022), XSPR_MASK, PPC750,	0,		{RT}},
XSPR_MASK        5396 arch/powerpc/xmon/ppc-opc.c {"mfpbu2",	XSPR(31,339,1023), XSPR_MASK, PPC403,	0,		{RT}},
XSPR_MASK        5417 arch/powerpc/xmon/ppc-opc.c {"mftbu",	XSPR(31,371,269), XSPR_MASK, PPC,	NO371|POWER4,	{RT}},
XSPR_MASK        5419 arch/powerpc/xmon/ppc-opc.c {"mftbl",	XSPR(31,371,268), XSPR_MASK, PPC,	NO371|POWER4,	{RT}},
XSPR_MASK        5500 arch/powerpc/xmon/ppc-opc.c {"mtexisr",	XSPR(31,451, 64), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5501 arch/powerpc/xmon/ppc-opc.c {"mtexier",	XSPR(31,451, 66), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5502 arch/powerpc/xmon/ppc-opc.c {"mtbr0",	XSPR(31,451,128), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5503 arch/powerpc/xmon/ppc-opc.c {"mtbr1",	XSPR(31,451,129), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5504 arch/powerpc/xmon/ppc-opc.c {"mtbr2",	XSPR(31,451,130), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5505 arch/powerpc/xmon/ppc-opc.c {"mtbr3",	XSPR(31,451,131), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5506 arch/powerpc/xmon/ppc-opc.c {"mtbr4",	XSPR(31,451,132), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5507 arch/powerpc/xmon/ppc-opc.c {"mtbr5",	XSPR(31,451,133), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5508 arch/powerpc/xmon/ppc-opc.c {"mtbr6",	XSPR(31,451,134), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5509 arch/powerpc/xmon/ppc-opc.c {"mtbr7",	XSPR(31,451,135), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5510 arch/powerpc/xmon/ppc-opc.c {"mtbear",	XSPR(31,451,144), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5511 arch/powerpc/xmon/ppc-opc.c {"mtbesr",	XSPR(31,451,145), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5512 arch/powerpc/xmon/ppc-opc.c {"mtiocr",	XSPR(31,451,160), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5513 arch/powerpc/xmon/ppc-opc.c {"mtdmacr0",	XSPR(31,451,192), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5514 arch/powerpc/xmon/ppc-opc.c {"mtdmact0",	XSPR(31,451,193), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5515 arch/powerpc/xmon/ppc-opc.c {"mtdmada0",	XSPR(31,451,194), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5516 arch/powerpc/xmon/ppc-opc.c {"mtdmasa0",	XSPR(31,451,195), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5517 arch/powerpc/xmon/ppc-opc.c {"mtdmacc0",	XSPR(31,451,196), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5518 arch/powerpc/xmon/ppc-opc.c {"mtdmacr1",	XSPR(31,451,200), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5519 arch/powerpc/xmon/ppc-opc.c {"mtdmact1",	XSPR(31,451,201), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5520 arch/powerpc/xmon/ppc-opc.c {"mtdmada1",	XSPR(31,451,202), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5521 arch/powerpc/xmon/ppc-opc.c {"mtdmasa1",	XSPR(31,451,203), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5522 arch/powerpc/xmon/ppc-opc.c {"mtdmacc1",	XSPR(31,451,204), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5523 arch/powerpc/xmon/ppc-opc.c {"mtdmacr2",	XSPR(31,451,208), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5524 arch/powerpc/xmon/ppc-opc.c {"mtdmact2",	XSPR(31,451,209), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5525 arch/powerpc/xmon/ppc-opc.c {"mtdmada2",	XSPR(31,451,210), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5526 arch/powerpc/xmon/ppc-opc.c {"mtdmasa2",	XSPR(31,451,211), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5527 arch/powerpc/xmon/ppc-opc.c {"mtdmacc2",	XSPR(31,451,212), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5528 arch/powerpc/xmon/ppc-opc.c {"mtdmacr3",	XSPR(31,451,216), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5529 arch/powerpc/xmon/ppc-opc.c {"mtdmact3",	XSPR(31,451,217), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5530 arch/powerpc/xmon/ppc-opc.c {"mtdmada3",	XSPR(31,451,218), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5531 arch/powerpc/xmon/ppc-opc.c {"mtdmasa3",	XSPR(31,451,219), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5532 arch/powerpc/xmon/ppc-opc.c {"mtdmacc3",	XSPR(31,451,220), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5533 arch/powerpc/xmon/ppc-opc.c {"mtdmasr",	XSPR(31,451,224), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5553 arch/powerpc/xmon/ppc-opc.c {"mtmq",	XSPR(31,467,  0), XSPR_MASK, M601,	0,		{RS}},
XSPR_MASK        5554 arch/powerpc/xmon/ppc-opc.c {"mtxer",	XSPR(31,467,  1), XSPR_MASK, COM,	0,		{RS}},
XSPR_MASK        5555 arch/powerpc/xmon/ppc-opc.c {"mtlr",	XSPR(31,467,  8), XSPR_MASK, COM,	0,		{RS}},
XSPR_MASK        5556 arch/powerpc/xmon/ppc-opc.c {"mtctr",	XSPR(31,467,  9), XSPR_MASK, COM,	0,		{RS}},
XSPR_MASK        5557 arch/powerpc/xmon/ppc-opc.c {"mtdscr",	XSPR(31,467, 17), XSPR_MASK, POWER6,	0,		{RS}},
XSPR_MASK        5558 arch/powerpc/xmon/ppc-opc.c {"mttid",	XSPR(31,467, 17), XSPR_MASK, POWER,	0,		{RS}},
XSPR_MASK        5559 arch/powerpc/xmon/ppc-opc.c {"mtdsisr",	XSPR(31,467, 18), XSPR_MASK, COM,	TITAN,		{RS}},
XSPR_MASK        5560 arch/powerpc/xmon/ppc-opc.c {"mtdar",	XSPR(31,467, 19), XSPR_MASK, COM,	TITAN,		{RS}},
XSPR_MASK        5561 arch/powerpc/xmon/ppc-opc.c {"mtrtcu",	XSPR(31,467, 20), XSPR_MASK, COM,	TITAN,		{RS}},
XSPR_MASK        5562 arch/powerpc/xmon/ppc-opc.c {"mtrtcl",	XSPR(31,467, 21), XSPR_MASK, COM,	TITAN,		{RS}},
XSPR_MASK        5563 arch/powerpc/xmon/ppc-opc.c {"mtdec",	XSPR(31,467, 22), XSPR_MASK, COM,	0,		{RS}},
XSPR_MASK        5564 arch/powerpc/xmon/ppc-opc.c {"mtsdr0",	XSPR(31,467, 24), XSPR_MASK, POWER,	0,		{RS}},
XSPR_MASK        5565 arch/powerpc/xmon/ppc-opc.c {"mtsdr1",	XSPR(31,467, 25), XSPR_MASK, COM,	TITAN,		{RS}},
XSPR_MASK        5566 arch/powerpc/xmon/ppc-opc.c {"mtsrr0",	XSPR(31,467, 26), XSPR_MASK, COM,	0,		{RS}},
XSPR_MASK        5567 arch/powerpc/xmon/ppc-opc.c {"mtsrr1",	XSPR(31,467, 27), XSPR_MASK, COM,	0,		{RS}},
XSPR_MASK        5568 arch/powerpc/xmon/ppc-opc.c {"mtcfar",	XSPR(31,467, 28), XSPR_MASK, POWER6,	0,		{RS}},
XSPR_MASK        5569 arch/powerpc/xmon/ppc-opc.c {"mtpid",	XSPR(31,467, 48), XSPR_MASK, BOOKE,	0,		{RS}},
XSPR_MASK        5570 arch/powerpc/xmon/ppc-opc.c {"mtdecar",	XSPR(31,467, 54), XSPR_MASK, BOOKE,	0,		{RS}},
XSPR_MASK        5571 arch/powerpc/xmon/ppc-opc.c {"mtcsrr0",	XSPR(31,467, 58), XSPR_MASK, BOOKE,	0,		{RS}},
XSPR_MASK        5572 arch/powerpc/xmon/ppc-opc.c {"mtcsrr1",	XSPR(31,467, 59), XSPR_MASK, BOOKE,	0,		{RS}},
XSPR_MASK        5573 arch/powerpc/xmon/ppc-opc.c {"mtdear",	XSPR(31,467, 61), XSPR_MASK, BOOKE,	0,		{RS}},
XSPR_MASK        5574 arch/powerpc/xmon/ppc-opc.c {"mtesr",	XSPR(31,467, 62), XSPR_MASK, BOOKE,	0,		{RS}},
XSPR_MASK        5575 arch/powerpc/xmon/ppc-opc.c {"mtivpr",	XSPR(31,467, 63), XSPR_MASK, BOOKE,	0,		{RS}},
XSPR_MASK        5576 arch/powerpc/xmon/ppc-opc.c {"mtcmpa",	XSPR(31,467,144), XSPR_MASK, PPC860,	0,		{RS}},
XSPR_MASK        5577 arch/powerpc/xmon/ppc-opc.c {"mtcmpb",	XSPR(31,467,145), XSPR_MASK, PPC860,	0,		{RS}},
XSPR_MASK        5578 arch/powerpc/xmon/ppc-opc.c {"mtcmpc",	XSPR(31,467,146), XSPR_MASK, PPC860,	0,		{RS}},
XSPR_MASK        5579 arch/powerpc/xmon/ppc-opc.c {"mtcmpd",	XSPR(31,467,147), XSPR_MASK, PPC860,	0,		{RS}},
XSPR_MASK        5580 arch/powerpc/xmon/ppc-opc.c {"mticr",	XSPR(31,467,148), XSPR_MASK, PPC860,	0,		{RS}},
XSPR_MASK        5581 arch/powerpc/xmon/ppc-opc.c {"mtder",	XSPR(31,467,149), XSPR_MASK, PPC860,	0,		{RS}},
XSPR_MASK        5582 arch/powerpc/xmon/ppc-opc.c {"mtcounta",	XSPR(31,467,150), XSPR_MASK, PPC860,	0,		{RS}},
XSPR_MASK        5583 arch/powerpc/xmon/ppc-opc.c {"mtcountb",	XSPR(31,467,151), XSPR_MASK, PPC860,	0,		{RS}},
XSPR_MASK        5584 arch/powerpc/xmon/ppc-opc.c {"mtctrl",	XSPR(31,467,152), XSPR_MASK, POWER4,	0,		{RS}},
XSPR_MASK        5585 arch/powerpc/xmon/ppc-opc.c {"mtcmpe",	XSPR(31,467,152), XSPR_MASK, PPC860,	0,		{RS}},
XSPR_MASK        5586 arch/powerpc/xmon/ppc-opc.c {"mtcmpf",	XSPR(31,467,153), XSPR_MASK, PPC860,	0,		{RS}},
XSPR_MASK        5587 arch/powerpc/xmon/ppc-opc.c {"mtcmpg",	XSPR(31,467,154), XSPR_MASK, PPC860,	0,		{RS}},
XSPR_MASK        5588 arch/powerpc/xmon/ppc-opc.c {"mtcmph",	XSPR(31,467,155), XSPR_MASK, PPC860,	0,		{RS}},
XSPR_MASK        5589 arch/powerpc/xmon/ppc-opc.c {"mtlctrl1",	XSPR(31,467,156), XSPR_MASK, PPC860,	0,		{RS}},
XSPR_MASK        5590 arch/powerpc/xmon/ppc-opc.c {"mtlctrl2",	XSPR(31,467,157), XSPR_MASK, PPC860,	0,		{RS}},
XSPR_MASK        5591 arch/powerpc/xmon/ppc-opc.c {"mtictrl",	XSPR(31,467,158), XSPR_MASK, PPC860,	0,		{RS}},
XSPR_MASK        5592 arch/powerpc/xmon/ppc-opc.c {"mtbar",	XSPR(31,467,159), XSPR_MASK, PPC860,	0,		{RS}},
XSPR_MASK        5593 arch/powerpc/xmon/ppc-opc.c {"mtvrsave",	XSPR(31,467,256), XSPR_MASK, PPCVEC,	0,		{RS}},
XSPR_MASK        5594 arch/powerpc/xmon/ppc-opc.c {"mtusprg0",	XSPR(31,467,256), XSPR_MASK, BOOKE,	0,		{RS}},
XSPR_MASK        5596 arch/powerpc/xmon/ppc-opc.c {"mtsprg0",	XSPR(31,467,272), XSPR_MASK, PPC,	0,		{RS}},
XSPR_MASK        5597 arch/powerpc/xmon/ppc-opc.c {"mtsprg1",	XSPR(31,467,273), XSPR_MASK, PPC,	0,		{RS}},
XSPR_MASK        5598 arch/powerpc/xmon/ppc-opc.c {"mtsprg2",	XSPR(31,467,274), XSPR_MASK, PPC,	0,		{RS}},
XSPR_MASK        5599 arch/powerpc/xmon/ppc-opc.c {"mtsprg3",	XSPR(31,467,275), XSPR_MASK, PPC,	0,		{RS}},
XSPR_MASK        5600 arch/powerpc/xmon/ppc-opc.c {"mtsprg4",	XSPR(31,467,276), XSPR_MASK, PPC405|BOOKE, 0,		{RS}},
XSPR_MASK        5601 arch/powerpc/xmon/ppc-opc.c {"mtsprg5",	XSPR(31,467,277), XSPR_MASK, PPC405|BOOKE, 0,		{RS}},
XSPR_MASK        5602 arch/powerpc/xmon/ppc-opc.c {"mtsprg6",	XSPR(31,467,278), XSPR_MASK, PPC405|BOOKE, 0,		{RS}},
XSPR_MASK        5603 arch/powerpc/xmon/ppc-opc.c {"mtsprg7",	XSPR(31,467,279), XSPR_MASK, PPC405|BOOKE, 0,		{RS}},
XSPR_MASK        5604 arch/powerpc/xmon/ppc-opc.c {"mtasr",	XSPR(31,467,280), XSPR_MASK, PPC64,	0,		{RS}},
XSPR_MASK        5605 arch/powerpc/xmon/ppc-opc.c {"mtear",	XSPR(31,467,282), XSPR_MASK, PPC,	TITAN,		{RS}},
XSPR_MASK        5606 arch/powerpc/xmon/ppc-opc.c {"mttbl",	XSPR(31,467,284), XSPR_MASK, PPC,	0,		{RS}},
XSPR_MASK        5607 arch/powerpc/xmon/ppc-opc.c {"mttbu",	XSPR(31,467,285), XSPR_MASK, PPC,	0,		{RS}},
XSPR_MASK        5608 arch/powerpc/xmon/ppc-opc.c {"mtdbsr",	XSPR(31,467,304), XSPR_MASK, BOOKE,	0,		{RS}},
XSPR_MASK        5609 arch/powerpc/xmon/ppc-opc.c {"mtdbcr0",	XSPR(31,467,308), XSPR_MASK, BOOKE,	0,		{RS}},
XSPR_MASK        5610 arch/powerpc/xmon/ppc-opc.c {"mtdbcr1",	XSPR(31,467,309), XSPR_MASK, BOOKE,	0,		{RS}},
XSPR_MASK        5611 arch/powerpc/xmon/ppc-opc.c {"mtdbcr2",	XSPR(31,467,310), XSPR_MASK, BOOKE,	0,		{RS}},
XSPR_MASK        5612 arch/powerpc/xmon/ppc-opc.c {"mtiac1",	XSPR(31,467,312), XSPR_MASK, BOOKE,	0,		{RS}},
XSPR_MASK        5613 arch/powerpc/xmon/ppc-opc.c {"mtiac2",	XSPR(31,467,313), XSPR_MASK, BOOKE,	0,		{RS}},
XSPR_MASK        5614 arch/powerpc/xmon/ppc-opc.c {"mtiac3",	XSPR(31,467,314), XSPR_MASK, BOOKE,	0,		{RS}},
XSPR_MASK        5615 arch/powerpc/xmon/ppc-opc.c {"mtiac4",	XSPR(31,467,315), XSPR_MASK, BOOKE,	0,		{RS}},
XSPR_MASK        5616 arch/powerpc/xmon/ppc-opc.c {"mtdac1",	XSPR(31,467,316), XSPR_MASK, BOOKE,	0,		{RS}},
XSPR_MASK        5617 arch/powerpc/xmon/ppc-opc.c {"mtdac2",	XSPR(31,467,317), XSPR_MASK, BOOKE,	0,		{RS}},
XSPR_MASK        5618 arch/powerpc/xmon/ppc-opc.c {"mtdvc1",	XSPR(31,467,318), XSPR_MASK, BOOKE,	0,		{RS}},
XSPR_MASK        5619 arch/powerpc/xmon/ppc-opc.c {"mtdvc2",	XSPR(31,467,319), XSPR_MASK, BOOKE,	0,		{RS}},
XSPR_MASK        5620 arch/powerpc/xmon/ppc-opc.c {"mttsr",	XSPR(31,467,336), XSPR_MASK, BOOKE,	0,		{RS}},
XSPR_MASK        5621 arch/powerpc/xmon/ppc-opc.c {"mttcr",	XSPR(31,467,340), XSPR_MASK, BOOKE,	0,		{RS}},
XSPR_MASK        5622 arch/powerpc/xmon/ppc-opc.c {"mtivor0",	XSPR(31,467,400), XSPR_MASK, BOOKE,	0,		{RS}},
XSPR_MASK        5623 arch/powerpc/xmon/ppc-opc.c {"mtivor1",	XSPR(31,467,401), XSPR_MASK, BOOKE,	0,		{RS}},
XSPR_MASK        5624 arch/powerpc/xmon/ppc-opc.c {"mtivor2",	XSPR(31,467,402), XSPR_MASK, BOOKE,	0,		{RS}},
XSPR_MASK        5625 arch/powerpc/xmon/ppc-opc.c {"mtivor3",	XSPR(31,467,403), XSPR_MASK, BOOKE,	0,		{RS}},
XSPR_MASK        5626 arch/powerpc/xmon/ppc-opc.c {"mtivor4",	XSPR(31,467,404), XSPR_MASK, BOOKE,	0,		{RS}},
XSPR_MASK        5627 arch/powerpc/xmon/ppc-opc.c {"mtivor5",	XSPR(31,467,405), XSPR_MASK, BOOKE,	0,		{RS}},
XSPR_MASK        5628 arch/powerpc/xmon/ppc-opc.c {"mtivor6",	XSPR(31,467,406), XSPR_MASK, BOOKE,	0,		{RS}},
XSPR_MASK        5629 arch/powerpc/xmon/ppc-opc.c {"mtivor7",	XSPR(31,467,407), XSPR_MASK, BOOKE,	0,		{RS}},
XSPR_MASK        5630 arch/powerpc/xmon/ppc-opc.c {"mtivor8",	XSPR(31,467,408), XSPR_MASK, BOOKE,	0,		{RS}},
XSPR_MASK        5631 arch/powerpc/xmon/ppc-opc.c {"mtivor9",	XSPR(31,467,409), XSPR_MASK, BOOKE,	0,		{RS}},
XSPR_MASK        5632 arch/powerpc/xmon/ppc-opc.c {"mtivor10",	XSPR(31,467,410), XSPR_MASK, BOOKE,	0,		{RS}},
XSPR_MASK        5633 arch/powerpc/xmon/ppc-opc.c {"mtivor11",	XSPR(31,467,411), XSPR_MASK, BOOKE,	0,		{RS}},
XSPR_MASK        5634 arch/powerpc/xmon/ppc-opc.c {"mtivor12",	XSPR(31,467,412), XSPR_MASK, BOOKE,	0,		{RS}},
XSPR_MASK        5635 arch/powerpc/xmon/ppc-opc.c {"mtivor13",	XSPR(31,467,413), XSPR_MASK, BOOKE,	0,		{RS}},
XSPR_MASK        5636 arch/powerpc/xmon/ppc-opc.c {"mtivor14",	XSPR(31,467,414), XSPR_MASK, BOOKE,	0,		{RS}},
XSPR_MASK        5637 arch/powerpc/xmon/ppc-opc.c {"mtivor15",	XSPR(31,467,415), XSPR_MASK, BOOKE,	0,		{RS}},
XSPR_MASK        5638 arch/powerpc/xmon/ppc-opc.c {"mtspefscr",	XSPR(31,467,512), XSPR_MASK, PPCSPE,	0,		{RS}},
XSPR_MASK        5639 arch/powerpc/xmon/ppc-opc.c {"mtbbear",	XSPR(31,467,513), XSPR_MASK, PPCBRLK,	0,		{RS}},
XSPR_MASK        5640 arch/powerpc/xmon/ppc-opc.c {"mtbbtar",	XSPR(31,467,514), XSPR_MASK, PPCBRLK,	0,		{RS}},
XSPR_MASK        5641 arch/powerpc/xmon/ppc-opc.c {"mtivor32",	XSPR(31,467,528), XSPR_MASK, PPCSPE,	0,		{RS}},
XSPR_MASK        5643 arch/powerpc/xmon/ppc-opc.c {"mtivor33",	XSPR(31,467,529), XSPR_MASK, PPCSPE,	0,		{RS}},
XSPR_MASK        5645 arch/powerpc/xmon/ppc-opc.c {"mtivor34",	XSPR(31,467,530), XSPR_MASK, PPCSPE,	0,		{RS}},
XSPR_MASK        5646 arch/powerpc/xmon/ppc-opc.c {"mtivor35",	XSPR(31,467,531), XSPR_MASK, PPCPMR,	0,		{RS}},
XSPR_MASK        5649 arch/powerpc/xmon/ppc-opc.c {"mtmcsrr0",	XSPR(31,467,570), XSPR_MASK, PPCRFMCI,	0,		{RS}},
XSPR_MASK        5650 arch/powerpc/xmon/ppc-opc.c {"mtmcsrr1",	XSPR(31,467,571), XSPR_MASK, PPCRFMCI,	0,		{RS}},
XSPR_MASK        5651 arch/powerpc/xmon/ppc-opc.c {"mtmcsr",	XSPR(31,467,572), XSPR_MASK, PPCRFMCI,	0,		{RS}},
XSPR_MASK        5652 arch/powerpc/xmon/ppc-opc.c {"mtivndx",	XSPR(31,467,880), XSPR_MASK, TITAN,	0,		{RS}},
XSPR_MASK        5653 arch/powerpc/xmon/ppc-opc.c {"mtdvndx",	XSPR(31,467,881), XSPR_MASK, TITAN,	0,		{RS}},
XSPR_MASK        5654 arch/powerpc/xmon/ppc-opc.c {"mtivlim",	XSPR(31,467,882), XSPR_MASK, TITAN,	0,		{RS}},
XSPR_MASK        5655 arch/powerpc/xmon/ppc-opc.c {"mtdvlim",	XSPR(31,467,883), XSPR_MASK, TITAN,	0,		{RS}},
XSPR_MASK        5656 arch/powerpc/xmon/ppc-opc.c {"mtclcsr",	XSPR(31,467,884), XSPR_MASK, TITAN,	0,		{RS}},
XSPR_MASK        5657 arch/powerpc/xmon/ppc-opc.c {"mtccr1",	XSPR(31,467,888), XSPR_MASK, TITAN,	0,		{RS}},
XSPR_MASK        5658 arch/powerpc/xmon/ppc-opc.c {"mtppr",	XSPR(31,467,896), XSPR_MASK, POWER7,	0,		{RS}},
XSPR_MASK        5659 arch/powerpc/xmon/ppc-opc.c {"mtppr32",	XSPR(31,467,898), XSPR_MASK, POWER7,	0,		{RS}},
XSPR_MASK        5660 arch/powerpc/xmon/ppc-opc.c {"mtummcr0",	XSPR(31,467,936), XSPR_MASK, PPC750,	0,		{RS}},
XSPR_MASK        5661 arch/powerpc/xmon/ppc-opc.c {"mtupmc1",	XSPR(31,467,937), XSPR_MASK, PPC750,	0,		{RS}},
XSPR_MASK        5662 arch/powerpc/xmon/ppc-opc.c {"mtupmc2",	XSPR(31,467,938), XSPR_MASK, PPC750,	0,		{RS}},
XSPR_MASK        5663 arch/powerpc/xmon/ppc-opc.c {"mtusia",	XSPR(31,467,939), XSPR_MASK, PPC750,	0,		{RS}},
XSPR_MASK        5664 arch/powerpc/xmon/ppc-opc.c {"mtummcr1",	XSPR(31,467,940), XSPR_MASK, PPC750,	0,		{RS}},
XSPR_MASK        5665 arch/powerpc/xmon/ppc-opc.c {"mtupmc3",	XSPR(31,467,941), XSPR_MASK, PPC750,	0,		{RS}},
XSPR_MASK        5666 arch/powerpc/xmon/ppc-opc.c {"mtupmc4",	XSPR(31,467,942), XSPR_MASK, PPC750,	0,		{RS}},
XSPR_MASK        5667 arch/powerpc/xmon/ppc-opc.c {"mtzpr",	XSPR(31,467,944), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5668 arch/powerpc/xmon/ppc-opc.c {"mtpid",	XSPR(31,467,945), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5669 arch/powerpc/xmon/ppc-opc.c {"mtrmmucr",	XSPR(31,467,946), XSPR_MASK, TITAN,	0,		{RS}},
XSPR_MASK        5670 arch/powerpc/xmon/ppc-opc.c {"mtccr0",	XSPR(31,467,947), XSPR_MASK, PPC405|TITAN, 0,		{RS}},
XSPR_MASK        5671 arch/powerpc/xmon/ppc-opc.c {"mtiac3",	XSPR(31,467,948), XSPR_MASK, PPC405,	0,		{RS}},
XSPR_MASK        5672 arch/powerpc/xmon/ppc-opc.c {"mtiac4",	XSPR(31,467,949), XSPR_MASK, PPC405,	0,		{RS}},
XSPR_MASK        5673 arch/powerpc/xmon/ppc-opc.c {"mtdvc1",	XSPR(31,467,950), XSPR_MASK, PPC405,	0,		{RS}},
XSPR_MASK        5674 arch/powerpc/xmon/ppc-opc.c {"mtdvc2",	XSPR(31,467,951), XSPR_MASK, PPC405,	0,		{RS}},
XSPR_MASK        5675 arch/powerpc/xmon/ppc-opc.c {"mtmmcr0",	XSPR(31,467,952), XSPR_MASK, PPC750,	0,		{RS}},
XSPR_MASK        5676 arch/powerpc/xmon/ppc-opc.c {"mtpmc1",	XSPR(31,467,953), XSPR_MASK, PPC750,	0,		{RS}},
XSPR_MASK        5677 arch/powerpc/xmon/ppc-opc.c {"mtsgr",	XSPR(31,467,953), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5678 arch/powerpc/xmon/ppc-opc.c {"mtdcwr",	XSPR(31,467,954), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5679 arch/powerpc/xmon/ppc-opc.c {"mtpmc2",	XSPR(31,467,954), XSPR_MASK, PPC750,	0,		{RS}},
XSPR_MASK        5680 arch/powerpc/xmon/ppc-opc.c {"mtsia",	XSPR(31,467,955), XSPR_MASK, PPC750,	0,		{RS}},
XSPR_MASK        5681 arch/powerpc/xmon/ppc-opc.c {"mtsler",	XSPR(31,467,955), XSPR_MASK, PPC405,	0,		{RS}},
XSPR_MASK        5682 arch/powerpc/xmon/ppc-opc.c {"mtmmcr1",	XSPR(31,467,956), XSPR_MASK, PPC750,	0,		{RS}},
XSPR_MASK        5683 arch/powerpc/xmon/ppc-opc.c {"mtsu0r",	XSPR(31,467,956), XSPR_MASK, PPC405,	0,		{RS}},
XSPR_MASK        5684 arch/powerpc/xmon/ppc-opc.c {"mtdbcr1",	XSPR(31,467,957), XSPR_MASK, PPC405,	0,		{RS}},
XSPR_MASK        5685 arch/powerpc/xmon/ppc-opc.c {"mtpmc3",	XSPR(31,467,957), XSPR_MASK, PPC750,	0,		{RS}},
XSPR_MASK        5686 arch/powerpc/xmon/ppc-opc.c {"mtpmc4",	XSPR(31,467,958), XSPR_MASK, PPC750,	0,		{RS}},
XSPR_MASK        5687 arch/powerpc/xmon/ppc-opc.c {"mticdbdr",	XSPR(31,467,979), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5688 arch/powerpc/xmon/ppc-opc.c {"mtesr",	XSPR(31,467,980), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5689 arch/powerpc/xmon/ppc-opc.c {"mtdear",	XSPR(31,467,981), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5690 arch/powerpc/xmon/ppc-opc.c {"mtevpr",	XSPR(31,467,982), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5691 arch/powerpc/xmon/ppc-opc.c {"mtcdbcr",	XSPR(31,467,983), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5692 arch/powerpc/xmon/ppc-opc.c {"mttsr",	XSPR(31,467,984), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5693 arch/powerpc/xmon/ppc-opc.c {"mttcr",	XSPR(31,467,986), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5694 arch/powerpc/xmon/ppc-opc.c {"mtpit",	XSPR(31,467,987), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5695 arch/powerpc/xmon/ppc-opc.c {"mttbhi",	XSPR(31,467,988), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5696 arch/powerpc/xmon/ppc-opc.c {"mttblo",	XSPR(31,467,989), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5697 arch/powerpc/xmon/ppc-opc.c {"mtsrr2",	XSPR(31,467,990), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5698 arch/powerpc/xmon/ppc-opc.c {"mtsrr3",	XSPR(31,467,991), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5699 arch/powerpc/xmon/ppc-opc.c {"mtdbsr",	XSPR(31,467,1008), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5700 arch/powerpc/xmon/ppc-opc.c {"mtdbdr",	XSPR(31,467,1011), XSPR_MASK, TITAN,	0,		{RS}},
XSPR_MASK        5701 arch/powerpc/xmon/ppc-opc.c {"mtdbcr0",	XSPR(31,467,1010), XSPR_MASK, PPC405,	0,		{RS}},
XSPR_MASK        5702 arch/powerpc/xmon/ppc-opc.c {"mtiac1",	XSPR(31,467,1012), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5703 arch/powerpc/xmon/ppc-opc.c {"mtiac2",	XSPR(31,467,1013), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5704 arch/powerpc/xmon/ppc-opc.c {"mtdac1",	XSPR(31,467,1014), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5705 arch/powerpc/xmon/ppc-opc.c {"mtdac2",	XSPR(31,467,1015), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5706 arch/powerpc/xmon/ppc-opc.c {"mtl2cr",	XSPR(31,467,1017), XSPR_MASK, PPC750,	0,		{RS}},
XSPR_MASK        5707 arch/powerpc/xmon/ppc-opc.c {"mtdccr",	XSPR(31,467,1018), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5708 arch/powerpc/xmon/ppc-opc.c {"mticcr",	XSPR(31,467,1019), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5709 arch/powerpc/xmon/ppc-opc.c {"mtictc",	XSPR(31,467,1019), XSPR_MASK, PPC750,	0,		{RS}},
XSPR_MASK        5710 arch/powerpc/xmon/ppc-opc.c {"mtpbl1",	XSPR(31,467,1020), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5711 arch/powerpc/xmon/ppc-opc.c {"mtthrm1",	XSPR(31,467,1020), XSPR_MASK, PPC750,	0,		{RS}},
XSPR_MASK        5712 arch/powerpc/xmon/ppc-opc.c {"mtpbu1",	XSPR(31,467,1021), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5713 arch/powerpc/xmon/ppc-opc.c {"mtthrm2",	XSPR(31,467,1021), XSPR_MASK, PPC750,	0,		{RS}},
XSPR_MASK        5714 arch/powerpc/xmon/ppc-opc.c {"mtpbl2",	XSPR(31,467,1022), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        5715 arch/powerpc/xmon/ppc-opc.c {"mtthrm3",	XSPR(31,467,1022), XSPR_MASK, PPC750,	0,		{RS}},
XSPR_MASK        5716 arch/powerpc/xmon/ppc-opc.c {"mtpbu2",	XSPR(31,467,1023), XSPR_MASK, PPC403,	0,		{RS}},
XSPR_MASK        7174 arch/powerpc/xmon/ppc-opc.c {"mtmas1",	XSPR(31,467,625), XSPR_MASK,	PPCVLE,	0,		{RS}},