XS6               903 arch/powerpc/xmon/ppc-opc.c #define XT6 XS6
XS6              4792 arch/powerpc/xmon/ppc-opc.c {"mfvsrd",	X(31,51),	XX1RB_MASK,   PPCVSX2,	0,		{RA, XS6}},
XS6              4875 arch/powerpc/xmon/ppc-opc.c {"mfvsrwz",	X(31,115),	XX1RB_MASK,   PPCVSX2,	0,		{RA, XS6}},
XS6              4911 arch/powerpc/xmon/ppc-opc.c {"stxsiwx",	X(31,140),	XX1_MASK,    PPCVSX2,	0,		{XS6, RA0, RB}},
XS6              5131 arch/powerpc/xmon/ppc-opc.c {"mfvsrld",	X(31,307),	XX1RB_MASK,  PPCVSX3,	0,		{RA, XS6}},
XS6              5442 arch/powerpc/xmon/ppc-opc.c {"stxvx",	X(31,396),	XX1_MASK,    PPCVSX3,	0,		{XS6, RA0, RB}},
XS6              5443 arch/powerpc/xmon/ppc-opc.c {"stxvl",	X(31,397),	XX1_MASK,    PPCVSX3,	0,		{XS6, RA0, RB}},
XS6              5474 arch/powerpc/xmon/ppc-opc.c {"stxvll",	X(31,429),	XX1_MASK,    PPCVSX3,	0,		{XS6, RA0, RB}},
XS6              5886 arch/powerpc/xmon/ppc-opc.c {"stxsspx",	X(31,652),	XX1_MASK,    PPCVSX2,	0,		{XS6, RA0, RB}},
XS6              5945 arch/powerpc/xmon/ppc-opc.c {"stxsdx",	X(31,716),	XX1_MASK,    PPCVSX,	0,		{XS6, RA0, RB}},
XS6              6145 arch/powerpc/xmon/ppc-opc.c {"stxvw4x",	X(31,908),	XX1_MASK,    PPCVSX,	0,		{XS6, RA0, RB}},
XS6              6146 arch/powerpc/xmon/ppc-opc.c {"stxsibx",	X(31,909),	XX1_MASK,    PPCVSX3,	0,		{XS6, RA0, RB}},
XS6              6189 arch/powerpc/xmon/ppc-opc.c {"stxvh8x",	X(31,940),	XX1_MASK,    PPCVSX3,	0,		{XS6, RA0, RB}},
XS6              6190 arch/powerpc/xmon/ppc-opc.c {"stxsihx",	X(31,941),	XX1_MASK,    PPCVSX3,	0,		{XS6, RA0, RB}},
XS6              6222 arch/powerpc/xmon/ppc-opc.c {"stxvd2x",	X(31,972),	XX1_MASK,    PPCVSX,	0,		{XS6, RA0, RB}},
XS6              6223 arch/powerpc/xmon/ppc-opc.c {"stxvx",	X(31,972),	XX1_MASK,    POWER8,	POWER9|PPCVSX3,	{XS6, RA0, RB}},
XS6              6256 arch/powerpc/xmon/ppc-opc.c {"stxvb16x",	X(31,1004),	XX1_MASK,    PPCVSX3,	0,		{XS6, RA0, RB}},