XO_MASK          2831 arch/powerpc/xmon/ppc-opc.c #define XORB_MASK (XO_MASK | RB_MASK)
XO_MASK          3108 arch/powerpc/xmon/ppc-opc.c {"machhwu",	XO (4,	12,0,0), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3110 arch/powerpc/xmon/ppc-opc.c {"machhwu.",	XO (4,	12,0,1), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3180 arch/powerpc/xmon/ppc-opc.c {"machhw",	XO (4,	44,0,0), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3181 arch/powerpc/xmon/ppc-opc.c {"machhw.",	XO (4,	44,0,1), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3182 arch/powerpc/xmon/ppc-opc.c {"nmachhw",	XO (4,	46,0,0), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3183 arch/powerpc/xmon/ppc-opc.c {"nmachhw.",	XO (4,	46,0,1), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3197 arch/powerpc/xmon/ppc-opc.c {"machhwsu",	XO (4,	76,0,0), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3198 arch/powerpc/xmon/ppc-opc.c {"machhwsu.",	XO (4,	76,0,1), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3207 arch/powerpc/xmon/ppc-opc.c {"machhws",	XO (4, 108,0,0), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3208 arch/powerpc/xmon/ppc-opc.c {"machhws.",	XO (4, 108,0,1), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3209 arch/powerpc/xmon/ppc-opc.c {"nmachhws",	XO (4, 110,0,0), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3210 arch/powerpc/xmon/ppc-opc.c {"nmachhws.",	XO (4, 110,0,1), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3223 arch/powerpc/xmon/ppc-opc.c {"macchwu",	XO (4, 140,0,0), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3224 arch/powerpc/xmon/ppc-opc.c {"macchwu.",	XO (4, 140,0,1), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3235 arch/powerpc/xmon/ppc-opc.c {"macchw",	XO (4, 172,0,0), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3236 arch/powerpc/xmon/ppc-opc.c {"macchw.",	XO (4, 172,0,1), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3237 arch/powerpc/xmon/ppc-opc.c {"nmacchw",	XO (4, 174,0,0), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3238 arch/powerpc/xmon/ppc-opc.c {"nmacchw.",	XO (4, 174,0,1), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3248 arch/powerpc/xmon/ppc-opc.c {"macchwsu",	XO (4, 204,0,0), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3249 arch/powerpc/xmon/ppc-opc.c {"macchwsu.",	XO (4, 204,0,1), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3256 arch/powerpc/xmon/ppc-opc.c {"macchws",	XO (4, 236,0,0), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3257 arch/powerpc/xmon/ppc-opc.c {"macchws.",	XO (4, 236,0,1), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3258 arch/powerpc/xmon/ppc-opc.c {"nmacchws",	XO (4, 238,0,0), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3259 arch/powerpc/xmon/ppc-opc.c {"nmacchws.",	XO (4, 238,0,1), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3455 arch/powerpc/xmon/ppc-opc.c {"maclhwu",	XO (4, 396,0,0),XO_MASK,     MULHW,	0,		{RT, RA, RB}},
XO_MASK          3457 arch/powerpc/xmon/ppc-opc.c {"maclhwu.",	XO (4, 396,0,1),XO_MASK,     MULHW,	0,		{RT, RA, RB}},
XO_MASK          3488 arch/powerpc/xmon/ppc-opc.c {"maclhw",	XO (4, 428,0,0),XO_MASK,     MULHW,	0,		{RT, RA, RB}},
XO_MASK          3489 arch/powerpc/xmon/ppc-opc.c {"maclhw.",	XO (4, 428,0,1),XO_MASK,     MULHW,	0,		{RT, RA, RB}},
XO_MASK          3490 arch/powerpc/xmon/ppc-opc.c {"nmaclhw",	XO (4, 430,0,0),XO_MASK,     MULHW,	0,		{RT, RA, RB}},
XO_MASK          3491 arch/powerpc/xmon/ppc-opc.c {"nmaclhw.",	XO (4, 430,0,1),XO_MASK,     MULHW,	0,		{RT, RA, RB}},
XO_MASK          3501 arch/powerpc/xmon/ppc-opc.c {"maclhwsu",	XO (4, 460,0,0), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3502 arch/powerpc/xmon/ppc-opc.c {"maclhwsu.",	XO (4, 460,0,1), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3511 arch/powerpc/xmon/ppc-opc.c {"maclhws",	XO (4, 492,0,0), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3512 arch/powerpc/xmon/ppc-opc.c {"maclhws.",	XO (4, 492,0,1), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3513 arch/powerpc/xmon/ppc-opc.c {"nmaclhws",	XO (4, 494,0,0), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3514 arch/powerpc/xmon/ppc-opc.c {"nmaclhws.",	XO (4, 494,0,1), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3535 arch/powerpc/xmon/ppc-opc.c {"machhwuo",	XO (4,	12,1,0), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3536 arch/powerpc/xmon/ppc-opc.c {"machhwuo.",	XO (4,	12,1,1), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3566 arch/powerpc/xmon/ppc-opc.c {"machhwo",	XO (4,	44,1,0), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3568 arch/powerpc/xmon/ppc-opc.c {"machhwo.",	XO (4,	44,1,1), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3571 arch/powerpc/xmon/ppc-opc.c {"nmachhwo",	XO (4,	46,1,0), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3572 arch/powerpc/xmon/ppc-opc.c {"nmachhwo.",	XO (4,	46,1,1), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3595 arch/powerpc/xmon/ppc-opc.c {"machhwsuo",	XO (4,	76,1,0), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3596 arch/powerpc/xmon/ppc-opc.c {"machhwsuo.",	XO (4,	76,1,1), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3619 arch/powerpc/xmon/ppc-opc.c {"machhwso",	XO (4, 108,1,0), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3620 arch/powerpc/xmon/ppc-opc.c {"machhwso.",	XO (4, 108,1,1), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3621 arch/powerpc/xmon/ppc-opc.c {"nmachhwso",	XO (4, 110,1,0), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3622 arch/powerpc/xmon/ppc-opc.c {"nmachhwso.",	XO (4, 110,1,1), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3648 arch/powerpc/xmon/ppc-opc.c {"macchwuo",	XO (4, 140,1,0), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3649 arch/powerpc/xmon/ppc-opc.c {"macchwuo.",	XO (4, 140,1,1), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3672 arch/powerpc/xmon/ppc-opc.c {"macchwo",	XO (4, 172,1,0), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3674 arch/powerpc/xmon/ppc-opc.c {"macchwo.",	XO (4, 172,1,1), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3677 arch/powerpc/xmon/ppc-opc.c {"nmacchwo",	XO (4, 174,1,0), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3678 arch/powerpc/xmon/ppc-opc.c {"nmacchwo.",	XO (4, 174,1,1), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3704 arch/powerpc/xmon/ppc-opc.c {"macchwsuo",	XO (4, 204,1,0), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3705 arch/powerpc/xmon/ppc-opc.c {"macchwsuo.",	XO (4, 204,1,1), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3725 arch/powerpc/xmon/ppc-opc.c {"macchwso",	XO (4, 236,1,0), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3727 arch/powerpc/xmon/ppc-opc.c {"macchwso.",	XO (4, 236,1,1), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3730 arch/powerpc/xmon/ppc-opc.c {"nmacchwso",	XO (4, 238,1,0), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3731 arch/powerpc/xmon/ppc-opc.c {"nmacchwso.",	XO (4, 238,1,1), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3788 arch/powerpc/xmon/ppc-opc.c {"maclhwuo",	XO (4, 396,1,0), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3789 arch/powerpc/xmon/ppc-opc.c {"maclhwuo.",	XO (4, 396,1,1), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3798 arch/powerpc/xmon/ppc-opc.c {"maclhwo",	XO (4, 428,1,0), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3799 arch/powerpc/xmon/ppc-opc.c {"maclhwo.",	XO (4, 428,1,1), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3800 arch/powerpc/xmon/ppc-opc.c {"nmaclhwo",	XO (4, 430,1,0), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3801 arch/powerpc/xmon/ppc-opc.c {"nmaclhwo.",	XO (4, 430,1,1), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3811 arch/powerpc/xmon/ppc-opc.c {"maclhwsuo",	XO (4, 460,1,0), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3812 arch/powerpc/xmon/ppc-opc.c {"maclhwsuo.",	XO (4, 460,1,1), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3819 arch/powerpc/xmon/ppc-opc.c {"maclhwso",	XO (4, 492,1,0), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3820 arch/powerpc/xmon/ppc-opc.c {"maclhwso.",	XO (4, 492,1,1), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3821 arch/powerpc/xmon/ppc-opc.c {"nmaclhwso",	XO (4, 494,1,0), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          3822 arch/powerpc/xmon/ppc-opc.c {"nmaclhwso.",	XO (4, 494,1,1), XO_MASK,    MULHW,	0,		{RT, RA, RB}},
XO_MASK          4699 arch/powerpc/xmon/ppc-opc.c {"subfc",	XO(31,8,0,0),	XO_MASK,     PPCCOM,	0,		{RT, RA, RB}},
XO_MASK          4700 arch/powerpc/xmon/ppc-opc.c {"sf",		XO(31,8,0,0),	XO_MASK,     PWRCOM,	0,		{RT, RA, RB}},
XO_MASK          4701 arch/powerpc/xmon/ppc-opc.c {"subc",	XO(31,8,0,0),	XO_MASK,     PPCCOM,	0,		{RT, RB, RA}},
XO_MASK          4702 arch/powerpc/xmon/ppc-opc.c {"subfc.",	XO(31,8,0,1),	XO_MASK,     PPCCOM,	0,		{RT, RA, RB}},
XO_MASK          4703 arch/powerpc/xmon/ppc-opc.c {"sf.",		XO(31,8,0,1),	XO_MASK,     PWRCOM,	0,		{RT, RA, RB}},
XO_MASK          4704 arch/powerpc/xmon/ppc-opc.c {"subc.",	XO(31,8,0,1),	XO_MASK,     PPCCOM,	0,		{RT, RB, RA}},
XO_MASK          4706 arch/powerpc/xmon/ppc-opc.c {"mulhdu",	XO(31,9,0,0),	XO_MASK,     PPC64,	0,		{RT, RA, RB}},
XO_MASK          4707 arch/powerpc/xmon/ppc-opc.c {"mulhdu.",	XO(31,9,0,1),	XO_MASK,     PPC64,	0,		{RT, RA, RB}},
XO_MASK          4709 arch/powerpc/xmon/ppc-opc.c {"addc",	XO(31,10,0,0),	XO_MASK,     PPCCOM,	0,		{RT, RA, RB}},
XO_MASK          4710 arch/powerpc/xmon/ppc-opc.c {"a",		XO(31,10,0,0),	XO_MASK,     PWRCOM,	0,		{RT, RA, RB}},
XO_MASK          4711 arch/powerpc/xmon/ppc-opc.c {"addc.",	XO(31,10,0,1),	XO_MASK,     PPCCOM,	0,		{RT, RA, RB}},
XO_MASK          4712 arch/powerpc/xmon/ppc-opc.c {"a.",		XO(31,10,0,1),	XO_MASK,     PWRCOM,	0,		{RT, RA, RB}},
XO_MASK          4714 arch/powerpc/xmon/ppc-opc.c {"mulhwu",	XO(31,11,0,0),	XO_MASK,     PPC,	0,		{RT, RA, RB}},
XO_MASK          4715 arch/powerpc/xmon/ppc-opc.c {"mulhwu.",	XO(31,11,0,1),	XO_MASK,     PPC,	0,		{RT, RA, RB}},
XO_MASK          4779 arch/powerpc/xmon/ppc-opc.c {"addg6s",	XO(31,74,0,0),	XO_MASK,     POWER6,	0,		{RT, RA, RB}},
XO_MASK          4787 arch/powerpc/xmon/ppc-opc.c {"subf",	XO(31,40,0,0),	XO_MASK,     PPC,	0,		{RT, RA, RB}},
XO_MASK          4788 arch/powerpc/xmon/ppc-opc.c {"sub",		XO(31,40,0,0),	XO_MASK,     PPC,	0,		{RT, RB, RA}},
XO_MASK          4789 arch/powerpc/xmon/ppc-opc.c {"subf.",	XO(31,40,0,1),	XO_MASK,     PPC,	0,		{RT, RA, RB}},
XO_MASK          4790 arch/powerpc/xmon/ppc-opc.c {"sub.",	XO(31,40,0,1),	XO_MASK,     PPC,	0,		{RT, RB, RA}},
XO_MASK          4836 arch/powerpc/xmon/ppc-opc.c {"mulhd",	XO(31,73,0,0),	XO_MASK,     PPC64,	0,		{RT, RA, RB}},
XO_MASK          4837 arch/powerpc/xmon/ppc-opc.c {"mulhd.",	XO(31,73,0,1),	XO_MASK,     PPC64,	0,		{RT, RA, RB}},
XO_MASK          4839 arch/powerpc/xmon/ppc-opc.c {"mulhw",	XO(31,75,0,0),	XO_MASK,     PPC,	0,		{RT, RA, RB}},
XO_MASK          4840 arch/powerpc/xmon/ppc-opc.c {"mulhw.",	XO(31,75,0,1),	XO_MASK,     PPC,	0,		{RT, RA, RB}},
XO_MASK          4866 arch/powerpc/xmon/ppc-opc.c {"mul",		XO(31,107,0,0),	XO_MASK,     M601,	0,		{RT, RA, RB}},
XO_MASK          4867 arch/powerpc/xmon/ppc-opc.c {"mul.",	XO(31,107,0,1),	XO_MASK,     M601,	0,		{RT, RA, RB}},
XO_MASK          4901 arch/powerpc/xmon/ppc-opc.c {"subfe",	XO(31,136,0,0),	XO_MASK,     PPCCOM,	0,		{RT, RA, RB}},
XO_MASK          4902 arch/powerpc/xmon/ppc-opc.c {"sfe",		XO(31,136,0,0),	XO_MASK,     PWRCOM,	0,		{RT, RA, RB}},
XO_MASK          4903 arch/powerpc/xmon/ppc-opc.c {"subfe.",	XO(31,136,0,1),	XO_MASK,     PPCCOM,	0,		{RT, RA, RB}},
XO_MASK          4904 arch/powerpc/xmon/ppc-opc.c {"sfe.",	XO(31,136,0,1),	XO_MASK,     PWRCOM,	0,		{RT, RA, RB}},
XO_MASK          4906 arch/powerpc/xmon/ppc-opc.c {"adde",	XO(31,138,0,0),	XO_MASK,     PPCCOM,	0,		{RT, RA, RB}},
XO_MASK          4907 arch/powerpc/xmon/ppc-opc.c {"ae",		XO(31,138,0,0),	XO_MASK,     PWRCOM,	0,		{RT, RA, RB}},
XO_MASK          4908 arch/powerpc/xmon/ppc-opc.c {"adde.",	XO(31,138,0,1),	XO_MASK,     PPCCOM,	0,		{RT, RA, RB}},
XO_MASK          4909 arch/powerpc/xmon/ppc-opc.c {"ae.",		XO(31,138,0,1),	XO_MASK,     PWRCOM,	0,		{RT, RA, RB}},
XO_MASK          5030 arch/powerpc/xmon/ppc-opc.c {"mulld",	XO(31,233,0,0),	XO_MASK,     PPC64,	0,		{RT, RA, RB}},
XO_MASK          5031 arch/powerpc/xmon/ppc-opc.c {"mulld.",	XO(31,233,0,1),	XO_MASK,     PPC64,	0,		{RT, RA, RB}},
XO_MASK          5038 arch/powerpc/xmon/ppc-opc.c {"mullw",	XO(31,235,0,0),	XO_MASK,     PPCCOM,	0,		{RT, RA, RB}},
XO_MASK          5039 arch/powerpc/xmon/ppc-opc.c {"muls",	XO(31,235,0,0),	XO_MASK,     PWRCOM,	0,		{RT, RA, RB}},
XO_MASK          5040 arch/powerpc/xmon/ppc-opc.c {"mullw.",	XO(31,235,0,1),	XO_MASK,     PPCCOM,	0,		{RT, RA, RB}},
XO_MASK          5041 arch/powerpc/xmon/ppc-opc.c {"muls.",	XO(31,235,0,1),	XO_MASK,     PWRCOM,	0,		{RT, RA, RB}},
XO_MASK          5076 arch/powerpc/xmon/ppc-opc.c {"doz",		XO(31,264,0,0),	XO_MASK,     M601,	0,		{RT, RA, RB}},
XO_MASK          5077 arch/powerpc/xmon/ppc-opc.c {"doz.",	XO(31,264,0,1),	XO_MASK,     M601,	0,		{RT, RA, RB}},
XO_MASK          5081 arch/powerpc/xmon/ppc-opc.c {"add",		XO(31,266,0,0),	XO_MASK,     PPCCOM,	0,		{RT, RA, RB}},
XO_MASK          5082 arch/powerpc/xmon/ppc-opc.c {"cax",		XO(31,266,0,0),	XO_MASK,     PWRCOM,	0,		{RT, RA, RB}},
XO_MASK          5083 arch/powerpc/xmon/ppc-opc.c {"add.",	XO(31,266,0,1),	XO_MASK,     PPCCOM,	0,		{RT, RA, RB}},
XO_MASK          5084 arch/powerpc/xmon/ppc-opc.c {"cax.",	XO(31,266,0,1),	XO_MASK,     PWRCOM,	0,		{RT, RA, RB}},
XO_MASK          5187 arch/powerpc/xmon/ppc-opc.c {"div",		XO(31,331,0,0),	XO_MASK,     M601,	0,		{RT, RA, RB}},
XO_MASK          5188 arch/powerpc/xmon/ppc-opc.c {"div.",	XO(31,331,0,1),	XO_MASK,     M601,	0,		{RT, RA, RB}},
XO_MASK          5410 arch/powerpc/xmon/ppc-opc.c {"divs",	XO(31,363,0,0),	XO_MASK,     M601,	0,		{RT, RA, RB}},
XO_MASK          5411 arch/powerpc/xmon/ppc-opc.c {"divs.",	XO(31,363,0,1),	XO_MASK,     M601,	0,		{RT, RA, RB}},
XO_MASK          5437 arch/powerpc/xmon/ppc-opc.c {"divdeu",	XO(31,393,0,0),	XO_MASK,     POWER7|PPCA2, 0,		{RT, RA, RB}},
XO_MASK          5438 arch/powerpc/xmon/ppc-opc.c {"divdeu.",	XO(31,393,0,1),	XO_MASK,     POWER7|PPCA2, 0,		{RT, RA, RB}},
XO_MASK          5439 arch/powerpc/xmon/ppc-opc.c {"divweu",	XO(31,395,0,0),	XO_MASK,     POWER7|PPCA2, 0,		{RT, RA, RB}},
XO_MASK          5440 arch/powerpc/xmon/ppc-opc.c {"divweu.",	XO(31,395,0,1),	XO_MASK,     POWER7|PPCA2, 0,		{RT, RA, RB}},
XO_MASK          5469 arch/powerpc/xmon/ppc-opc.c {"divde",	XO(31,425,0,0),	XO_MASK,  POWER7|PPCA2,	0,		{RT, RA, RB}},
XO_MASK          5470 arch/powerpc/xmon/ppc-opc.c {"divde.",	XO(31,425,0,1),	XO_MASK,  POWER7|PPCA2,	0,		{RT, RA, RB}},
XO_MASK          5471 arch/powerpc/xmon/ppc-opc.c {"divwe",	XO(31,427,0,0),	XO_MASK,  POWER7|PPCA2,	0,		{RT, RA, RB}},
XO_MASK          5472 arch/powerpc/xmon/ppc-opc.c {"divwe.",	XO(31,427,0,1),	XO_MASK,  POWER7|PPCA2,	0,		{RT, RA, RB}},
XO_MASK          5542 arch/powerpc/xmon/ppc-opc.c {"divdu",	XO(31,457,0,0),	XO_MASK,     PPC64,	0,		{RT, RA, RB}},
XO_MASK          5543 arch/powerpc/xmon/ppc-opc.c {"divdu.",	XO(31,457,0,1),	XO_MASK,     PPC64,	0,		{RT, RA, RB}},
XO_MASK          5545 arch/powerpc/xmon/ppc-opc.c {"divwu",	XO(31,459,0,0),	XO_MASK,     PPC,	0,		{RT, RA, RB}},
XO_MASK          5546 arch/powerpc/xmon/ppc-opc.c {"divwu.",	XO(31,459,0,1),	XO_MASK,     PPC,	0,		{RT, RA, RB}},
XO_MASK          5735 arch/powerpc/xmon/ppc-opc.c {"divd",	XO(31,489,0,0),	XO_MASK,     PPC64,	0,		{RT, RA, RB}},
XO_MASK          5736 arch/powerpc/xmon/ppc-opc.c {"divd.",	XO(31,489,0,1),	XO_MASK,     PPC64,	0,		{RT, RA, RB}},
XO_MASK          5738 arch/powerpc/xmon/ppc-opc.c {"divw",	XO(31,491,0,0),	XO_MASK,     PPC,	0,		{RT, RA, RB}},
XO_MASK          5739 arch/powerpc/xmon/ppc-opc.c {"divw.",	XO(31,491,0,1),	XO_MASK,     PPC,	0,		{RT, RA, RB}},
XO_MASK          5762 arch/powerpc/xmon/ppc-opc.c {"subfco",	XO(31,8,1,0),	XO_MASK,     PPCCOM,	0,		{RT, RA, RB}},
XO_MASK          5763 arch/powerpc/xmon/ppc-opc.c {"sfo",		XO(31,8,1,0),	XO_MASK,     PWRCOM,	0,		{RT, RA, RB}},
XO_MASK          5764 arch/powerpc/xmon/ppc-opc.c {"subco",	XO(31,8,1,0),	XO_MASK,     PPCCOM,	0,		{RT, RB, RA}},
XO_MASK          5765 arch/powerpc/xmon/ppc-opc.c {"subfco.",	XO(31,8,1,1),	XO_MASK,     PPCCOM,	0,		{RT, RA, RB}},
XO_MASK          5766 arch/powerpc/xmon/ppc-opc.c {"sfo.",	XO(31,8,1,1),	XO_MASK,     PWRCOM,	0,		{RT, RA, RB}},
XO_MASK          5767 arch/powerpc/xmon/ppc-opc.c {"subco.",	XO(31,8,1,1),	XO_MASK,     PPCCOM,	0,		{RT, RB, RA}},
XO_MASK          5769 arch/powerpc/xmon/ppc-opc.c {"addco",	XO(31,10,1,0),	XO_MASK,     PPCCOM,	0,		{RT, RA, RB}},
XO_MASK          5770 arch/powerpc/xmon/ppc-opc.c {"ao",		XO(31,10,1,0),	XO_MASK,     PWRCOM,	0,		{RT, RA, RB}},
XO_MASK          5771 arch/powerpc/xmon/ppc-opc.c {"addco.",	XO(31,10,1,1),	XO_MASK,     PPCCOM,	0,		{RT, RA, RB}},
XO_MASK          5772 arch/powerpc/xmon/ppc-opc.c {"ao.",		XO(31,10,1,1),	XO_MASK,     PWRCOM,	0,		{RT, RA, RB}},
XO_MASK          5815 arch/powerpc/xmon/ppc-opc.c {"subfo",	XO(31,40,1,0),	XO_MASK,     PPC,	0,		{RT, RA, RB}},
XO_MASK          5816 arch/powerpc/xmon/ppc-opc.c {"subo",	XO(31,40,1,0),	XO_MASK,     PPC,	0,		{RT, RB, RA}},
XO_MASK          5817 arch/powerpc/xmon/ppc-opc.c {"subfo.",	XO(31,40,1,1),	XO_MASK,     PPC,	0,		{RT, RA, RB}},
XO_MASK          5818 arch/powerpc/xmon/ppc-opc.c {"subo.",	XO(31,40,1,1),	XO_MASK,     PPC,	0,		{RT, RB, RA}},
XO_MASK          5871 arch/powerpc/xmon/ppc-opc.c {"mulo",	XO(31,107,1,0),	XO_MASK,     M601,	0,		{RT, RA, RB}},
XO_MASK          5872 arch/powerpc/xmon/ppc-opc.c {"mulo.",	XO(31,107,1,1),	XO_MASK,     M601,	0,		{RT, RA, RB}},
XO_MASK          5890 arch/powerpc/xmon/ppc-opc.c {"subfeo",	XO(31,136,1,0),	XO_MASK,     PPCCOM,	0,		{RT, RA, RB}},
XO_MASK          5891 arch/powerpc/xmon/ppc-opc.c {"sfeo",	XO(31,136,1,0),	XO_MASK,     PWRCOM,	0,		{RT, RA, RB}},
XO_MASK          5892 arch/powerpc/xmon/ppc-opc.c {"subfeo.",	XO(31,136,1,1),	XO_MASK,     PPCCOM,	0,		{RT, RA, RB}},
XO_MASK          5893 arch/powerpc/xmon/ppc-opc.c {"sfeo.",	XO(31,136,1,1),	XO_MASK,     PWRCOM,	0,		{RT, RA, RB}},
XO_MASK          5895 arch/powerpc/xmon/ppc-opc.c {"addeo",	XO(31,138,1,0),	XO_MASK,     PPCCOM,	0,		{RT, RA, RB}},
XO_MASK          5896 arch/powerpc/xmon/ppc-opc.c {"aeo",		XO(31,138,1,0),	XO_MASK,     PWRCOM,	0,		{RT, RA, RB}},
XO_MASK          5897 arch/powerpc/xmon/ppc-opc.c {"addeo.",	XO(31,138,1,1),	XO_MASK,     PPCCOM,	0,		{RT, RA, RB}},
XO_MASK          5898 arch/powerpc/xmon/ppc-opc.c {"aeo.",	XO(31,138,1,1),	XO_MASK,     PWRCOM,	0,		{RT, RA, RB}},
XO_MASK          5988 arch/powerpc/xmon/ppc-opc.c {"mulldo",	XO(31,233,1,0),	XO_MASK,     PPC64,	0,		{RT, RA, RB}},
XO_MASK          5989 arch/powerpc/xmon/ppc-opc.c {"mulldo.",	XO(31,233,1,1),	XO_MASK,     PPC64,	0,		{RT, RA, RB}},
XO_MASK          5996 arch/powerpc/xmon/ppc-opc.c {"mullwo",	XO(31,235,1,0),	XO_MASK,     PPCCOM,	0,		{RT, RA, RB}},
XO_MASK          5997 arch/powerpc/xmon/ppc-opc.c {"mulso",	XO(31,235,1,0),	XO_MASK,     PWRCOM,	0,		{RT, RA, RB}},
XO_MASK          5998 arch/powerpc/xmon/ppc-opc.c {"mullwo.",	XO(31,235,1,1),	XO_MASK,     PPCCOM,	0,		{RT, RA, RB}},
XO_MASK          5999 arch/powerpc/xmon/ppc-opc.c {"mulso.",	XO(31,235,1,1),	XO_MASK,     PWRCOM,	0,		{RT, RA, RB}},
XO_MASK          6023 arch/powerpc/xmon/ppc-opc.c {"dozo",	XO(31,264,1,0),	XO_MASK,     M601,	0,		{RT, RA, RB}},
XO_MASK          6024 arch/powerpc/xmon/ppc-opc.c {"dozo.",	XO(31,264,1,1),	XO_MASK,     M601,	0,		{RT, RA, RB}},
XO_MASK          6026 arch/powerpc/xmon/ppc-opc.c {"addo",	XO(31,266,1,0),	XO_MASK,     PPCCOM,	0,		{RT, RA, RB}},
XO_MASK          6027 arch/powerpc/xmon/ppc-opc.c {"caxo",	XO(31,266,1,0),	XO_MASK,     PWRCOM,	0,		{RT, RA, RB}},
XO_MASK          6028 arch/powerpc/xmon/ppc-opc.c {"addo.",	XO(31,266,1,1),	XO_MASK,     PPCCOM,	0,		{RT, RA, RB}},
XO_MASK          6029 arch/powerpc/xmon/ppc-opc.c {"caxo.",	XO(31,266,1,1),	XO_MASK,     PWRCOM,	0,		{RT, RA, RB}},
XO_MASK          6089 arch/powerpc/xmon/ppc-opc.c {"divo",	XO(31,331,1,0),	XO_MASK,     M601,	0,		{RT, RA, RB}},
XO_MASK          6090 arch/powerpc/xmon/ppc-opc.c {"divo.",	XO(31,331,1,1),	XO_MASK,     M601,	0,		{RT, RA, RB}},
XO_MASK          6117 arch/powerpc/xmon/ppc-opc.c {"divso",	XO(31,363,1,0),	XO_MASK,     M601,	0,		{RT, RA, RB}},
XO_MASK          6118 arch/powerpc/xmon/ppc-opc.c {"divso.",	XO(31,363,1,1),	XO_MASK,     M601,	0,		{RT, RA, RB}},
XO_MASK          6140 arch/powerpc/xmon/ppc-opc.c {"divdeuo",	XO(31,393,1,0),	XO_MASK,  POWER7|PPCA2,	0,		{RT, RA, RB}},
XO_MASK          6141 arch/powerpc/xmon/ppc-opc.c {"divdeuo.",	XO(31,393,1,1),	XO_MASK,  POWER7|PPCA2,	0,		{RT, RA, RB}},
XO_MASK          6142 arch/powerpc/xmon/ppc-opc.c {"divweuo",	XO(31,395,1,0),	XO_MASK,  POWER7|PPCA2,	0,		{RT, RA, RB}},
XO_MASK          6143 arch/powerpc/xmon/ppc-opc.c {"divweuo.",	XO(31,395,1,1),	XO_MASK,  POWER7|PPCA2,	0,		{RT, RA, RB}},
XO_MASK          6184 arch/powerpc/xmon/ppc-opc.c {"divdeo",	XO(31,425,1,0),	XO_MASK,  POWER7|PPCA2,	0,		{RT, RA, RB}},
XO_MASK          6185 arch/powerpc/xmon/ppc-opc.c {"divdeo.",	XO(31,425,1,1),	XO_MASK,  POWER7|PPCA2,	0,		{RT, RA, RB}},
XO_MASK          6186 arch/powerpc/xmon/ppc-opc.c {"divweo",	XO(31,427,1,0),	XO_MASK,  POWER7|PPCA2,	0,		{RT, RA, RB}},
XO_MASK          6187 arch/powerpc/xmon/ppc-opc.c {"divweo.",	XO(31,427,1,1),	XO_MASK,  POWER7|PPCA2,	0,		{RT, RA, RB}},
XO_MASK          6216 arch/powerpc/xmon/ppc-opc.c {"divduo",	XO(31,457,1,0),	XO_MASK,     PPC64,	0,		{RT, RA, RB}},
XO_MASK          6217 arch/powerpc/xmon/ppc-opc.c {"divduo.",	XO(31,457,1,1),	XO_MASK,     PPC64,	0,		{RT, RA, RB}},
XO_MASK          6219 arch/powerpc/xmon/ppc-opc.c {"divwuo",	XO(31,459,1,0),	XO_MASK,     PPC,	0,		{RT, RA, RB}},
XO_MASK          6220 arch/powerpc/xmon/ppc-opc.c {"divwuo.",	XO(31,459,1,1),	XO_MASK,     PPC,	0,		{RT, RA, RB}},
XO_MASK          6250 arch/powerpc/xmon/ppc-opc.c {"divdo",	XO(31,489,1,0),	XO_MASK,     PPC64,	0,		{RT, RA, RB}},
XO_MASK          6251 arch/powerpc/xmon/ppc-opc.c {"divdo.",	XO(31,489,1,1),	XO_MASK,     PPC64,	0,		{RT, RA, RB}},
XO_MASK          6253 arch/powerpc/xmon/ppc-opc.c {"divwo",	XO(31,491,1,0),	XO_MASK,     PPC,	0,		{RT, RA, RB}},
XO_MASK          6254 arch/powerpc/xmon/ppc-opc.c {"divwo.",	XO(31,491,1,1),	XO_MASK,     PPC,	0,		{RT, RA, RB}},