XCHAL_KIO_BYPASS_VADDR  152 arch/xtensa/include/asm/initialize_mmu.h 	movi	a5, XCHAL_KIO_BYPASS_VADDR + XCHAL_KIO_TLB_WAY
XCHAL_KIO_BYPASS_VADDR   22 arch/xtensa/include/asm/io.h #define IOADDR(x)		(XCHAL_KIO_BYPASS_VADDR + (x))
XCHAL_KIO_BYPASS_VADDR   24 arch/xtensa/include/asm/io.h #define PCI_IOBASE		((void __iomem *)XCHAL_KIO_BYPASS_VADDR)
XCHAL_KIO_BYPASS_VADDR   40 arch/xtensa/include/asm/io.h 		return (void*)(offset-XCHAL_KIO_PADDR+XCHAL_KIO_BYPASS_VADDR);
XCHAL_KIO_BYPASS_VADDR   71 arch/xtensa/include/asm/io.h 	    !(va >= XCHAL_KIO_BYPASS_VADDR &&
XCHAL_KIO_BYPASS_VADDR   72 arch/xtensa/include/asm/io.h 	      va - XCHAL_KIO_BYPASS_VADDR < XCHAL_KIO_SIZE))
XCHAL_KIO_BYPASS_VADDR  113 arch/xtensa/mm/mmu.c 			XCHAL_KIO_BYPASS_VADDR + 6);
XCHAL_KIO_BYPASS_VADDR  115 arch/xtensa/mm/mmu.c 			XCHAL_KIO_BYPASS_VADDR + 6);