Write              34 arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h 	dmtc0	v0, CP0_CVMMEMCTL_REG	# Write the cavium mem control register
Write              30 drivers/isdn/hardware/mISDN/iohelper.h 	static void Write##name##_IO(void *p, u8 off, u8 val) {		\
Write              49 drivers/isdn/hardware/mISDN/iohelper.h 	static void Write##name##_IND(void *p, u8 off, u8 val) {	\
Write              70 drivers/isdn/hardware/mISDN/iohelper.h 	static void Write##name##_MIO(void *p, u8 off, u8 val) {	\
Write              87 drivers/isdn/hardware/mISDN/iohelper.h 		dest.write_reg = &Write##name##_##typ;		\